LLVM API Documentation
This is the complete list of members for llvm::MipsInstrInfo, including all inherited members.
AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify) const | llvm::MipsInstrInfo | virtual |
AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify, SmallVectorImpl< MachineInstr * > &BranchInstrs) const | llvm::MipsInstrInfo | |
BranchType enum name | llvm::MipsInstrInfo | |
BT_Cond enum value | llvm::MipsInstrInfo | |
BT_CondUncond enum value | llvm::MipsInstrInfo | |
BT_Indirect enum value | llvm::MipsInstrInfo | |
BT_NoBranch enum value | llvm::MipsInstrInfo | |
BT_None enum value | llvm::MipsInstrInfo | |
BT_Uncond enum value | llvm::MipsInstrInfo | |
create(MipsTargetMachine &TM) | llvm::MipsInstrInfo | static |
genInstrWithNewOpc(unsigned NewOpc, MachineBasicBlock::iterator I) const | llvm::MipsInstrInfo | |
GetInstSizeInBytes(const MachineInstr *MI) const | llvm::MipsInstrInfo | |
GetMemOperand(MachineBasicBlock &MBB, int FI, unsigned Flag) const | llvm::MipsInstrInfo | protected |
getOppositeBranchOpc(unsigned Opc) const =0 | llvm::MipsInstrInfo | pure virtual |
getRegisterInfo() const =0 | llvm::MipsInstrInfo | pure virtual |
InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, const SmallVectorImpl< MachineOperand > &Cond, DebugLoc DL) const | llvm::MipsInstrInfo | virtual |
insertNoop(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI) const | llvm::MipsInstrInfo | virtual |
isZeroImm(const MachineOperand &op) const | llvm::MipsInstrInfo | protected |
loadRegFromStack(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI, int64_t Offset) const =0 | llvm::MipsInstrInfo | pure virtual |
loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const | llvm::MipsInstrInfo | inlinevirtual |
MipsInstrInfo(MipsTargetMachine &TM, unsigned UncondBrOpc) | llvm::MipsInstrInfo | explicit |
RemoveBranch(MachineBasicBlock &MBB) const | llvm::MipsInstrInfo | virtual |
ReverseBranchCondition(SmallVectorImpl< MachineOperand > &Cond) const | llvm::MipsInstrInfo | virtual |
storeRegToStack(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI, int64_t Offset) const =0 | llvm::MipsInstrInfo | pure virtual |
storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const | llvm::MipsInstrInfo | inlinevirtual |
TM | llvm::MipsInstrInfo | protected |
UncondBrOpc | llvm::MipsInstrInfo | protected |