#include "llvm/ADT/ArrayRef.h"
#include <string>
#include "llvm/IR/Intrinsics.gen"

Include dependency graph for Intrinsics.h:

This graph shows which files directly or indirectly include this file:

Classes
struct	llvm::Intrinsic::IITDescriptor

Namespaces
	llvm
	List of target independent CodeGen pass IDs.

	llvm::Intrinsic

Macros
#define	GET_INTRINSIC_ENUM_VALUES

Enumerations
enum	llvm::Intrinsic::ID { llvm::Intrinsic::not_intrinsic = 0, llvm::Intrinsic::aarch64_neon_fcvtas, llvm::Intrinsic::aarch64_neon_fcvtau, llvm::Intrinsic::aarch64_neon_fcvtms, llvm::Intrinsic::aarch64_neon_fcvtmu, llvm::Intrinsic::aarch64_neon_fcvtns, llvm::Intrinsic::aarch64_neon_fcvtnu, llvm::Intrinsic::aarch64_neon_fcvtps, llvm::Intrinsic::aarch64_neon_fcvtpu, llvm::Intrinsic::aarch64_neon_fcvtxn, llvm::Intrinsic::aarch64_neon_frintn, llvm::Intrinsic::aarch64_neon_fsqrt, llvm::Intrinsic::aarch64_neon_rbit, llvm::Intrinsic::aarch64_neon_saddlv, llvm::Intrinsic::aarch64_neon_sha1c, llvm::Intrinsic::aarch64_neon_sha1m, llvm::Intrinsic::aarch64_neon_sha1p, llvm::Intrinsic::aarch64_neon_smaxv, llvm::Intrinsic::aarch64_neon_sminv, llvm::Intrinsic::aarch64_neon_suqadd, llvm::Intrinsic::aarch64_neon_uaddlv, llvm::Intrinsic::aarch64_neon_umaxv, llvm::Intrinsic::aarch64_neon_uminv, llvm::Intrinsic::aarch64_neon_usqadd, llvm::Intrinsic::aarch64_neon_vabs, llvm::Intrinsic::aarch64_neon_vacgeq, llvm::Intrinsic::aarch64_neon_vacgtq, llvm::Intrinsic::aarch64_neon_vaddds, llvm::Intrinsic::aarch64_neon_vadddu, llvm::Intrinsic::aarch64_neon_vaddv, llvm::Intrinsic::aarch64_neon_vcage, llvm::Intrinsic::aarch64_neon_vcagt, llvm::Intrinsic::aarch64_neon_vceq, llvm::Intrinsic::aarch64_neon_vcge, llvm::Intrinsic::aarch64_neon_vcgt, llvm::Intrinsic::aarch64_neon_vchi, llvm::Intrinsic::aarch64_neon_vchs, llvm::Intrinsic::aarch64_neon_vclez, llvm::Intrinsic::aarch64_neon_vcltz, llvm::Intrinsic::aarch64_neon_vcvtd_n_s64_f64, llvm::Intrinsic::aarch64_neon_vcvtd_n_u64_f64, llvm::Intrinsic::aarch64_neon_vcvtf32_n_s32, llvm::Intrinsic::aarch64_neon_vcvtf32_n_u32, llvm::Intrinsic::aarch64_neon_vcvtf32_s32, llvm::Intrinsic::aarch64_neon_vcvtf32_u32, llvm::Intrinsic::aarch64_neon_vcvtf64_n_s64, llvm::Intrinsic::aarch64_neon_vcvtf64_n_u64, llvm::Intrinsic::aarch64_neon_vcvtf64_s64, llvm::Intrinsic::aarch64_neon_vcvtf64_u64, llvm::Intrinsic::aarch64_neon_vcvts_n_s32_f32, llvm::Intrinsic::aarch64_neon_vcvts_n_u32_f32, llvm::Intrinsic::aarch64_neon_vld1x2, llvm::Intrinsic::aarch64_neon_vld1x3, llvm::Intrinsic::aarch64_neon_vld1x4, llvm::Intrinsic::aarch64_neon_vmaxnm, llvm::Intrinsic::aarch64_neon_vmaxnmv, llvm::Intrinsic::aarch64_neon_vmaxv, llvm::Intrinsic::aarch64_neon_vminnm, llvm::Intrinsic::aarch64_neon_vminnmv, llvm::Intrinsic::aarch64_neon_vminv, llvm::Intrinsic::aarch64_neon_vmulx, llvm::Intrinsic::aarch64_neon_vneg, llvm::Intrinsic::aarch64_neon_vpadd, llvm::Intrinsic::aarch64_neon_vpfadd, llvm::Intrinsic::aarch64_neon_vpfaddq, llvm::Intrinsic::aarch64_neon_vpfmaxnm, llvm::Intrinsic::aarch64_neon_vpfmaxnmq, llvm::Intrinsic::aarch64_neon_vpfminnm, llvm::Intrinsic::aarch64_neon_vpfminnmq, llvm::Intrinsic::aarch64_neon_vpmax, llvm::Intrinsic::aarch64_neon_vpmaxnm, llvm::Intrinsic::aarch64_neon_vpmaxq, llvm::Intrinsic::aarch64_neon_vpmin, llvm::Intrinsic::aarch64_neon_vpminnm, llvm::Intrinsic::aarch64_neon_vpminq, llvm::Intrinsic::aarch64_neon_vqdmlal, llvm::Intrinsic::aarch64_neon_vqdmlsl, llvm::Intrinsic::aarch64_neon_vqrshls, llvm::Intrinsic::aarch64_neon_vqrshlu, llvm::Intrinsic::aarch64_neon_vqshls, llvm::Intrinsic::aarch64_neon_vqshls_n, llvm::Intrinsic::aarch64_neon_vqshlu, llvm::Intrinsic::aarch64_neon_vqshlu_n, llvm::Intrinsic::aarch64_neon_vqshlus_n, llvm::Intrinsic::aarch64_neon_vrecpx, llvm::Intrinsic::aarch64_neon_vrshlds, llvm::Intrinsic::aarch64_neon_vrshldu, llvm::Intrinsic::aarch64_neon_vrshrn, llvm::Intrinsic::aarch64_neon_vrsrads_n, llvm::Intrinsic::aarch64_neon_vrsradu_n, llvm::Intrinsic::aarch64_neon_vshld_n, llvm::Intrinsic::aarch64_neon_vshlds, llvm::Intrinsic::aarch64_neon_vshldu, llvm::Intrinsic::aarch64_neon_vshrds_n, llvm::Intrinsic::aarch64_neon_vshrdu_n, llvm::Intrinsic::aarch64_neon_vsli, llvm::Intrinsic::aarch64_neon_vsqadd, llvm::Intrinsic::aarch64_neon_vsqrshrn, llvm::Intrinsic::aarch64_neon_vsqrshrun, llvm::Intrinsic::aarch64_neon_vsqshlu, llvm::Intrinsic::aarch64_neon_vsqshrn, llvm::Intrinsic::aarch64_neon_vsqshrun, llvm::Intrinsic::aarch64_neon_vsrads_n, llvm::Intrinsic::aarch64_neon_vsradu_n, llvm::Intrinsic::aarch64_neon_vsri, llvm::Intrinsic::aarch64_neon_vsrshr, llvm::Intrinsic::aarch64_neon_vst1x2, llvm::Intrinsic::aarch64_neon_vst1x3, llvm::Intrinsic::aarch64_neon_vst1x4, llvm::Intrinsic::aarch64_neon_vsubds, llvm::Intrinsic::aarch64_neon_vsubdu, llvm::Intrinsic::aarch64_neon_vtbl1, llvm::Intrinsic::aarch64_neon_vtbl2, llvm::Intrinsic::aarch64_neon_vtbl3, llvm::Intrinsic::aarch64_neon_vtbl4, llvm::Intrinsic::aarch64_neon_vtbx1, llvm::Intrinsic::aarch64_neon_vtbx2, llvm::Intrinsic::aarch64_neon_vtbx3, llvm::Intrinsic::aarch64_neon_vtbx4, llvm::Intrinsic::aarch64_neon_vtstd, llvm::Intrinsic::aarch64_neon_vuqadd, llvm::Intrinsic::aarch64_neon_vuqrshrn, llvm::Intrinsic::aarch64_neon_vuqshrn, llvm::Intrinsic::aarch64_neon_vurshr, llvm::Intrinsic::aarch64_neon_xtn, llvm::Intrinsic::adjust_trampoline, llvm::Intrinsic::annotation, llvm::Intrinsic::arm_cdp, llvm::Intrinsic::arm_cdp2, llvm::Intrinsic::arm_clrex, llvm::Intrinsic::arm_crc32b, llvm::Intrinsic::arm_crc32cb, llvm::Intrinsic::arm_crc32ch, llvm::Intrinsic::arm_crc32cw, llvm::Intrinsic::arm_crc32h, llvm::Intrinsic::arm_crc32w, llvm::Intrinsic::arm_dmb, llvm::Intrinsic::arm_dsb, llvm::Intrinsic::arm_get_fpscr, llvm::Intrinsic::arm_ldrex, llvm::Intrinsic::arm_ldrexd, llvm::Intrinsic::arm_mcr, llvm::Intrinsic::arm_mcr2, llvm::Intrinsic::arm_mcrr, llvm::Intrinsic::arm_mcrr2, llvm::Intrinsic::arm_mrc, llvm::Intrinsic::arm_mrc2, llvm::Intrinsic::arm_neon_aesd, llvm::Intrinsic::arm_neon_aese, llvm::Intrinsic::arm_neon_aesimc, llvm::Intrinsic::arm_neon_aesmc, llvm::Intrinsic::arm_neon_sha1c, llvm::Intrinsic::arm_neon_sha1h, llvm::Intrinsic::arm_neon_sha1m, llvm::Intrinsic::arm_neon_sha1p, llvm::Intrinsic::arm_neon_sha1su0, llvm::Intrinsic::arm_neon_sha1su1, llvm::Intrinsic::arm_neon_sha256h, llvm::Intrinsic::arm_neon_sha256h2, llvm::Intrinsic::arm_neon_sha256su0, llvm::Intrinsic::arm_neon_sha256su1, llvm::Intrinsic::arm_neon_vabds, llvm::Intrinsic::arm_neon_vabdu, llvm::Intrinsic::arm_neon_vabs, llvm::Intrinsic::arm_neon_vacged, llvm::Intrinsic::arm_neon_vacgeq, llvm::Intrinsic::arm_neon_vacgtd, llvm::Intrinsic::arm_neon_vacgtq, llvm::Intrinsic::arm_neon_vbsl, llvm::Intrinsic::arm_neon_vcls, llvm::Intrinsic::arm_neon_vclz, llvm::Intrinsic::arm_neon_vcnt, llvm::Intrinsic::arm_neon_vcvtas, llvm::Intrinsic::arm_neon_vcvtau, llvm::Intrinsic::arm_neon_vcvtfp2fxs, llvm::Intrinsic::arm_neon_vcvtfp2fxu, llvm::Intrinsic::arm_neon_vcvtfp2hf, llvm::Intrinsic::arm_neon_vcvtfxs2fp, llvm::Intrinsic::arm_neon_vcvtfxu2fp, llvm::Intrinsic::arm_neon_vcvthf2fp, llvm::Intrinsic::arm_neon_vcvtms, llvm::Intrinsic::arm_neon_vcvtmu, llvm::Intrinsic::arm_neon_vcvtns, llvm::Intrinsic::arm_neon_vcvtnu, llvm::Intrinsic::arm_neon_vcvtps, llvm::Intrinsic::arm_neon_vcvtpu, llvm::Intrinsic::arm_neon_vhadds, llvm::Intrinsic::arm_neon_vhaddu, llvm::Intrinsic::arm_neon_vhsubs, llvm::Intrinsic::arm_neon_vhsubu, llvm::Intrinsic::arm_neon_vld1, llvm::Intrinsic::arm_neon_vld2, llvm::Intrinsic::arm_neon_vld2lane, llvm::Intrinsic::arm_neon_vld3, llvm::Intrinsic::arm_neon_vld3lane, llvm::Intrinsic::arm_neon_vld4, llvm::Intrinsic::arm_neon_vld4lane, llvm::Intrinsic::arm_neon_vmaxnm, llvm::Intrinsic::arm_neon_vmaxs, llvm::Intrinsic::arm_neon_vmaxu, llvm::Intrinsic::arm_neon_vminnm, llvm::Intrinsic::arm_neon_vmins, llvm::Intrinsic::arm_neon_vminu, llvm::Intrinsic::arm_neon_vmullp, llvm::Intrinsic::arm_neon_vmulls, llvm::Intrinsic::arm_neon_vmullu, llvm::Intrinsic::arm_neon_vmulp, llvm::Intrinsic::arm_neon_vpadals, llvm::Intrinsic::arm_neon_vpadalu, llvm::Intrinsic::arm_neon_vpadd, llvm::Intrinsic::arm_neon_vpaddls, llvm::Intrinsic::arm_neon_vpaddlu, llvm::Intrinsic::arm_neon_vpmaxs, llvm::Intrinsic::arm_neon_vpmaxu, llvm::Intrinsic::arm_neon_vpmins, llvm::Intrinsic::arm_neon_vpminu, llvm::Intrinsic::arm_neon_vqabs, llvm::Intrinsic::arm_neon_vqadds, llvm::Intrinsic::arm_neon_vqaddu, llvm::Intrinsic::arm_neon_vqdmulh, llvm::Intrinsic::arm_neon_vqdmull, llvm::Intrinsic::arm_neon_vqmovns, llvm::Intrinsic::arm_neon_vqmovnsu, llvm::Intrinsic::arm_neon_vqmovnu, llvm::Intrinsic::arm_neon_vqneg, llvm::Intrinsic::arm_neon_vqrdmulh, llvm::Intrinsic::arm_neon_vqrshiftns, llvm::Intrinsic::arm_neon_vqrshiftnsu, llvm::Intrinsic::arm_neon_vqrshiftnu, llvm::Intrinsic::arm_neon_vqrshifts, llvm::Intrinsic::arm_neon_vqrshiftu, llvm::Intrinsic::arm_neon_vqshiftns, llvm::Intrinsic::arm_neon_vqshiftnsu, llvm::Intrinsic::arm_neon_vqshiftnu, llvm::Intrinsic::arm_neon_vqshifts, llvm::Intrinsic::arm_neon_vqshiftsu, llvm::Intrinsic::arm_neon_vqshiftu, llvm::Intrinsic::arm_neon_vqsubs, llvm::Intrinsic::arm_neon_vqsubu, llvm::Intrinsic::arm_neon_vraddhn, llvm::Intrinsic::arm_neon_vrecpe, llvm::Intrinsic::arm_neon_vrecps, llvm::Intrinsic::arm_neon_vrhadds, llvm::Intrinsic::arm_neon_vrhaddu, llvm::Intrinsic::arm_neon_vrinta, llvm::Intrinsic::arm_neon_vrintm, llvm::Intrinsic::arm_neon_vrintn, llvm::Intrinsic::arm_neon_vrintp, llvm::Intrinsic::arm_neon_vrintx, llvm::Intrinsic::arm_neon_vrintz, llvm::Intrinsic::arm_neon_vrshiftn, llvm::Intrinsic::arm_neon_vrshifts, llvm::Intrinsic::arm_neon_vrshiftu, llvm::Intrinsic::arm_neon_vrsqrte, llvm::Intrinsic::arm_neon_vrsqrts, llvm::Intrinsic::arm_neon_vrsubhn, llvm::Intrinsic::arm_neon_vshiftins, llvm::Intrinsic::arm_neon_vshiftls, llvm::Intrinsic::arm_neon_vshiftlu, llvm::Intrinsic::arm_neon_vshiftn, llvm::Intrinsic::arm_neon_vshifts, llvm::Intrinsic::arm_neon_vshiftu, llvm::Intrinsic::arm_neon_vst1, llvm::Intrinsic::arm_neon_vst2, llvm::Intrinsic::arm_neon_vst2lane, llvm::Intrinsic::arm_neon_vst3, llvm::Intrinsic::arm_neon_vst3lane, llvm::Intrinsic::arm_neon_vst4, llvm::Intrinsic::arm_neon_vst4lane, llvm::Intrinsic::arm_neon_vtbl1, llvm::Intrinsic::arm_neon_vtbl2, llvm::Intrinsic::arm_neon_vtbl3, llvm::Intrinsic::arm_neon_vtbl4, llvm::Intrinsic::arm_neon_vtbx1, llvm::Intrinsic::arm_neon_vtbx2, llvm::Intrinsic::arm_neon_vtbx3, llvm::Intrinsic::arm_neon_vtbx4, llvm::Intrinsic::arm_qadd, llvm::Intrinsic::arm_qsub, llvm::Intrinsic::arm_set_fpscr, llvm::Intrinsic::arm_sevl, llvm::Intrinsic::arm_ssat, llvm::Intrinsic::arm_strex, llvm::Intrinsic::arm_strexd, llvm::Intrinsic::arm_thread_pointer, llvm::Intrinsic::arm_usat, llvm::Intrinsic::arm_vcvtr, llvm::Intrinsic::arm_vcvtru, llvm::Intrinsic::bswap, llvm::Intrinsic::ceil, llvm::Intrinsic::convert_from_fp16, llvm::Intrinsic::convert_to_fp16, llvm::Intrinsic::convertff, llvm::Intrinsic::convertfsi, llvm::Intrinsic::convertfui, llvm::Intrinsic::convertsif, llvm::Intrinsic::convertss, llvm::Intrinsic::convertsu, llvm::Intrinsic::convertuif, llvm::Intrinsic::convertus, llvm::Intrinsic::convertuu, llvm::Intrinsic::copysign, llvm::Intrinsic::cos, llvm::Intrinsic::ctlz, llvm::Intrinsic::ctpop, llvm::Intrinsic::cttz, llvm::Intrinsic::cuda_syncthreads, llvm::Intrinsic::dbg_declare, llvm::Intrinsic::dbg_value, llvm::Intrinsic::debugtrap, llvm::Intrinsic::donothing, llvm::Intrinsic::eh_dwarf_cfa, llvm::Intrinsic::eh_return_i32, llvm::Intrinsic::eh_return_i64, llvm::Intrinsic::eh_sjlj_callsite, llvm::Intrinsic::eh_sjlj_functioncontext, llvm::Intrinsic::eh_sjlj_longjmp, llvm::Intrinsic::eh_sjlj_lsda, llvm::Intrinsic::eh_sjlj_setjmp, llvm::Intrinsic::eh_typeid_for, llvm::Intrinsic::eh_unwind_init, llvm::Intrinsic::exp, llvm::Intrinsic::exp2, llvm::Intrinsic::expect, llvm::Intrinsic::experimental_patchpoint_i64, llvm::Intrinsic::experimental_patchpoint_void, llvm::Intrinsic::experimental_stackmap, llvm::Intrinsic::fabs, llvm::Intrinsic::floor, llvm::Intrinsic::flt_rounds, llvm::Intrinsic::fma, llvm::Intrinsic::fmuladd, llvm::Intrinsic::frameaddress, llvm::Intrinsic::gcread, llvm::Intrinsic::gcroot, llvm::Intrinsic::gcwrite, llvm::Intrinsic::hexagon_A2_abs, llvm::Intrinsic::hexagon_A2_absp, llvm::Intrinsic::hexagon_A2_abssat, llvm::Intrinsic::hexagon_A2_add, llvm::Intrinsic::hexagon_A2_addh_h16_hh, llvm::Intrinsic::hexagon_A2_addh_h16_hl, llvm::Intrinsic::hexagon_A2_addh_h16_lh, llvm::Intrinsic::hexagon_A2_addh_h16_ll, llvm::Intrinsic::hexagon_A2_addh_h16_sat_hh, llvm::Intrinsic::hexagon_A2_addh_h16_sat_hl, llvm::Intrinsic::hexagon_A2_addh_h16_sat_lh, llvm::Intrinsic::hexagon_A2_addh_h16_sat_ll, llvm::Intrinsic::hexagon_A2_addh_l16_hl, llvm::Intrinsic::hexagon_A2_addh_l16_ll, llvm::Intrinsic::hexagon_A2_addh_l16_sat_hl, llvm::Intrinsic::hexagon_A2_addh_l16_sat_ll, llvm::Intrinsic::hexagon_A2_addi, llvm::Intrinsic::hexagon_A2_addp, llvm::Intrinsic::hexagon_A2_addpsat, llvm::Intrinsic::hexagon_A2_addsat, llvm::Intrinsic::hexagon_A2_addsp, llvm::Intrinsic::hexagon_A2_and, llvm::Intrinsic::hexagon_A2_andir, llvm::Intrinsic::hexagon_A2_andp, llvm::Intrinsic::hexagon_A2_aslh, llvm::Intrinsic::hexagon_A2_asrh, llvm::Intrinsic::hexagon_A2_combine_hh, llvm::Intrinsic::hexagon_A2_combine_hl, llvm::Intrinsic::hexagon_A2_combine_lh, llvm::Intrinsic::hexagon_A2_combine_ll, llvm::Intrinsic::hexagon_A2_combineii, llvm::Intrinsic::hexagon_A2_combinew, llvm::Intrinsic::hexagon_A2_max, llvm::Intrinsic::hexagon_A2_maxp, llvm::Intrinsic::hexagon_A2_maxu, llvm::Intrinsic::hexagon_A2_maxup, llvm::Intrinsic::hexagon_A2_min, llvm::Intrinsic::hexagon_A2_minp, llvm::Intrinsic::hexagon_A2_minu, llvm::Intrinsic::hexagon_A2_minup, llvm::Intrinsic::hexagon_A2_neg, llvm::Intrinsic::hexagon_A2_negp, llvm::Intrinsic::hexagon_A2_negsat, llvm::Intrinsic::hexagon_A2_not, llvm::Intrinsic::hexagon_A2_notp, llvm::Intrinsic::hexagon_A2_or, llvm::Intrinsic::hexagon_A2_orir, llvm::Intrinsic::hexagon_A2_orp, llvm::Intrinsic::hexagon_A2_roundsat, llvm::Intrinsic::hexagon_A2_sat, llvm::Intrinsic::hexagon_A2_satb, llvm::Intrinsic::hexagon_A2_sath, llvm::Intrinsic::hexagon_A2_satub, llvm::Intrinsic::hexagon_A2_satuh, llvm::Intrinsic::hexagon_A2_sub, llvm::Intrinsic::hexagon_A2_subh_h16_hh, llvm::Intrinsic::hexagon_A2_subh_h16_hl, llvm::Intrinsic::hexagon_A2_subh_h16_lh, llvm::Intrinsic::hexagon_A2_subh_h16_ll, llvm::Intrinsic::hexagon_A2_subh_h16_sat_hh, llvm::Intrinsic::hexagon_A2_subh_h16_sat_hl, llvm::Intrinsic::hexagon_A2_subh_h16_sat_lh, llvm::Intrinsic::hexagon_A2_subh_h16_sat_ll, llvm::Intrinsic::hexagon_A2_subh_l16_hl, llvm::Intrinsic::hexagon_A2_subh_l16_ll, llvm::Intrinsic::hexagon_A2_subh_l16_sat_hl, llvm::Intrinsic::hexagon_A2_subh_l16_sat_ll, llvm::Intrinsic::hexagon_A2_subp, llvm::Intrinsic::hexagon_A2_subri, llvm::Intrinsic::hexagon_A2_subsat, llvm::Intrinsic::hexagon_A2_svaddh, llvm::Intrinsic::hexagon_A2_svaddhs, llvm::Intrinsic::hexagon_A2_svadduhs, llvm::Intrinsic::hexagon_A2_svavgh, llvm::Intrinsic::hexagon_A2_svavghs, llvm::Intrinsic::hexagon_A2_svnavgh, llvm::Intrinsic::hexagon_A2_svsubh, llvm::Intrinsic::hexagon_A2_svsubhs, llvm::Intrinsic::hexagon_A2_svsubuhs, llvm::Intrinsic::hexagon_A2_swiz, llvm::Intrinsic::hexagon_A2_sxtb, llvm::Intrinsic::hexagon_A2_sxth, llvm::Intrinsic::hexagon_A2_sxtw, llvm::Intrinsic::hexagon_A2_tfr, llvm::Intrinsic::hexagon_A2_tfrih, llvm::Intrinsic::hexagon_A2_tfril, llvm::Intrinsic::hexagon_A2_tfrp, llvm::Intrinsic::hexagon_A2_tfrpi, llvm::Intrinsic::hexagon_A2_tfrsi, llvm::Intrinsic::hexagon_A2_vabsh, llvm::Intrinsic::hexagon_A2_vabshsat, llvm::Intrinsic::hexagon_A2_vabsw, llvm::Intrinsic::hexagon_A2_vabswsat, llvm::Intrinsic::hexagon_A2_vaddb_map, llvm::Intrinsic::hexagon_A2_vaddh, llvm::Intrinsic::hexagon_A2_vaddhs, llvm::Intrinsic::hexagon_A2_vaddub, llvm::Intrinsic::hexagon_A2_vaddubs, llvm::Intrinsic::hexagon_A2_vadduhs, llvm::Intrinsic::hexagon_A2_vaddw, llvm::Intrinsic::hexagon_A2_vaddws, llvm::Intrinsic::hexagon_A2_vavgh, llvm::Intrinsic::hexagon_A2_vavghcr, llvm::Intrinsic::hexagon_A2_vavghr, llvm::Intrinsic::hexagon_A2_vavgub, llvm::Intrinsic::hexagon_A2_vavgubr, llvm::Intrinsic::hexagon_A2_vavguh, llvm::Intrinsic::hexagon_A2_vavguhr, llvm::Intrinsic::hexagon_A2_vavguw, llvm::Intrinsic::hexagon_A2_vavguwr, llvm::Intrinsic::hexagon_A2_vavgw, llvm::Intrinsic::hexagon_A2_vavgwcr, llvm::Intrinsic::hexagon_A2_vavgwr, llvm::Intrinsic::hexagon_A2_vcmpbeq, llvm::Intrinsic::hexagon_A2_vcmpbgtu, llvm::Intrinsic::hexagon_A2_vcmpheq, llvm::Intrinsic::hexagon_A2_vcmphgt, llvm::Intrinsic::hexagon_A2_vcmphgtu, llvm::Intrinsic::hexagon_A2_vcmpweq, llvm::Intrinsic::hexagon_A2_vcmpwgt, llvm::Intrinsic::hexagon_A2_vcmpwgtu, llvm::Intrinsic::hexagon_A2_vconj, llvm::Intrinsic::hexagon_A2_vmaxb, llvm::Intrinsic::hexagon_A2_vmaxh, llvm::Intrinsic::hexagon_A2_vmaxub, llvm::Intrinsic::hexagon_A2_vmaxuh, llvm::Intrinsic::hexagon_A2_vmaxuw, llvm::Intrinsic::hexagon_A2_vmaxw, llvm::Intrinsic::hexagon_A2_vminb, llvm::Intrinsic::hexagon_A2_vminh, llvm::Intrinsic::hexagon_A2_vminub, llvm::Intrinsic::hexagon_A2_vminuh, llvm::Intrinsic::hexagon_A2_vminuw, llvm::Intrinsic::hexagon_A2_vminw, llvm::Intrinsic::hexagon_A2_vnavgh, llvm::Intrinsic::hexagon_A2_vnavghcr, llvm::Intrinsic::hexagon_A2_vnavghr, llvm::Intrinsic::hexagon_A2_vnavgw, llvm::Intrinsic::hexagon_A2_vnavgwcr, llvm::Intrinsic::hexagon_A2_vnavgwr, llvm::Intrinsic::hexagon_A2_vraddub, llvm::Intrinsic::hexagon_A2_vraddub_acc, llvm::Intrinsic::hexagon_A2_vrsadub, llvm::Intrinsic::hexagon_A2_vrsadub_acc, llvm::Intrinsic::hexagon_A2_vsubb_map, llvm::Intrinsic::hexagon_A2_vsubh, llvm::Intrinsic::hexagon_A2_vsubhs, llvm::Intrinsic::hexagon_A2_vsubub, llvm::Intrinsic::hexagon_A2_vsububs, llvm::Intrinsic::hexagon_A2_vsubuhs, llvm::Intrinsic::hexagon_A2_vsubw, llvm::Intrinsic::hexagon_A2_vsubws, llvm::Intrinsic::hexagon_A2_xor, llvm::Intrinsic::hexagon_A2_xorp, llvm::Intrinsic::hexagon_A2_zxtb, llvm::Intrinsic::hexagon_A2_zxth, llvm::Intrinsic::hexagon_A4_andn, llvm::Intrinsic::hexagon_A4_andnp, llvm::Intrinsic::hexagon_A4_bitsplit, llvm::Intrinsic::hexagon_A4_bitspliti, llvm::Intrinsic::hexagon_A4_boundscheck, llvm::Intrinsic::hexagon_A4_cmpbeq, llvm::Intrinsic::hexagon_A4_cmpbeqi, llvm::Intrinsic::hexagon_A4_cmpbgt, llvm::Intrinsic::hexagon_A4_cmpbgti, llvm::Intrinsic::hexagon_A4_cmpbgtu, llvm::Intrinsic::hexagon_A4_cmpbgtui, llvm::Intrinsic::hexagon_A4_cmpheq, llvm::Intrinsic::hexagon_A4_cmpheqi, llvm::Intrinsic::hexagon_A4_cmphgt, llvm::Intrinsic::hexagon_A4_cmphgti, llvm::Intrinsic::hexagon_A4_cmphgtu, llvm::Intrinsic::hexagon_A4_cmphgtui, llvm::Intrinsic::hexagon_A4_combineir, llvm::Intrinsic::hexagon_A4_combineri, llvm::Intrinsic::hexagon_A4_cround_ri, llvm::Intrinsic::hexagon_A4_cround_rr, llvm::Intrinsic::hexagon_A4_modwrapu, llvm::Intrinsic::hexagon_A4_orn, llvm::Intrinsic::hexagon_A4_ornp, llvm::Intrinsic::hexagon_A4_rcmpeq, llvm::Intrinsic::hexagon_A4_rcmpeqi, llvm::Intrinsic::hexagon_A4_rcmpneq, llvm::Intrinsic::hexagon_A4_rcmpneqi, llvm::Intrinsic::hexagon_A4_round_ri, llvm::Intrinsic::hexagon_A4_round_ri_sat, llvm::Intrinsic::hexagon_A4_round_rr, llvm::Intrinsic::hexagon_A4_round_rr_sat, llvm::Intrinsic::hexagon_A4_tlbmatch, llvm::Intrinsic::hexagon_A4_vcmpbeq_any, llvm::Intrinsic::hexagon_A4_vcmpbeqi, llvm::Intrinsic::hexagon_A4_vcmpbgt, llvm::Intrinsic::hexagon_A4_vcmpbgti, llvm::Intrinsic::hexagon_A4_vcmpbgtui, llvm::Intrinsic::hexagon_A4_vcmpheqi, llvm::Intrinsic::hexagon_A4_vcmphgti, llvm::Intrinsic::hexagon_A4_vcmphgtui, llvm::Intrinsic::hexagon_A4_vcmpweqi, llvm::Intrinsic::hexagon_A4_vcmpwgti, llvm::Intrinsic::hexagon_A4_vcmpwgtui, llvm::Intrinsic::hexagon_A4_vrmaxh, llvm::Intrinsic::hexagon_A4_vrmaxuh, llvm::Intrinsic::hexagon_A4_vrmaxuw, llvm::Intrinsic::hexagon_A4_vrmaxw, llvm::Intrinsic::hexagon_A4_vrminh, llvm::Intrinsic::hexagon_A4_vrminuh, llvm::Intrinsic::hexagon_A4_vrminuw, llvm::Intrinsic::hexagon_A4_vrminw, llvm::Intrinsic::hexagon_A5_vaddhubs, llvm::Intrinsic::hexagon_C2_all8, llvm::Intrinsic::hexagon_C2_and, llvm::Intrinsic::hexagon_C2_andn, llvm::Intrinsic::hexagon_C2_any8, llvm::Intrinsic::hexagon_C2_bitsclr, llvm::Intrinsic::hexagon_C2_bitsclri, llvm::Intrinsic::hexagon_C2_bitsset, llvm::Intrinsic::hexagon_C2_cmpeq, llvm::Intrinsic::hexagon_C2_cmpeqi, llvm::Intrinsic::hexagon_C2_cmpeqp, llvm::Intrinsic::hexagon_C2_cmpgei, llvm::Intrinsic::hexagon_C2_cmpgeui, llvm::Intrinsic::hexagon_C2_cmpgt, llvm::Intrinsic::hexagon_C2_cmpgti, llvm::Intrinsic::hexagon_C2_cmpgtp, llvm::Intrinsic::hexagon_C2_cmpgtu, llvm::Intrinsic::hexagon_C2_cmpgtui, llvm::Intrinsic::hexagon_C2_cmpgtup, llvm::Intrinsic::hexagon_C2_cmplt, llvm::Intrinsic::hexagon_C2_cmpltu, llvm::Intrinsic::hexagon_C2_mask, llvm::Intrinsic::hexagon_C2_mux, llvm::Intrinsic::hexagon_C2_muxii, llvm::Intrinsic::hexagon_C2_muxir, llvm::Intrinsic::hexagon_C2_muxri, llvm::Intrinsic::hexagon_C2_not, llvm::Intrinsic::hexagon_C2_or, llvm::Intrinsic::hexagon_C2_orn, llvm::Intrinsic::hexagon_C2_pxfer_map, llvm::Intrinsic::hexagon_C2_tfrpr, llvm::Intrinsic::hexagon_C2_tfrrp, llvm::Intrinsic::hexagon_C2_vitpack, llvm::Intrinsic::hexagon_C2_vmux, llvm::Intrinsic::hexagon_C2_xor, llvm::Intrinsic::hexagon_C4_and_and, llvm::Intrinsic::hexagon_C4_and_andn, llvm::Intrinsic::hexagon_C4_and_or, llvm::Intrinsic::hexagon_C4_and_orn, llvm::Intrinsic::hexagon_C4_cmplte, llvm::Intrinsic::hexagon_C4_cmpltei, llvm::Intrinsic::hexagon_C4_cmplteu, llvm::Intrinsic::hexagon_C4_cmplteui, llvm::Intrinsic::hexagon_C4_cmpneq, llvm::Intrinsic::hexagon_C4_cmpneqi, llvm::Intrinsic::hexagon_C4_fastcorner9, llvm::Intrinsic::hexagon_C4_fastcorner9_not, llvm::Intrinsic::hexagon_C4_nbitsclr, llvm::Intrinsic::hexagon_C4_nbitsclri, llvm::Intrinsic::hexagon_C4_nbitsset, llvm::Intrinsic::hexagon_C4_or_and, llvm::Intrinsic::hexagon_C4_or_andn, llvm::Intrinsic::hexagon_C4_or_or, llvm::Intrinsic::hexagon_C4_or_orn, llvm::Intrinsic::hexagon_F2_conv_d2df, llvm::Intrinsic::hexagon_F2_conv_d2sf, llvm::Intrinsic::hexagon_F2_conv_df2d, llvm::Intrinsic::hexagon_F2_conv_df2d_chop, llvm::Intrinsic::hexagon_F2_conv_df2sf, llvm::Intrinsic::hexagon_F2_conv_df2ud, llvm::Intrinsic::hexagon_F2_conv_df2ud_chop, llvm::Intrinsic::hexagon_F2_conv_df2uw, llvm::Intrinsic::hexagon_F2_conv_df2uw_chop, llvm::Intrinsic::hexagon_F2_conv_df2w, llvm::Intrinsic::hexagon_F2_conv_df2w_chop, llvm::Intrinsic::hexagon_F2_conv_sf2d, llvm::Intrinsic::hexagon_F2_conv_sf2d_chop, llvm::Intrinsic::hexagon_F2_conv_sf2df, llvm::Intrinsic::hexagon_F2_conv_sf2ud, llvm::Intrinsic::hexagon_F2_conv_sf2ud_chop, llvm::Intrinsic::hexagon_F2_conv_sf2uw, llvm::Intrinsic::hexagon_F2_conv_sf2uw_chop, llvm::Intrinsic::hexagon_F2_conv_sf2w, llvm::Intrinsic::hexagon_F2_conv_sf2w_chop, llvm::Intrinsic::hexagon_F2_conv_ud2df, llvm::Intrinsic::hexagon_F2_conv_ud2sf, llvm::Intrinsic::hexagon_F2_conv_uw2df, llvm::Intrinsic::hexagon_F2_conv_uw2sf, llvm::Intrinsic::hexagon_F2_conv_w2df, llvm::Intrinsic::hexagon_F2_conv_w2sf, llvm::Intrinsic::hexagon_F2_dfadd, llvm::Intrinsic::hexagon_F2_dfclass, llvm::Intrinsic::hexagon_F2_dfcmpeq, llvm::Intrinsic::hexagon_F2_dfcmpge, llvm::Intrinsic::hexagon_F2_dfcmpgt, llvm::Intrinsic::hexagon_F2_dfcmpuo, llvm::Intrinsic::hexagon_F2_dffixupd, llvm::Intrinsic::hexagon_F2_dffixupn, llvm::Intrinsic::hexagon_F2_dffixupr, llvm::Intrinsic::hexagon_F2_dffma, llvm::Intrinsic::hexagon_F2_dffma_lib, llvm::Intrinsic::hexagon_F2_dffma_sc, llvm::Intrinsic::hexagon_F2_dffms, llvm::Intrinsic::hexagon_F2_dffms_lib, llvm::Intrinsic::hexagon_F2_dfimm_n, llvm::Intrinsic::hexagon_F2_dfimm_p, llvm::Intrinsic::hexagon_F2_dfmax, llvm::Intrinsic::hexagon_F2_dfmin, llvm::Intrinsic::hexagon_F2_dfmpy, llvm::Intrinsic::hexagon_F2_dfsub, llvm::Intrinsic::hexagon_F2_sfadd, llvm::Intrinsic::hexagon_F2_sfclass, llvm::Intrinsic::hexagon_F2_sfcmpeq, llvm::Intrinsic::hexagon_F2_sfcmpge, llvm::Intrinsic::hexagon_F2_sfcmpgt, llvm::Intrinsic::hexagon_F2_sfcmpuo, llvm::Intrinsic::hexagon_F2_sffixupd, llvm::Intrinsic::hexagon_F2_sffixupn, llvm::Intrinsic::hexagon_F2_sffixupr, llvm::Intrinsic::hexagon_F2_sffma, llvm::Intrinsic::hexagon_F2_sffma_lib, llvm::Intrinsic::hexagon_F2_sffma_sc, llvm::Intrinsic::hexagon_F2_sffms, llvm::Intrinsic::hexagon_F2_sffms_lib, llvm::Intrinsic::hexagon_F2_sfimm_n, llvm::Intrinsic::hexagon_F2_sfimm_p, llvm::Intrinsic::hexagon_F2_sfmax, llvm::Intrinsic::hexagon_F2_sfmin, llvm::Intrinsic::hexagon_F2_sfmpy, llvm::Intrinsic::hexagon_F2_sfsub, llvm::Intrinsic::hexagon_M2_acci, llvm::Intrinsic::hexagon_M2_accii, llvm::Intrinsic::hexagon_M2_cmaci_s0, llvm::Intrinsic::hexagon_M2_cmacr_s0, llvm::Intrinsic::hexagon_M2_cmacs_s0, llvm::Intrinsic::hexagon_M2_cmacs_s1, llvm::Intrinsic::hexagon_M2_cmacsc_s0, llvm::Intrinsic::hexagon_M2_cmacsc_s1, llvm::Intrinsic::hexagon_M2_cmpyi_s0, llvm::Intrinsic::hexagon_M2_cmpyr_s0, llvm::Intrinsic::hexagon_M2_cmpyrs_s0, llvm::Intrinsic::hexagon_M2_cmpyrs_s1, llvm::Intrinsic::hexagon_M2_cmpyrsc_s0, llvm::Intrinsic::hexagon_M2_cmpyrsc_s1, llvm::Intrinsic::hexagon_M2_cmpys_s0, llvm::Intrinsic::hexagon_M2_cmpys_s1, llvm::Intrinsic::hexagon_M2_cmpysc_s0, llvm::Intrinsic::hexagon_M2_cmpysc_s1, llvm::Intrinsic::hexagon_M2_cnacs_s0, llvm::Intrinsic::hexagon_M2_cnacs_s1, llvm::Intrinsic::hexagon_M2_cnacsc_s0, llvm::Intrinsic::hexagon_M2_cnacsc_s1, llvm::Intrinsic::hexagon_M2_dpmpyss_acc_s0, llvm::Intrinsic::hexagon_M2_dpmpyss_nac_s0, llvm::Intrinsic::hexagon_M2_dpmpyss_rnd_s0, llvm::Intrinsic::hexagon_M2_dpmpyss_s0, llvm::Intrinsic::hexagon_M2_dpmpyuu_acc_s0, llvm::Intrinsic::hexagon_M2_dpmpyuu_nac_s0, llvm::Intrinsic::hexagon_M2_dpmpyuu_s0, llvm::Intrinsic::hexagon_M2_hmmpyh_rs1, llvm::Intrinsic::hexagon_M2_hmmpyh_s1, llvm::Intrinsic::hexagon_M2_hmmpyl_rs1, llvm::Intrinsic::hexagon_M2_hmmpyl_s1, llvm::Intrinsic::hexagon_M2_maci, llvm::Intrinsic::hexagon_M2_macsin, llvm::Intrinsic::hexagon_M2_macsip, llvm::Intrinsic::hexagon_M2_mmachs_rs0, llvm::Intrinsic::hexagon_M2_mmachs_rs1, llvm::Intrinsic::hexagon_M2_mmachs_s0, llvm::Intrinsic::hexagon_M2_mmachs_s1, llvm::Intrinsic::hexagon_M2_mmacls_rs0, llvm::Intrinsic::hexagon_M2_mmacls_rs1, llvm::Intrinsic::hexagon_M2_mmacls_s0, llvm::Intrinsic::hexagon_M2_mmacls_s1, llvm::Intrinsic::hexagon_M2_mmacuhs_rs0, llvm::Intrinsic::hexagon_M2_mmacuhs_rs1, llvm::Intrinsic::hexagon_M2_mmacuhs_s0, llvm::Intrinsic::hexagon_M2_mmacuhs_s1, llvm::Intrinsic::hexagon_M2_mmaculs_rs0, llvm::Intrinsic::hexagon_M2_mmaculs_rs1, llvm::Intrinsic::hexagon_M2_mmaculs_s0, llvm::Intrinsic::hexagon_M2_mmaculs_s1, llvm::Intrinsic::hexagon_M2_mmpyh_rs0, llvm::Intrinsic::hexagon_M2_mmpyh_rs1, llvm::Intrinsic::hexagon_M2_mmpyh_s0, llvm::Intrinsic::hexagon_M2_mmpyh_s1, llvm::Intrinsic::hexagon_M2_mmpyl_rs0, llvm::Intrinsic::hexagon_M2_mmpyl_rs1, llvm::Intrinsic::hexagon_M2_mmpyl_s0, llvm::Intrinsic::hexagon_M2_mmpyl_s1, llvm::Intrinsic::hexagon_M2_mmpyuh_rs0, llvm::Intrinsic::hexagon_M2_mmpyuh_rs1, llvm::Intrinsic::hexagon_M2_mmpyuh_s0, llvm::Intrinsic::hexagon_M2_mmpyuh_s1, llvm::Intrinsic::hexagon_M2_mmpyul_rs0, llvm::Intrinsic::hexagon_M2_mmpyul_rs1, llvm::Intrinsic::hexagon_M2_mmpyul_s0, llvm::Intrinsic::hexagon_M2_mmpyul_s1, llvm::Intrinsic::hexagon_M2_mpy_acc_hh_s0, llvm::Intrinsic::hexagon_M2_mpy_acc_hh_s1, llvm::Intrinsic::hexagon_M2_mpy_acc_hl_s0, llvm::Intrinsic::hexagon_M2_mpy_acc_hl_s1, llvm::Intrinsic::hexagon_M2_mpy_acc_lh_s0, llvm::Intrinsic::hexagon_M2_mpy_acc_lh_s1, llvm::Intrinsic::hexagon_M2_mpy_acc_ll_s0, llvm::Intrinsic::hexagon_M2_mpy_acc_ll_s1, llvm::Intrinsic::hexagon_M2_mpy_acc_sat_hh_s0, llvm::Intrinsic::hexagon_M2_mpy_acc_sat_hh_s1, llvm::Intrinsic::hexagon_M2_mpy_acc_sat_hl_s0, llvm::Intrinsic::hexagon_M2_mpy_acc_sat_hl_s1, llvm::Intrinsic::hexagon_M2_mpy_acc_sat_lh_s0, llvm::Intrinsic::hexagon_M2_mpy_acc_sat_lh_s1, llvm::Intrinsic::hexagon_M2_mpy_acc_sat_ll_s0, llvm::Intrinsic::hexagon_M2_mpy_acc_sat_ll_s1, llvm::Intrinsic::hexagon_M2_mpy_hh_s0, llvm::Intrinsic::hexagon_M2_mpy_hh_s1, llvm::Intrinsic::hexagon_M2_mpy_hl_s0, llvm::Intrinsic::hexagon_M2_mpy_hl_s1, llvm::Intrinsic::hexagon_M2_mpy_lh_s0, llvm::Intrinsic::hexagon_M2_mpy_lh_s1, llvm::Intrinsic::hexagon_M2_mpy_ll_s0, llvm::Intrinsic::hexagon_M2_mpy_ll_s1, llvm::Intrinsic::hexagon_M2_mpy_nac_hh_s0, llvm::Intrinsic::hexagon_M2_mpy_nac_hh_s1, llvm::Intrinsic::hexagon_M2_mpy_nac_hl_s0, llvm::Intrinsic::hexagon_M2_mpy_nac_hl_s1, llvm::Intrinsic::hexagon_M2_mpy_nac_lh_s0, llvm::Intrinsic::hexagon_M2_mpy_nac_lh_s1, llvm::Intrinsic::hexagon_M2_mpy_nac_ll_s0, llvm::Intrinsic::hexagon_M2_mpy_nac_ll_s1, llvm::Intrinsic::hexagon_M2_mpy_nac_sat_hh_s0, llvm::Intrinsic::hexagon_M2_mpy_nac_sat_hh_s1, llvm::Intrinsic::hexagon_M2_mpy_nac_sat_hl_s0, llvm::Intrinsic::hexagon_M2_mpy_nac_sat_hl_s1, llvm::Intrinsic::hexagon_M2_mpy_nac_sat_lh_s0, llvm::Intrinsic::hexagon_M2_mpy_nac_sat_lh_s1, llvm::Intrinsic::hexagon_M2_mpy_nac_sat_ll_s0, llvm::Intrinsic::hexagon_M2_mpy_nac_sat_ll_s1, llvm::Intrinsic::hexagon_M2_mpy_rnd_hh_s0, llvm::Intrinsic::hexagon_M2_mpy_rnd_hh_s1, llvm::Intrinsic::hexagon_M2_mpy_rnd_hl_s0, llvm::Intrinsic::hexagon_M2_mpy_rnd_hl_s1, llvm::Intrinsic::hexagon_M2_mpy_rnd_lh_s0, llvm::Intrinsic::hexagon_M2_mpy_rnd_lh_s1, llvm::Intrinsic::hexagon_M2_mpy_rnd_ll_s0, llvm::Intrinsic::hexagon_M2_mpy_rnd_ll_s1, llvm::Intrinsic::hexagon_M2_mpy_sat_hh_s0, llvm::Intrinsic::hexagon_M2_mpy_sat_hh_s1, llvm::Intrinsic::hexagon_M2_mpy_sat_hl_s0, llvm::Intrinsic::hexagon_M2_mpy_sat_hl_s1, llvm::Intrinsic::hexagon_M2_mpy_sat_lh_s0, llvm::Intrinsic::hexagon_M2_mpy_sat_lh_s1, llvm::Intrinsic::hexagon_M2_mpy_sat_ll_s0, llvm::Intrinsic::hexagon_M2_mpy_sat_ll_s1, llvm::Intrinsic::hexagon_M2_mpy_sat_rnd_hh_s0, llvm::Intrinsic::hexagon_M2_mpy_sat_rnd_hh_s1, llvm::Intrinsic::hexagon_M2_mpy_sat_rnd_hl_s0, llvm::Intrinsic::hexagon_M2_mpy_sat_rnd_hl_s1, llvm::Intrinsic::hexagon_M2_mpy_sat_rnd_lh_s0, llvm::Intrinsic::hexagon_M2_mpy_sat_rnd_lh_s1, llvm::Intrinsic::hexagon_M2_mpy_sat_rnd_ll_s0, llvm::Intrinsic::hexagon_M2_mpy_sat_rnd_ll_s1, llvm::Intrinsic::hexagon_M2_mpy_up, llvm::Intrinsic::hexagon_M2_mpy_up_s1, llvm::Intrinsic::hexagon_M2_mpy_up_s1_sat, llvm::Intrinsic::hexagon_M2_mpyd_acc_hh_s0, llvm::Intrinsic::hexagon_M2_mpyd_acc_hh_s1, llvm::Intrinsic::hexagon_M2_mpyd_acc_hl_s0, llvm::Intrinsic::hexagon_M2_mpyd_acc_hl_s1, llvm::Intrinsic::hexagon_M2_mpyd_acc_lh_s0, llvm::Intrinsic::hexagon_M2_mpyd_acc_lh_s1, llvm::Intrinsic::hexagon_M2_mpyd_acc_ll_s0, llvm::Intrinsic::hexagon_M2_mpyd_acc_ll_s1, llvm::Intrinsic::hexagon_M2_mpyd_hh_s0, llvm::Intrinsic::hexagon_M2_mpyd_hh_s1, llvm::Intrinsic::hexagon_M2_mpyd_hl_s0, llvm::Intrinsic::hexagon_M2_mpyd_hl_s1, llvm::Intrinsic::hexagon_M2_mpyd_lh_s0, llvm::Intrinsic::hexagon_M2_mpyd_lh_s1, llvm::Intrinsic::hexagon_M2_mpyd_ll_s0, llvm::Intrinsic::hexagon_M2_mpyd_ll_s1, llvm::Intrinsic::hexagon_M2_mpyd_nac_hh_s0, llvm::Intrinsic::hexagon_M2_mpyd_nac_hh_s1, llvm::Intrinsic::hexagon_M2_mpyd_nac_hl_s0, llvm::Intrinsic::hexagon_M2_mpyd_nac_hl_s1, llvm::Intrinsic::hexagon_M2_mpyd_nac_lh_s0, llvm::Intrinsic::hexagon_M2_mpyd_nac_lh_s1, llvm::Intrinsic::hexagon_M2_mpyd_nac_ll_s0, llvm::Intrinsic::hexagon_M2_mpyd_nac_ll_s1, llvm::Intrinsic::hexagon_M2_mpyd_rnd_hh_s0, llvm::Intrinsic::hexagon_M2_mpyd_rnd_hh_s1, llvm::Intrinsic::hexagon_M2_mpyd_rnd_hl_s0, llvm::Intrinsic::hexagon_M2_mpyd_rnd_hl_s1, llvm::Intrinsic::hexagon_M2_mpyd_rnd_lh_s0, llvm::Intrinsic::hexagon_M2_mpyd_rnd_lh_s1, llvm::Intrinsic::hexagon_M2_mpyd_rnd_ll_s0, llvm::Intrinsic::hexagon_M2_mpyd_rnd_ll_s1, llvm::Intrinsic::hexagon_M2_mpyi, llvm::Intrinsic::hexagon_M2_mpysmi, llvm::Intrinsic::hexagon_M2_mpysu_up, llvm::Intrinsic::hexagon_M2_mpyu_acc_hh_s0, llvm::Intrinsic::hexagon_M2_mpyu_acc_hh_s1, llvm::Intrinsic::hexagon_M2_mpyu_acc_hl_s0, llvm::Intrinsic::hexagon_M2_mpyu_acc_hl_s1, llvm::Intrinsic::hexagon_M2_mpyu_acc_lh_s0, llvm::Intrinsic::hexagon_M2_mpyu_acc_lh_s1, llvm::Intrinsic::hexagon_M2_mpyu_acc_ll_s0, llvm::Intrinsic::hexagon_M2_mpyu_acc_ll_s1, llvm::Intrinsic::hexagon_M2_mpyu_hh_s0, llvm::Intrinsic::hexagon_M2_mpyu_hh_s1, llvm::Intrinsic::hexagon_M2_mpyu_hl_s0, llvm::Intrinsic::hexagon_M2_mpyu_hl_s1, llvm::Intrinsic::hexagon_M2_mpyu_lh_s0, llvm::Intrinsic::hexagon_M2_mpyu_lh_s1, llvm::Intrinsic::hexagon_M2_mpyu_ll_s0, llvm::Intrinsic::hexagon_M2_mpyu_ll_s1, llvm::Intrinsic::hexagon_M2_mpyu_nac_hh_s0, llvm::Intrinsic::hexagon_M2_mpyu_nac_hh_s1, llvm::Intrinsic::hexagon_M2_mpyu_nac_hl_s0, llvm::Intrinsic::hexagon_M2_mpyu_nac_hl_s1, llvm::Intrinsic::hexagon_M2_mpyu_nac_lh_s0, llvm::Intrinsic::hexagon_M2_mpyu_nac_lh_s1, llvm::Intrinsic::hexagon_M2_mpyu_nac_ll_s0, llvm::Intrinsic::hexagon_M2_mpyu_nac_ll_s1, llvm::Intrinsic::hexagon_M2_mpyu_up, llvm::Intrinsic::hexagon_M2_mpyud_acc_hh_s0, llvm::Intrinsic::hexagon_M2_mpyud_acc_hh_s1, llvm::Intrinsic::hexagon_M2_mpyud_acc_hl_s0, llvm::Intrinsic::hexagon_M2_mpyud_acc_hl_s1, llvm::Intrinsic::hexagon_M2_mpyud_acc_lh_s0, llvm::Intrinsic::hexagon_M2_mpyud_acc_lh_s1, llvm::Intrinsic::hexagon_M2_mpyud_acc_ll_s0, llvm::Intrinsic::hexagon_M2_mpyud_acc_ll_s1, llvm::Intrinsic::hexagon_M2_mpyud_hh_s0, llvm::Intrinsic::hexagon_M2_mpyud_hh_s1, llvm::Intrinsic::hexagon_M2_mpyud_hl_s0, llvm::Intrinsic::hexagon_M2_mpyud_hl_s1, llvm::Intrinsic::hexagon_M2_mpyud_lh_s0, llvm::Intrinsic::hexagon_M2_mpyud_lh_s1, llvm::Intrinsic::hexagon_M2_mpyud_ll_s0, llvm::Intrinsic::hexagon_M2_mpyud_ll_s1, llvm::Intrinsic::hexagon_M2_mpyud_nac_hh_s0, llvm::Intrinsic::hexagon_M2_mpyud_nac_hh_s1, llvm::Intrinsic::hexagon_M2_mpyud_nac_hl_s0, llvm::Intrinsic::hexagon_M2_mpyud_nac_hl_s1, llvm::Intrinsic::hexagon_M2_mpyud_nac_lh_s0, llvm::Intrinsic::hexagon_M2_mpyud_nac_lh_s1, llvm::Intrinsic::hexagon_M2_mpyud_nac_ll_s0, llvm::Intrinsic::hexagon_M2_mpyud_nac_ll_s1, llvm::Intrinsic::hexagon_M2_mpyui, llvm::Intrinsic::hexagon_M2_nacci, llvm::Intrinsic::hexagon_M2_naccii, llvm::Intrinsic::hexagon_M2_subacc, llvm::Intrinsic::hexagon_M2_vabsdiffh, llvm::Intrinsic::hexagon_M2_vabsdiffw, llvm::Intrinsic::hexagon_M2_vcmac_s0_sat_i, llvm::Intrinsic::hexagon_M2_vcmac_s0_sat_r, llvm::Intrinsic::hexagon_M2_vcmpy_s0_sat_i, llvm::Intrinsic::hexagon_M2_vcmpy_s0_sat_r, llvm::Intrinsic::hexagon_M2_vcmpy_s1_sat_i, llvm::Intrinsic::hexagon_M2_vcmpy_s1_sat_r, llvm::Intrinsic::hexagon_M2_vdmacs_s0, llvm::Intrinsic::hexagon_M2_vdmacs_s1, llvm::Intrinsic::hexagon_M2_vdmpyrs_s0, llvm::Intrinsic::hexagon_M2_vdmpyrs_s1, llvm::Intrinsic::hexagon_M2_vdmpys_s0, llvm::Intrinsic::hexagon_M2_vdmpys_s1, llvm::Intrinsic::hexagon_M2_vmac2, llvm::Intrinsic::hexagon_M2_vmac2es, llvm::Intrinsic::hexagon_M2_vmac2es_s0, llvm::Intrinsic::hexagon_M2_vmac2es_s1, llvm::Intrinsic::hexagon_M2_vmac2s_s0, llvm::Intrinsic::hexagon_M2_vmac2s_s1, llvm::Intrinsic::hexagon_M2_vmac2su_s0, llvm::Intrinsic::hexagon_M2_vmac2su_s1, llvm::Intrinsic::hexagon_M2_vmpy2es_s0, llvm::Intrinsic::hexagon_M2_vmpy2es_s1, llvm::Intrinsic::hexagon_M2_vmpy2s_s0, llvm::Intrinsic::hexagon_M2_vmpy2s_s0pack, llvm::Intrinsic::hexagon_M2_vmpy2s_s1, llvm::Intrinsic::hexagon_M2_vmpy2s_s1pack, llvm::Intrinsic::hexagon_M2_vmpy2su_s0, llvm::Intrinsic::hexagon_M2_vmpy2su_s1, llvm::Intrinsic::hexagon_M2_vraddh, llvm::Intrinsic::hexagon_M2_vradduh, llvm::Intrinsic::hexagon_M2_vrcmaci_s0, llvm::Intrinsic::hexagon_M2_vrcmaci_s0c, llvm::Intrinsic::hexagon_M2_vrcmacr_s0, llvm::Intrinsic::hexagon_M2_vrcmacr_s0c, llvm::Intrinsic::hexagon_M2_vrcmpyi_s0, llvm::Intrinsic::hexagon_M2_vrcmpyi_s0c, llvm::Intrinsic::hexagon_M2_vrcmpyr_s0, llvm::Intrinsic::hexagon_M2_vrcmpyr_s0c, llvm::Intrinsic::hexagon_M2_vrcmpys_acc_s1, llvm::Intrinsic::hexagon_M2_vrcmpys_s1, llvm::Intrinsic::hexagon_M2_vrcmpys_s1rp, llvm::Intrinsic::hexagon_M2_vrmac_s0, llvm::Intrinsic::hexagon_M2_vrmpy_s0, llvm::Intrinsic::hexagon_M2_xor_xacc, llvm::Intrinsic::hexagon_M4_and_and, llvm::Intrinsic::hexagon_M4_and_andn, llvm::Intrinsic::hexagon_M4_and_or, llvm::Intrinsic::hexagon_M4_and_xor, llvm::Intrinsic::hexagon_M4_cmpyi_wh, llvm::Intrinsic::hexagon_M4_cmpyi_whc, llvm::Intrinsic::hexagon_M4_cmpyr_wh, llvm::Intrinsic::hexagon_M4_cmpyr_whc, llvm::Intrinsic::hexagon_M4_mac_up_s1_sat, llvm::Intrinsic::hexagon_M4_mpyri_addi, llvm::Intrinsic::hexagon_M4_mpyri_addr, llvm::Intrinsic::hexagon_M4_mpyri_addr_u2, llvm::Intrinsic::hexagon_M4_mpyrr_addi, llvm::Intrinsic::hexagon_M4_mpyrr_addr, llvm::Intrinsic::hexagon_M4_nac_up_s1_sat, llvm::Intrinsic::hexagon_M4_or_and, llvm::Intrinsic::hexagon_M4_or_andn, llvm::Intrinsic::hexagon_M4_or_or, llvm::Intrinsic::hexagon_M4_or_xor, llvm::Intrinsic::hexagon_M4_pmpyw, llvm::Intrinsic::hexagon_M4_pmpyw_acc, llvm::Intrinsic::hexagon_M4_vpmpyh, llvm::Intrinsic::hexagon_M4_vpmpyh_acc, llvm::Intrinsic::hexagon_M4_vrmpyeh_acc_s0, llvm::Intrinsic::hexagon_M4_vrmpyeh_acc_s1, llvm::Intrinsic::hexagon_M4_vrmpyeh_s0, llvm::Intrinsic::hexagon_M4_vrmpyeh_s1, llvm::Intrinsic::hexagon_M4_vrmpyoh_acc_s0, llvm::Intrinsic::hexagon_M4_vrmpyoh_acc_s1, llvm::Intrinsic::hexagon_M4_vrmpyoh_s0, llvm::Intrinsic::hexagon_M4_vrmpyoh_s1, llvm::Intrinsic::hexagon_M4_xor_and, llvm::Intrinsic::hexagon_M4_xor_andn, llvm::Intrinsic::hexagon_M4_xor_or, llvm::Intrinsic::hexagon_M4_xor_xacc, llvm::Intrinsic::hexagon_M5_vdmacbsu, llvm::Intrinsic::hexagon_M5_vdmpybsu, llvm::Intrinsic::hexagon_M5_vmacbsu, llvm::Intrinsic::hexagon_M5_vmacbuu, llvm::Intrinsic::hexagon_M5_vmpybsu, llvm::Intrinsic::hexagon_M5_vmpybuu, llvm::Intrinsic::hexagon_M5_vrmacbsu, llvm::Intrinsic::hexagon_M5_vrmacbuu, llvm::Intrinsic::hexagon_M5_vrmpybsu, llvm::Intrinsic::hexagon_M5_vrmpybuu, llvm::Intrinsic::hexagon_S2_addasl_rrri, llvm::Intrinsic::hexagon_S2_asl_i_p, llvm::Intrinsic::hexagon_S2_asl_i_p_acc, llvm::Intrinsic::hexagon_S2_asl_i_p_and, llvm::Intrinsic::hexagon_S2_asl_i_p_nac, llvm::Intrinsic::hexagon_S2_asl_i_p_or, llvm::Intrinsic::hexagon_S2_asl_i_p_xacc, llvm::Intrinsic::hexagon_S2_asl_i_r, llvm::Intrinsic::hexagon_S2_asl_i_r_acc, llvm::Intrinsic::hexagon_S2_asl_i_r_and, llvm::Intrinsic::hexagon_S2_asl_i_r_nac, llvm::Intrinsic::hexagon_S2_asl_i_r_or, llvm::Intrinsic::hexagon_S2_asl_i_r_sat, llvm::Intrinsic::hexagon_S2_asl_i_r_xacc, llvm::Intrinsic::hexagon_S2_asl_i_vh, llvm::Intrinsic::hexagon_S2_asl_i_vw, llvm::Intrinsic::hexagon_S2_asl_r_p, llvm::Intrinsic::hexagon_S2_asl_r_p_acc, llvm::Intrinsic::hexagon_S2_asl_r_p_and, llvm::Intrinsic::hexagon_S2_asl_r_p_nac, llvm::Intrinsic::hexagon_S2_asl_r_p_or, llvm::Intrinsic::hexagon_S2_asl_r_p_xor, llvm::Intrinsic::hexagon_S2_asl_r_r, llvm::Intrinsic::hexagon_S2_asl_r_r_acc, llvm::Intrinsic::hexagon_S2_asl_r_r_and, llvm::Intrinsic::hexagon_S2_asl_r_r_nac, llvm::Intrinsic::hexagon_S2_asl_r_r_or, llvm::Intrinsic::hexagon_S2_asl_r_r_sat, llvm::Intrinsic::hexagon_S2_asl_r_vh, llvm::Intrinsic::hexagon_S2_asl_r_vw, llvm::Intrinsic::hexagon_S2_asr_i_p, llvm::Intrinsic::hexagon_S2_asr_i_p_acc, llvm::Intrinsic::hexagon_S2_asr_i_p_and, llvm::Intrinsic::hexagon_S2_asr_i_p_nac, llvm::Intrinsic::hexagon_S2_asr_i_p_or, llvm::Intrinsic::hexagon_S2_asr_i_p_rnd, llvm::Intrinsic::hexagon_S2_asr_i_p_rnd_goodsyntax, llvm::Intrinsic::hexagon_S2_asr_i_r, llvm::Intrinsic::hexagon_S2_asr_i_r_acc, llvm::Intrinsic::hexagon_S2_asr_i_r_and, llvm::Intrinsic::hexagon_S2_asr_i_r_nac, llvm::Intrinsic::hexagon_S2_asr_i_r_or, llvm::Intrinsic::hexagon_S2_asr_i_r_rnd, llvm::Intrinsic::hexagon_S2_asr_i_r_rnd_goodsyntax, llvm::Intrinsic::hexagon_S2_asr_i_svw_trun, llvm::Intrinsic::hexagon_S2_asr_i_vh, llvm::Intrinsic::hexagon_S2_asr_i_vw, llvm::Intrinsic::hexagon_S2_asr_r_p, llvm::Intrinsic::hexagon_S2_asr_r_p_acc, llvm::Intrinsic::hexagon_S2_asr_r_p_and, llvm::Intrinsic::hexagon_S2_asr_r_p_nac, llvm::Intrinsic::hexagon_S2_asr_r_p_or, llvm::Intrinsic::hexagon_S2_asr_r_p_xor, llvm::Intrinsic::hexagon_S2_asr_r_r, llvm::Intrinsic::hexagon_S2_asr_r_r_acc, llvm::Intrinsic::hexagon_S2_asr_r_r_and, llvm::Intrinsic::hexagon_S2_asr_r_r_nac, llvm::Intrinsic::hexagon_S2_asr_r_r_or, llvm::Intrinsic::hexagon_S2_asr_r_r_sat, llvm::Intrinsic::hexagon_S2_asr_r_svw_trun, llvm::Intrinsic::hexagon_S2_asr_r_vh, llvm::Intrinsic::hexagon_S2_asr_r_vw, llvm::Intrinsic::hexagon_S2_brev, llvm::Intrinsic::hexagon_S2_brevp, llvm::Intrinsic::hexagon_S2_cl0, llvm::Intrinsic::hexagon_S2_cl0p, llvm::Intrinsic::hexagon_S2_cl1, llvm::Intrinsic::hexagon_S2_cl1p, llvm::Intrinsic::hexagon_S2_clb, llvm::Intrinsic::hexagon_S2_clbnorm, llvm::Intrinsic::hexagon_S2_clbp, llvm::Intrinsic::hexagon_S2_clrbit_i, llvm::Intrinsic::hexagon_S2_clrbit_r, llvm::Intrinsic::hexagon_S2_ct0, llvm::Intrinsic::hexagon_S2_ct0p, llvm::Intrinsic::hexagon_S2_ct1, llvm::Intrinsic::hexagon_S2_ct1p, llvm::Intrinsic::hexagon_S2_deinterleave, llvm::Intrinsic::hexagon_S2_extractu, llvm::Intrinsic::hexagon_S2_extractu_rp, llvm::Intrinsic::hexagon_S2_extractup, llvm::Intrinsic::hexagon_S2_extractup_rp, llvm::Intrinsic::hexagon_S2_insert, llvm::Intrinsic::hexagon_S2_insert_rp, llvm::Intrinsic::hexagon_S2_insertp, llvm::Intrinsic::hexagon_S2_insertp_rp, llvm::Intrinsic::hexagon_S2_interleave, llvm::Intrinsic::hexagon_S2_lfsp, llvm::Intrinsic::hexagon_S2_lsl_r_p, llvm::Intrinsic::hexagon_S2_lsl_r_p_acc, llvm::Intrinsic::hexagon_S2_lsl_r_p_and, llvm::Intrinsic::hexagon_S2_lsl_r_p_nac, llvm::Intrinsic::hexagon_S2_lsl_r_p_or, llvm::Intrinsic::hexagon_S2_lsl_r_p_xor, llvm::Intrinsic::hexagon_S2_lsl_r_r, llvm::Intrinsic::hexagon_S2_lsl_r_r_acc, llvm::Intrinsic::hexagon_S2_lsl_r_r_and, llvm::Intrinsic::hexagon_S2_lsl_r_r_nac, llvm::Intrinsic::hexagon_S2_lsl_r_r_or, llvm::Intrinsic::hexagon_S2_lsl_r_vh, llvm::Intrinsic::hexagon_S2_lsl_r_vw, llvm::Intrinsic::hexagon_S2_lsr_i_p, llvm::Intrinsic::hexagon_S2_lsr_i_p_acc, llvm::Intrinsic::hexagon_S2_lsr_i_p_and, llvm::Intrinsic::hexagon_S2_lsr_i_p_nac, llvm::Intrinsic::hexagon_S2_lsr_i_p_or, llvm::Intrinsic::hexagon_S2_lsr_i_p_xacc, llvm::Intrinsic::hexagon_S2_lsr_i_r, llvm::Intrinsic::hexagon_S2_lsr_i_r_acc, llvm::Intrinsic::hexagon_S2_lsr_i_r_and, llvm::Intrinsic::hexagon_S2_lsr_i_r_nac, llvm::Intrinsic::hexagon_S2_lsr_i_r_or, llvm::Intrinsic::hexagon_S2_lsr_i_r_xacc, llvm::Intrinsic::hexagon_S2_lsr_i_vh, llvm::Intrinsic::hexagon_S2_lsr_i_vw, llvm::Intrinsic::hexagon_S2_lsr_r_p, llvm::Intrinsic::hexagon_S2_lsr_r_p_acc, llvm::Intrinsic::hexagon_S2_lsr_r_p_and, llvm::Intrinsic::hexagon_S2_lsr_r_p_nac, llvm::Intrinsic::hexagon_S2_lsr_r_p_or, llvm::Intrinsic::hexagon_S2_lsr_r_p_xor, llvm::Intrinsic::hexagon_S2_lsr_r_r, llvm::Intrinsic::hexagon_S2_lsr_r_r_acc, llvm::Intrinsic::hexagon_S2_lsr_r_r_and, llvm::Intrinsic::hexagon_S2_lsr_r_r_nac, llvm::Intrinsic::hexagon_S2_lsr_r_r_or, llvm::Intrinsic::hexagon_S2_lsr_r_vh, llvm::Intrinsic::hexagon_S2_lsr_r_vw, llvm::Intrinsic::hexagon_S2_packhl, llvm::Intrinsic::hexagon_S2_parityp, llvm::Intrinsic::hexagon_S2_setbit_i, llvm::Intrinsic::hexagon_S2_setbit_r, llvm::Intrinsic::hexagon_S2_shuffeb, llvm::Intrinsic::hexagon_S2_shuffeh, llvm::Intrinsic::hexagon_S2_shuffob, llvm::Intrinsic::hexagon_S2_shuffoh, llvm::Intrinsic::hexagon_S2_svsathb, llvm::Intrinsic::hexagon_S2_svsathub, llvm::Intrinsic::hexagon_S2_tableidxb_goodsyntax, llvm::Intrinsic::hexagon_S2_tableidxd_goodsyntax, llvm::Intrinsic::hexagon_S2_tableidxh_goodsyntax, llvm::Intrinsic::hexagon_S2_tableidxw_goodsyntax, llvm::Intrinsic::hexagon_S2_togglebit_i, llvm::Intrinsic::hexagon_S2_togglebit_r, llvm::Intrinsic::hexagon_S2_tstbit_i, llvm::Intrinsic::hexagon_S2_tstbit_r, llvm::Intrinsic::hexagon_S2_valignib, llvm::Intrinsic::hexagon_S2_valignrb, llvm::Intrinsic::hexagon_S2_vcnegh, llvm::Intrinsic::hexagon_S2_vcrotate, llvm::Intrinsic::hexagon_S2_vrcnegh, llvm::Intrinsic::hexagon_S2_vrndpackwh, llvm::Intrinsic::hexagon_S2_vrndpackwhs, llvm::Intrinsic::hexagon_S2_vsathb, llvm::Intrinsic::hexagon_S2_vsathb_nopack, llvm::Intrinsic::hexagon_S2_vsathub, llvm::Intrinsic::hexagon_S2_vsathub_nopack, llvm::Intrinsic::hexagon_S2_vsatwh, llvm::Intrinsic::hexagon_S2_vsatwh_nopack, llvm::Intrinsic::hexagon_S2_vsatwuh, llvm::Intrinsic::hexagon_S2_vsatwuh_nopack, llvm::Intrinsic::hexagon_S2_vsplatrb, llvm::Intrinsic::hexagon_S2_vsplatrh, llvm::Intrinsic::hexagon_S2_vspliceib, llvm::Intrinsic::hexagon_S2_vsplicerb, llvm::Intrinsic::hexagon_S2_vsxtbh, llvm::Intrinsic::hexagon_S2_vsxthw, llvm::Intrinsic::hexagon_S2_vtrunehb, llvm::Intrinsic::hexagon_S2_vtrunewh, llvm::Intrinsic::hexagon_S2_vtrunohb, llvm::Intrinsic::hexagon_S2_vtrunowh, llvm::Intrinsic::hexagon_S2_vzxtbh, llvm::Intrinsic::hexagon_S2_vzxthw, llvm::Intrinsic::hexagon_S4_addaddi, llvm::Intrinsic::hexagon_S4_addi_asl_ri, llvm::Intrinsic::hexagon_S4_addi_lsr_ri, llvm::Intrinsic::hexagon_S4_andi_asl_ri, llvm::Intrinsic::hexagon_S4_andi_lsr_ri, llvm::Intrinsic::hexagon_S4_clbaddi, llvm::Intrinsic::hexagon_S4_clbpaddi, llvm::Intrinsic::hexagon_S4_clbpnorm, llvm::Intrinsic::hexagon_S4_extract, llvm::Intrinsic::hexagon_S4_extract_rp, llvm::Intrinsic::hexagon_S4_extractp, llvm::Intrinsic::hexagon_S4_extractp_rp, llvm::Intrinsic::hexagon_S4_lsli, llvm::Intrinsic::hexagon_S4_ntstbit_i, llvm::Intrinsic::hexagon_S4_ntstbit_r, llvm::Intrinsic::hexagon_S4_or_andi, llvm::Intrinsic::hexagon_S4_or_andix, llvm::Intrinsic::hexagon_S4_or_ori, llvm::Intrinsic::hexagon_S4_ori_asl_ri, llvm::Intrinsic::hexagon_S4_ori_lsr_ri, llvm::Intrinsic::hexagon_S4_parity, llvm::Intrinsic::hexagon_S4_subaddi, llvm::Intrinsic::hexagon_S4_subi_asl_ri, llvm::Intrinsic::hexagon_S4_subi_lsr_ri, llvm::Intrinsic::hexagon_S4_vrcrotate, llvm::Intrinsic::hexagon_S4_vrcrotate_acc, llvm::Intrinsic::hexagon_S4_vxaddsubh, llvm::Intrinsic::hexagon_S4_vxaddsubhr, llvm::Intrinsic::hexagon_S4_vxaddsubw, llvm::Intrinsic::hexagon_S4_vxsubaddh, llvm::Intrinsic::hexagon_S4_vxsubaddhr, llvm::Intrinsic::hexagon_S4_vxsubaddw, llvm::Intrinsic::hexagon_S5_asrhub_rnd_sat_goodsyntax, llvm::Intrinsic::hexagon_S5_asrhub_sat, llvm::Intrinsic::hexagon_S5_popcountp, llvm::Intrinsic::hexagon_S5_vasrhrnd_goodsyntax, llvm::Intrinsic::hexagon_SI_to_SXTHI_asrh, llvm::Intrinsic::hexagon_circ_ldd, llvm::Intrinsic::init_trampoline, llvm::Intrinsic::invariant_end, llvm::Intrinsic::invariant_start, llvm::Intrinsic::lifetime_end, llvm::Intrinsic::lifetime_start, llvm::Intrinsic::log, llvm::Intrinsic::log10, llvm::Intrinsic::log2, llvm::Intrinsic::longjmp, llvm::Intrinsic::memcpy, llvm::Intrinsic::memmove, llvm::Intrinsic::memset, llvm::Intrinsic::mips_absq_s_ph, llvm::Intrinsic::mips_absq_s_qb, llvm::Intrinsic::mips_absq_s_w, llvm::Intrinsic::mips_add_a_b, llvm::Intrinsic::mips_add_a_d, llvm::Intrinsic::mips_add_a_h, llvm::Intrinsic::mips_add_a_w, llvm::Intrinsic::mips_addq_ph, llvm::Intrinsic::mips_addq_s_ph, llvm::Intrinsic::mips_addq_s_w, llvm::Intrinsic::mips_addqh_ph, llvm::Intrinsic::mips_addqh_r_ph, llvm::Intrinsic::mips_addqh_r_w, llvm::Intrinsic::mips_addqh_w, llvm::Intrinsic::mips_adds_a_b, llvm::Intrinsic::mips_adds_a_d, llvm::Intrinsic::mips_adds_a_h, llvm::Intrinsic::mips_adds_a_w, llvm::Intrinsic::mips_adds_s_b, llvm::Intrinsic::mips_adds_s_d, llvm::Intrinsic::mips_adds_s_h, llvm::Intrinsic::mips_adds_s_w, llvm::Intrinsic::mips_adds_u_b, llvm::Intrinsic::mips_adds_u_d, llvm::Intrinsic::mips_adds_u_h, llvm::Intrinsic::mips_adds_u_w, llvm::Intrinsic::mips_addsc, llvm::Intrinsic::mips_addu_ph, llvm::Intrinsic::mips_addu_qb, llvm::Intrinsic::mips_addu_s_ph, llvm::Intrinsic::mips_addu_s_qb, llvm::Intrinsic::mips_adduh_qb, llvm::Intrinsic::mips_adduh_r_qb, llvm::Intrinsic::mips_addv_b, llvm::Intrinsic::mips_addv_d, llvm::Intrinsic::mips_addv_h, llvm::Intrinsic::mips_addv_w, llvm::Intrinsic::mips_addvi_b, llvm::Intrinsic::mips_addvi_d, llvm::Intrinsic::mips_addvi_h, llvm::Intrinsic::mips_addvi_w, llvm::Intrinsic::mips_addwc, llvm::Intrinsic::mips_and_v, llvm::Intrinsic::mips_andi_b, llvm::Intrinsic::mips_append, llvm::Intrinsic::mips_asub_s_b, llvm::Intrinsic::mips_asub_s_d, llvm::Intrinsic::mips_asub_s_h, llvm::Intrinsic::mips_asub_s_w, llvm::Intrinsic::mips_asub_u_b, llvm::Intrinsic::mips_asub_u_d, llvm::Intrinsic::mips_asub_u_h, llvm::Intrinsic::mips_asub_u_w, llvm::Intrinsic::mips_ave_s_b, llvm::Intrinsic::mips_ave_s_d, llvm::Intrinsic::mips_ave_s_h, llvm::Intrinsic::mips_ave_s_w, llvm::Intrinsic::mips_ave_u_b, llvm::Intrinsic::mips_ave_u_d, llvm::Intrinsic::mips_ave_u_h, llvm::Intrinsic::mips_ave_u_w, llvm::Intrinsic::mips_aver_s_b, llvm::Intrinsic::mips_aver_s_d, llvm::Intrinsic::mips_aver_s_h, llvm::Intrinsic::mips_aver_s_w, llvm::Intrinsic::mips_aver_u_b, llvm::Intrinsic::mips_aver_u_d, llvm::Intrinsic::mips_aver_u_h, llvm::Intrinsic::mips_aver_u_w, llvm::Intrinsic::mips_balign, llvm::Intrinsic::mips_bclr_b, llvm::Intrinsic::mips_bclr_d, llvm::Intrinsic::mips_bclr_h, llvm::Intrinsic::mips_bclr_w, llvm::Intrinsic::mips_bclri_b, llvm::Intrinsic::mips_bclri_d, llvm::Intrinsic::mips_bclri_h, llvm::Intrinsic::mips_bclri_w, llvm::Intrinsic::mips_binsl_b, llvm::Intrinsic::mips_binsl_d, llvm::Intrinsic::mips_binsl_h, llvm::Intrinsic::mips_binsl_w, llvm::Intrinsic::mips_binsli_b, llvm::Intrinsic::mips_binsli_d, llvm::Intrinsic::mips_binsli_h, llvm::Intrinsic::mips_binsli_w, llvm::Intrinsic::mips_binsr_b, llvm::Intrinsic::mips_binsr_d, llvm::Intrinsic::mips_binsr_h, llvm::Intrinsic::mips_binsr_w, llvm::Intrinsic::mips_binsri_b, llvm::Intrinsic::mips_binsri_d, llvm::Intrinsic::mips_binsri_h, llvm::Intrinsic::mips_binsri_w, llvm::Intrinsic::mips_bitrev, llvm::Intrinsic::mips_bmnz_v, llvm::Intrinsic::mips_bmnzi_b, llvm::Intrinsic::mips_bmz_v, llvm::Intrinsic::mips_bmzi_b, llvm::Intrinsic::mips_bneg_b, llvm::Intrinsic::mips_bneg_d, llvm::Intrinsic::mips_bneg_h, llvm::Intrinsic::mips_bneg_w, llvm::Intrinsic::mips_bnegi_b, llvm::Intrinsic::mips_bnegi_d, llvm::Intrinsic::mips_bnegi_h, llvm::Intrinsic::mips_bnegi_w, llvm::Intrinsic::mips_bnz_b, llvm::Intrinsic::mips_bnz_d, llvm::Intrinsic::mips_bnz_h, llvm::Intrinsic::mips_bnz_v, llvm::Intrinsic::mips_bnz_w, llvm::Intrinsic::mips_bposge32, llvm::Intrinsic::mips_bsel_v, llvm::Intrinsic::mips_bseli_b, llvm::Intrinsic::mips_bset_b, llvm::Intrinsic::mips_bset_d, llvm::Intrinsic::mips_bset_h, llvm::Intrinsic::mips_bset_w, llvm::Intrinsic::mips_bseti_b, llvm::Intrinsic::mips_bseti_d, llvm::Intrinsic::mips_bseti_h, llvm::Intrinsic::mips_bseti_w, llvm::Intrinsic::mips_bz_b, llvm::Intrinsic::mips_bz_d, llvm::Intrinsic::mips_bz_h, llvm::Intrinsic::mips_bz_v, llvm::Intrinsic::mips_bz_w, llvm::Intrinsic::mips_ceq_b, llvm::Intrinsic::mips_ceq_d, llvm::Intrinsic::mips_ceq_h, llvm::Intrinsic::mips_ceq_w, llvm::Intrinsic::mips_ceqi_b, llvm::Intrinsic::mips_ceqi_d, llvm::Intrinsic::mips_ceqi_h, llvm::Intrinsic::mips_ceqi_w, llvm::Intrinsic::mips_cfcmsa, llvm::Intrinsic::mips_cle_s_b, llvm::Intrinsic::mips_cle_s_d, llvm::Intrinsic::mips_cle_s_h, llvm::Intrinsic::mips_cle_s_w, llvm::Intrinsic::mips_cle_u_b, llvm::Intrinsic::mips_cle_u_d, llvm::Intrinsic::mips_cle_u_h, llvm::Intrinsic::mips_cle_u_w, llvm::Intrinsic::mips_clei_s_b, llvm::Intrinsic::mips_clei_s_d, llvm::Intrinsic::mips_clei_s_h, llvm::Intrinsic::mips_clei_s_w, llvm::Intrinsic::mips_clei_u_b, llvm::Intrinsic::mips_clei_u_d, llvm::Intrinsic::mips_clei_u_h, llvm::Intrinsic::mips_clei_u_w, llvm::Intrinsic::mips_clt_s_b, llvm::Intrinsic::mips_clt_s_d, llvm::Intrinsic::mips_clt_s_h, llvm::Intrinsic::mips_clt_s_w, llvm::Intrinsic::mips_clt_u_b, llvm::Intrinsic::mips_clt_u_d, llvm::Intrinsic::mips_clt_u_h, llvm::Intrinsic::mips_clt_u_w, llvm::Intrinsic::mips_clti_s_b, llvm::Intrinsic::mips_clti_s_d, llvm::Intrinsic::mips_clti_s_h, llvm::Intrinsic::mips_clti_s_w, llvm::Intrinsic::mips_clti_u_b, llvm::Intrinsic::mips_clti_u_d, llvm::Intrinsic::mips_clti_u_h, llvm::Intrinsic::mips_clti_u_w, llvm::Intrinsic::mips_cmp_eq_ph, llvm::Intrinsic::mips_cmp_le_ph, llvm::Intrinsic::mips_cmp_lt_ph, llvm::Intrinsic::mips_cmpgdu_eq_qb, llvm::Intrinsic::mips_cmpgdu_le_qb, llvm::Intrinsic::mips_cmpgdu_lt_qb, llvm::Intrinsic::mips_cmpgu_eq_qb, llvm::Intrinsic::mips_cmpgu_le_qb, llvm::Intrinsic::mips_cmpgu_lt_qb, llvm::Intrinsic::mips_cmpu_eq_qb, llvm::Intrinsic::mips_cmpu_le_qb, llvm::Intrinsic::mips_cmpu_lt_qb, llvm::Intrinsic::mips_copy_s_b, llvm::Intrinsic::mips_copy_s_d, llvm::Intrinsic::mips_copy_s_h, llvm::Intrinsic::mips_copy_s_w, llvm::Intrinsic::mips_copy_u_b, llvm::Intrinsic::mips_copy_u_d, llvm::Intrinsic::mips_copy_u_h, llvm::Intrinsic::mips_copy_u_w, llvm::Intrinsic::mips_ctcmsa, llvm::Intrinsic::mips_div_s_b, llvm::Intrinsic::mips_div_s_d, llvm::Intrinsic::mips_div_s_h, llvm::Intrinsic::mips_div_s_w, llvm::Intrinsic::mips_div_u_b, llvm::Intrinsic::mips_div_u_d, llvm::Intrinsic::mips_div_u_h, llvm::Intrinsic::mips_div_u_w, llvm::Intrinsic::mips_dotp_s_d, llvm::Intrinsic::mips_dotp_s_h, llvm::Intrinsic::mips_dotp_s_w, llvm::Intrinsic::mips_dotp_u_d, llvm::Intrinsic::mips_dotp_u_h, llvm::Intrinsic::mips_dotp_u_w, llvm::Intrinsic::mips_dpa_w_ph, llvm::Intrinsic::mips_dpadd_s_d, llvm::Intrinsic::mips_dpadd_s_h, llvm::Intrinsic::mips_dpadd_s_w, llvm::Intrinsic::mips_dpadd_u_d, llvm::Intrinsic::mips_dpadd_u_h, llvm::Intrinsic::mips_dpadd_u_w, llvm::Intrinsic::mips_dpaq_s_w_ph, llvm::Intrinsic::mips_dpaq_sa_l_w, llvm::Intrinsic::mips_dpaqx_s_w_ph, llvm::Intrinsic::mips_dpaqx_sa_w_ph, llvm::Intrinsic::mips_dpau_h_qbl, llvm::Intrinsic::mips_dpau_h_qbr, llvm::Intrinsic::mips_dpax_w_ph, llvm::Intrinsic::mips_dps_w_ph, llvm::Intrinsic::mips_dpsq_s_w_ph, llvm::Intrinsic::mips_dpsq_sa_l_w, llvm::Intrinsic::mips_dpsqx_s_w_ph, llvm::Intrinsic::mips_dpsqx_sa_w_ph, llvm::Intrinsic::mips_dpsu_h_qbl, llvm::Intrinsic::mips_dpsu_h_qbr, llvm::Intrinsic::mips_dpsub_s_d, llvm::Intrinsic::mips_dpsub_s_h, llvm::Intrinsic::mips_dpsub_s_w, llvm::Intrinsic::mips_dpsub_u_d, llvm::Intrinsic::mips_dpsub_u_h, llvm::Intrinsic::mips_dpsub_u_w, llvm::Intrinsic::mips_dpsx_w_ph, llvm::Intrinsic::mips_extp, llvm::Intrinsic::mips_extpdp, llvm::Intrinsic::mips_extr_r_w, llvm::Intrinsic::mips_extr_rs_w, llvm::Intrinsic::mips_extr_s_h, llvm::Intrinsic::mips_extr_w, llvm::Intrinsic::mips_fadd_d, llvm::Intrinsic::mips_fadd_w, llvm::Intrinsic::mips_fcaf_d, llvm::Intrinsic::mips_fcaf_w, llvm::Intrinsic::mips_fceq_d, llvm::Intrinsic::mips_fceq_w, llvm::Intrinsic::mips_fclass_d, llvm::Intrinsic::mips_fclass_w, llvm::Intrinsic::mips_fcle_d, llvm::Intrinsic::mips_fcle_w, llvm::Intrinsic::mips_fclt_d, llvm::Intrinsic::mips_fclt_w, llvm::Intrinsic::mips_fcne_d, llvm::Intrinsic::mips_fcne_w, llvm::Intrinsic::mips_fcor_d, llvm::Intrinsic::mips_fcor_w, llvm::Intrinsic::mips_fcueq_d, llvm::Intrinsic::mips_fcueq_w, llvm::Intrinsic::mips_fcule_d, llvm::Intrinsic::mips_fcule_w, llvm::Intrinsic::mips_fcult_d, llvm::Intrinsic::mips_fcult_w, llvm::Intrinsic::mips_fcun_d, llvm::Intrinsic::mips_fcun_w, llvm::Intrinsic::mips_fcune_d, llvm::Intrinsic::mips_fcune_w, llvm::Intrinsic::mips_fdiv_d, llvm::Intrinsic::mips_fdiv_w, llvm::Intrinsic::mips_fexdo_h, llvm::Intrinsic::mips_fexdo_w, llvm::Intrinsic::mips_fexp2_d, llvm::Intrinsic::mips_fexp2_w, llvm::Intrinsic::mips_fexupl_d, llvm::Intrinsic::mips_fexupl_w, llvm::Intrinsic::mips_fexupr_d, llvm::Intrinsic::mips_fexupr_w, llvm::Intrinsic::mips_ffint_s_d, llvm::Intrinsic::mips_ffint_s_w, llvm::Intrinsic::mips_ffint_u_d, llvm::Intrinsic::mips_ffint_u_w, llvm::Intrinsic::mips_ffql_d, llvm::Intrinsic::mips_ffql_w, llvm::Intrinsic::mips_ffqr_d, llvm::Intrinsic::mips_ffqr_w, llvm::Intrinsic::mips_fill_b, llvm::Intrinsic::mips_fill_d, llvm::Intrinsic::mips_fill_h, llvm::Intrinsic::mips_fill_w, llvm::Intrinsic::mips_flog2_d, llvm::Intrinsic::mips_flog2_w, llvm::Intrinsic::mips_fmadd_d, llvm::Intrinsic::mips_fmadd_w, llvm::Intrinsic::mips_fmax_a_d, llvm::Intrinsic::mips_fmax_a_w, llvm::Intrinsic::mips_fmax_d, llvm::Intrinsic::mips_fmax_w, llvm::Intrinsic::mips_fmin_a_d, llvm::Intrinsic::mips_fmin_a_w, llvm::Intrinsic::mips_fmin_d, llvm::Intrinsic::mips_fmin_w, llvm::Intrinsic::mips_fmsub_d, llvm::Intrinsic::mips_fmsub_w, llvm::Intrinsic::mips_fmul_d, llvm::Intrinsic::mips_fmul_w, llvm::Intrinsic::mips_frcp_d, llvm::Intrinsic::mips_frcp_w, llvm::Intrinsic::mips_frint_d, llvm::Intrinsic::mips_frint_w, llvm::Intrinsic::mips_frsqrt_d, llvm::Intrinsic::mips_frsqrt_w, llvm::Intrinsic::mips_fsaf_d, llvm::Intrinsic::mips_fsaf_w, llvm::Intrinsic::mips_fseq_d, llvm::Intrinsic::mips_fseq_w, llvm::Intrinsic::mips_fsle_d, llvm::Intrinsic::mips_fsle_w, llvm::Intrinsic::mips_fslt_d, llvm::Intrinsic::mips_fslt_w, llvm::Intrinsic::mips_fsne_d, llvm::Intrinsic::mips_fsne_w, llvm::Intrinsic::mips_fsor_d, llvm::Intrinsic::mips_fsor_w, llvm::Intrinsic::mips_fsqrt_d, llvm::Intrinsic::mips_fsqrt_w, llvm::Intrinsic::mips_fsub_d, llvm::Intrinsic::mips_fsub_w, llvm::Intrinsic::mips_fsueq_d, llvm::Intrinsic::mips_fsueq_w, llvm::Intrinsic::mips_fsule_d, llvm::Intrinsic::mips_fsule_w, llvm::Intrinsic::mips_fsult_d, llvm::Intrinsic::mips_fsult_w, llvm::Intrinsic::mips_fsun_d, llvm::Intrinsic::mips_fsun_w, llvm::Intrinsic::mips_fsune_d, llvm::Intrinsic::mips_fsune_w, llvm::Intrinsic::mips_ftint_s_d, llvm::Intrinsic::mips_ftint_s_w, llvm::Intrinsic::mips_ftint_u_d, llvm::Intrinsic::mips_ftint_u_w, llvm::Intrinsic::mips_ftq_h, llvm::Intrinsic::mips_ftq_w, llvm::Intrinsic::mips_ftrunc_s_d, llvm::Intrinsic::mips_ftrunc_s_w, llvm::Intrinsic::mips_ftrunc_u_d, llvm::Intrinsic::mips_ftrunc_u_w, llvm::Intrinsic::mips_hadd_s_d, llvm::Intrinsic::mips_hadd_s_h, llvm::Intrinsic::mips_hadd_s_w, llvm::Intrinsic::mips_hadd_u_d, llvm::Intrinsic::mips_hadd_u_h, llvm::Intrinsic::mips_hadd_u_w, llvm::Intrinsic::mips_hsub_s_d, llvm::Intrinsic::mips_hsub_s_h, llvm::Intrinsic::mips_hsub_s_w, llvm::Intrinsic::mips_hsub_u_d, llvm::Intrinsic::mips_hsub_u_h, llvm::Intrinsic::mips_hsub_u_w, llvm::Intrinsic::mips_ilvev_b, llvm::Intrinsic::mips_ilvev_d, llvm::Intrinsic::mips_ilvev_h, llvm::Intrinsic::mips_ilvev_w, llvm::Intrinsic::mips_ilvl_b, llvm::Intrinsic::mips_ilvl_d, llvm::Intrinsic::mips_ilvl_h, llvm::Intrinsic::mips_ilvl_w, llvm::Intrinsic::mips_ilvod_b, llvm::Intrinsic::mips_ilvod_d, llvm::Intrinsic::mips_ilvod_h, llvm::Intrinsic::mips_ilvod_w, llvm::Intrinsic::mips_ilvr_b, llvm::Intrinsic::mips_ilvr_d, llvm::Intrinsic::mips_ilvr_h, llvm::Intrinsic::mips_ilvr_w, llvm::Intrinsic::mips_insert_b, llvm::Intrinsic::mips_insert_d, llvm::Intrinsic::mips_insert_h, llvm::Intrinsic::mips_insert_w, llvm::Intrinsic::mips_insv, llvm::Intrinsic::mips_insve_b, llvm::Intrinsic::mips_insve_d, llvm::Intrinsic::mips_insve_h, llvm::Intrinsic::mips_insve_w, llvm::Intrinsic::mips_lbux, llvm::Intrinsic::mips_ld_b, llvm::Intrinsic::mips_ld_d, llvm::Intrinsic::mips_ld_h, llvm::Intrinsic::mips_ld_w, llvm::Intrinsic::mips_ldi_b, llvm::Intrinsic::mips_ldi_d, llvm::Intrinsic::mips_ldi_h, llvm::Intrinsic::mips_ldi_w, llvm::Intrinsic::mips_lhx, llvm::Intrinsic::mips_lsa, llvm::Intrinsic::mips_lwx, llvm::Intrinsic::mips_madd, llvm::Intrinsic::mips_madd_q_h, llvm::Intrinsic::mips_madd_q_w, llvm::Intrinsic::mips_maddr_q_h, llvm::Intrinsic::mips_maddr_q_w, llvm::Intrinsic::mips_maddu, llvm::Intrinsic::mips_maddv_b, llvm::Intrinsic::mips_maddv_d, llvm::Intrinsic::mips_maddv_h, llvm::Intrinsic::mips_maddv_w, llvm::Intrinsic::mips_maq_s_w_phl, llvm::Intrinsic::mips_maq_s_w_phr, llvm::Intrinsic::mips_maq_sa_w_phl, llvm::Intrinsic::mips_maq_sa_w_phr, llvm::Intrinsic::mips_max_a_b, llvm::Intrinsic::mips_max_a_d, llvm::Intrinsic::mips_max_a_h, llvm::Intrinsic::mips_max_a_w, llvm::Intrinsic::mips_max_s_b, llvm::Intrinsic::mips_max_s_d, llvm::Intrinsic::mips_max_s_h, llvm::Intrinsic::mips_max_s_w, llvm::Intrinsic::mips_max_u_b, llvm::Intrinsic::mips_max_u_d, llvm::Intrinsic::mips_max_u_h, llvm::Intrinsic::mips_max_u_w, llvm::Intrinsic::mips_maxi_s_b, llvm::Intrinsic::mips_maxi_s_d, llvm::Intrinsic::mips_maxi_s_h, llvm::Intrinsic::mips_maxi_s_w, llvm::Intrinsic::mips_maxi_u_b, llvm::Intrinsic::mips_maxi_u_d, llvm::Intrinsic::mips_maxi_u_h, llvm::Intrinsic::mips_maxi_u_w, llvm::Intrinsic::mips_min_a_b, llvm::Intrinsic::mips_min_a_d, llvm::Intrinsic::mips_min_a_h, llvm::Intrinsic::mips_min_a_w, llvm::Intrinsic::mips_min_s_b, llvm::Intrinsic::mips_min_s_d, llvm::Intrinsic::mips_min_s_h, llvm::Intrinsic::mips_min_s_w, llvm::Intrinsic::mips_min_u_b, llvm::Intrinsic::mips_min_u_d, llvm::Intrinsic::mips_min_u_h, llvm::Intrinsic::mips_min_u_w, llvm::Intrinsic::mips_mini_s_b, llvm::Intrinsic::mips_mini_s_d, llvm::Intrinsic::mips_mini_s_h, llvm::Intrinsic::mips_mini_s_w, llvm::Intrinsic::mips_mini_u_b, llvm::Intrinsic::mips_mini_u_d, llvm::Intrinsic::mips_mini_u_h, llvm::Intrinsic::mips_mini_u_w, llvm::Intrinsic::mips_mod_s_b, llvm::Intrinsic::mips_mod_s_d, llvm::Intrinsic::mips_mod_s_h, llvm::Intrinsic::mips_mod_s_w, llvm::Intrinsic::mips_mod_u_b, llvm::Intrinsic::mips_mod_u_d, llvm::Intrinsic::mips_mod_u_h, llvm::Intrinsic::mips_mod_u_w, llvm::Intrinsic::mips_modsub, llvm::Intrinsic::mips_move_v, llvm::Intrinsic::mips_msub, llvm::Intrinsic::mips_msub_q_h, llvm::Intrinsic::mips_msub_q_w, llvm::Intrinsic::mips_msubr_q_h, llvm::Intrinsic::mips_msubr_q_w, llvm::Intrinsic::mips_msubu, llvm::Intrinsic::mips_msubv_b, llvm::Intrinsic::mips_msubv_d, llvm::Intrinsic::mips_msubv_h, llvm::Intrinsic::mips_msubv_w, llvm::Intrinsic::mips_mthlip, llvm::Intrinsic::mips_mul_ph, llvm::Intrinsic::mips_mul_q_h, llvm::Intrinsic::mips_mul_q_w, llvm::Intrinsic::mips_mul_s_ph, llvm::Intrinsic::mips_muleq_s_w_phl, llvm::Intrinsic::mips_muleq_s_w_phr, llvm::Intrinsic::mips_muleu_s_ph_qbl, llvm::Intrinsic::mips_muleu_s_ph_qbr, llvm::Intrinsic::mips_mulq_rs_ph, llvm::Intrinsic::mips_mulq_rs_w, llvm::Intrinsic::mips_mulq_s_ph, llvm::Intrinsic::mips_mulq_s_w, llvm::Intrinsic::mips_mulr_q_h, llvm::Intrinsic::mips_mulr_q_w, llvm::Intrinsic::mips_mulsa_w_ph, llvm::Intrinsic::mips_mulsaq_s_w_ph, llvm::Intrinsic::mips_mult, llvm::Intrinsic::mips_multu, llvm::Intrinsic::mips_mulv_b, llvm::Intrinsic::mips_mulv_d, llvm::Intrinsic::mips_mulv_h, llvm::Intrinsic::mips_mulv_w, llvm::Intrinsic::mips_nloc_b, llvm::Intrinsic::mips_nloc_d, llvm::Intrinsic::mips_nloc_h, llvm::Intrinsic::mips_nloc_w, llvm::Intrinsic::mips_nlzc_b, llvm::Intrinsic::mips_nlzc_d, llvm::Intrinsic::mips_nlzc_h, llvm::Intrinsic::mips_nlzc_w, llvm::Intrinsic::mips_nor_v, llvm::Intrinsic::mips_nori_b, llvm::Intrinsic::mips_or_v, llvm::Intrinsic::mips_ori_b, llvm::Intrinsic::mips_packrl_ph, llvm::Intrinsic::mips_pckev_b, llvm::Intrinsic::mips_pckev_d, llvm::Intrinsic::mips_pckev_h, llvm::Intrinsic::mips_pckev_w, llvm::Intrinsic::mips_pckod_b, llvm::Intrinsic::mips_pckod_d, llvm::Intrinsic::mips_pckod_h, llvm::Intrinsic::mips_pckod_w, llvm::Intrinsic::mips_pcnt_b, llvm::Intrinsic::mips_pcnt_d, llvm::Intrinsic::mips_pcnt_h, llvm::Intrinsic::mips_pcnt_w, llvm::Intrinsic::mips_pick_ph, llvm::Intrinsic::mips_pick_qb, llvm::Intrinsic::mips_preceq_w_phl, llvm::Intrinsic::mips_preceq_w_phr, llvm::Intrinsic::mips_precequ_ph_qbl, llvm::Intrinsic::mips_precequ_ph_qbla, llvm::Intrinsic::mips_precequ_ph_qbr, llvm::Intrinsic::mips_precequ_ph_qbra, llvm::Intrinsic::mips_preceu_ph_qbl, llvm::Intrinsic::mips_preceu_ph_qbla, llvm::Intrinsic::mips_preceu_ph_qbr, llvm::Intrinsic::mips_preceu_ph_qbra, llvm::Intrinsic::mips_precr_qb_ph, llvm::Intrinsic::mips_precr_sra_ph_w, llvm::Intrinsic::mips_precr_sra_r_ph_w, llvm::Intrinsic::mips_precrq_ph_w, llvm::Intrinsic::mips_precrq_qb_ph, llvm::Intrinsic::mips_precrq_rs_ph_w, llvm::Intrinsic::mips_precrqu_s_qb_ph, llvm::Intrinsic::mips_prepend, llvm::Intrinsic::mips_raddu_w_qb, llvm::Intrinsic::mips_rddsp, llvm::Intrinsic::mips_repl_ph, llvm::Intrinsic::mips_repl_qb, llvm::Intrinsic::mips_sat_s_b, llvm::Intrinsic::mips_sat_s_d, llvm::Intrinsic::mips_sat_s_h, llvm::Intrinsic::mips_sat_s_w, llvm::Intrinsic::mips_sat_u_b, llvm::Intrinsic::mips_sat_u_d, llvm::Intrinsic::mips_sat_u_h, llvm::Intrinsic::mips_sat_u_w, llvm::Intrinsic::mips_shf_b, llvm::Intrinsic::mips_shf_h, llvm::Intrinsic::mips_shf_w, llvm::Intrinsic::mips_shilo, llvm::Intrinsic::mips_shll_ph, llvm::Intrinsic::mips_shll_qb, llvm::Intrinsic::mips_shll_s_ph, llvm::Intrinsic::mips_shll_s_w, llvm::Intrinsic::mips_shra_ph, llvm::Intrinsic::mips_shra_qb, llvm::Intrinsic::mips_shra_r_ph, llvm::Intrinsic::mips_shra_r_qb, llvm::Intrinsic::mips_shra_r_w, llvm::Intrinsic::mips_shrl_ph, llvm::Intrinsic::mips_shrl_qb, llvm::Intrinsic::mips_sld_b, llvm::Intrinsic::mips_sld_d, llvm::Intrinsic::mips_sld_h, llvm::Intrinsic::mips_sld_w, llvm::Intrinsic::mips_sldi_b, llvm::Intrinsic::mips_sldi_d, llvm::Intrinsic::mips_sldi_h, llvm::Intrinsic::mips_sldi_w, llvm::Intrinsic::mips_sll_b, llvm::Intrinsic::mips_sll_d, llvm::Intrinsic::mips_sll_h, llvm::Intrinsic::mips_sll_w, llvm::Intrinsic::mips_slli_b, llvm::Intrinsic::mips_slli_d, llvm::Intrinsic::mips_slli_h, llvm::Intrinsic::mips_slli_w, llvm::Intrinsic::mips_splat_b, llvm::Intrinsic::mips_splat_d, llvm::Intrinsic::mips_splat_h, llvm::Intrinsic::mips_splat_w, llvm::Intrinsic::mips_splati_b, llvm::Intrinsic::mips_splati_d, llvm::Intrinsic::mips_splati_h, llvm::Intrinsic::mips_splati_w, llvm::Intrinsic::mips_sra_b, llvm::Intrinsic::mips_sra_d, llvm::Intrinsic::mips_sra_h, llvm::Intrinsic::mips_sra_w, llvm::Intrinsic::mips_srai_b, llvm::Intrinsic::mips_srai_d, llvm::Intrinsic::mips_srai_h, llvm::Intrinsic::mips_srai_w, llvm::Intrinsic::mips_srar_b, llvm::Intrinsic::mips_srar_d, llvm::Intrinsic::mips_srar_h, llvm::Intrinsic::mips_srar_w, llvm::Intrinsic::mips_srari_b, llvm::Intrinsic::mips_srari_d, llvm::Intrinsic::mips_srari_h, llvm::Intrinsic::mips_srari_w, llvm::Intrinsic::mips_srl_b, llvm::Intrinsic::mips_srl_d, llvm::Intrinsic::mips_srl_h, llvm::Intrinsic::mips_srl_w, llvm::Intrinsic::mips_srli_b, llvm::Intrinsic::mips_srli_d, llvm::Intrinsic::mips_srli_h, llvm::Intrinsic::mips_srli_w, llvm::Intrinsic::mips_srlr_b, llvm::Intrinsic::mips_srlr_d, llvm::Intrinsic::mips_srlr_h, llvm::Intrinsic::mips_srlr_w, llvm::Intrinsic::mips_srlri_b, llvm::Intrinsic::mips_srlri_d, llvm::Intrinsic::mips_srlri_h, llvm::Intrinsic::mips_srlri_w, llvm::Intrinsic::mips_st_b, llvm::Intrinsic::mips_st_d, llvm::Intrinsic::mips_st_h, llvm::Intrinsic::mips_st_w, llvm::Intrinsic::mips_subq_ph, llvm::Intrinsic::mips_subq_s_ph, llvm::Intrinsic::mips_subq_s_w, llvm::Intrinsic::mips_subqh_ph, llvm::Intrinsic::mips_subqh_r_ph, llvm::Intrinsic::mips_subqh_r_w, llvm::Intrinsic::mips_subqh_w, llvm::Intrinsic::mips_subs_s_b, llvm::Intrinsic::mips_subs_s_d, llvm::Intrinsic::mips_subs_s_h, llvm::Intrinsic::mips_subs_s_w, llvm::Intrinsic::mips_subs_u_b, llvm::Intrinsic::mips_subs_u_d, llvm::Intrinsic::mips_subs_u_h, llvm::Intrinsic::mips_subs_u_w, llvm::Intrinsic::mips_subsus_u_b, llvm::Intrinsic::mips_subsus_u_d, llvm::Intrinsic::mips_subsus_u_h, llvm::Intrinsic::mips_subsus_u_w, llvm::Intrinsic::mips_subsuu_s_b, llvm::Intrinsic::mips_subsuu_s_d, llvm::Intrinsic::mips_subsuu_s_h, llvm::Intrinsic::mips_subsuu_s_w, llvm::Intrinsic::mips_subu_ph, llvm::Intrinsic::mips_subu_qb, llvm::Intrinsic::mips_subu_s_ph, llvm::Intrinsic::mips_subu_s_qb, llvm::Intrinsic::mips_subuh_qb, llvm::Intrinsic::mips_subuh_r_qb, llvm::Intrinsic::mips_subv_b, llvm::Intrinsic::mips_subv_d, llvm::Intrinsic::mips_subv_h, llvm::Intrinsic::mips_subv_w, llvm::Intrinsic::mips_subvi_b, llvm::Intrinsic::mips_subvi_d, llvm::Intrinsic::mips_subvi_h, llvm::Intrinsic::mips_subvi_w, llvm::Intrinsic::mips_vshf_b, llvm::Intrinsic::mips_vshf_d, llvm::Intrinsic::mips_vshf_h, llvm::Intrinsic::mips_vshf_w, llvm::Intrinsic::mips_wrdsp, llvm::Intrinsic::mips_xor_v, llvm::Intrinsic::mips_xori_b, llvm::Intrinsic::nearbyint, llvm::Intrinsic::nvvm_abs_i, llvm::Intrinsic::nvvm_abs_ll, llvm::Intrinsic::nvvm_add_rm_d, llvm::Intrinsic::nvvm_add_rm_f, llvm::Intrinsic::nvvm_add_rm_ftz_f, llvm::Intrinsic::nvvm_add_rn_d, llvm::Intrinsic::nvvm_add_rn_f, llvm::Intrinsic::nvvm_add_rn_ftz_f, llvm::Intrinsic::nvvm_add_rp_d, llvm::Intrinsic::nvvm_add_rp_f, llvm::Intrinsic::nvvm_add_rp_ftz_f, llvm::Intrinsic::nvvm_add_rz_d, llvm::Intrinsic::nvvm_add_rz_f, llvm::Intrinsic::nvvm_add_rz_ftz_f, llvm::Intrinsic::nvvm_atomic_load_add_f32, llvm::Intrinsic::nvvm_atomic_load_dec_32, llvm::Intrinsic::nvvm_atomic_load_inc_32, llvm::Intrinsic::nvvm_barrier0, llvm::Intrinsic::nvvm_barrier0_and, llvm::Intrinsic::nvvm_barrier0_or, llvm::Intrinsic::nvvm_barrier0_popc, llvm::Intrinsic::nvvm_bitcast_d2ll, llvm::Intrinsic::nvvm_bitcast_f2i, llvm::Intrinsic::nvvm_bitcast_i2f, llvm::Intrinsic::nvvm_bitcast_ll2d, llvm::Intrinsic::nvvm_brev32, llvm::Intrinsic::nvvm_brev64, llvm::Intrinsic::nvvm_ceil_d, llvm::Intrinsic::nvvm_ceil_f, llvm::Intrinsic::nvvm_ceil_ftz_f, llvm::Intrinsic::nvvm_clz_i, llvm::Intrinsic::nvvm_clz_ll, llvm::Intrinsic::nvvm_compiler_error, llvm::Intrinsic::nvvm_compiler_warn, llvm::Intrinsic::nvvm_cos_approx_f, llvm::Intrinsic::nvvm_cos_approx_ftz_f, llvm::Intrinsic::nvvm_d2f_rm, llvm::Intrinsic::nvvm_d2f_rm_ftz, llvm::Intrinsic::nvvm_d2f_rn, llvm::Intrinsic::nvvm_d2f_rn_ftz, llvm::Intrinsic::nvvm_d2f_rp, llvm::Intrinsic::nvvm_d2f_rp_ftz, llvm::Intrinsic::nvvm_d2f_rz, llvm::Intrinsic::nvvm_d2f_rz_ftz, llvm::Intrinsic::nvvm_d2i_hi, llvm::Intrinsic::nvvm_d2i_lo, llvm::Intrinsic::nvvm_d2i_rm, llvm::Intrinsic::nvvm_d2i_rn, llvm::Intrinsic::nvvm_d2i_rp, llvm::Intrinsic::nvvm_d2i_rz, llvm::Intrinsic::nvvm_d2ll_rm, llvm::Intrinsic::nvvm_d2ll_rn, llvm::Intrinsic::nvvm_d2ll_rp, llvm::Intrinsic::nvvm_d2ll_rz, llvm::Intrinsic::nvvm_d2ui_rm, llvm::Intrinsic::nvvm_d2ui_rn, llvm::Intrinsic::nvvm_d2ui_rp, llvm::Intrinsic::nvvm_d2ui_rz, llvm::Intrinsic::nvvm_d2ull_rm, llvm::Intrinsic::nvvm_d2ull_rn, llvm::Intrinsic::nvvm_d2ull_rp, llvm::Intrinsic::nvvm_d2ull_rz, llvm::Intrinsic::nvvm_div_approx_f, llvm::Intrinsic::nvvm_div_approx_ftz_f, llvm::Intrinsic::nvvm_div_rm_d, llvm::Intrinsic::nvvm_div_rm_f, llvm::Intrinsic::nvvm_div_rm_ftz_f, llvm::Intrinsic::nvvm_div_rn_d, llvm::Intrinsic::nvvm_div_rn_f, llvm::Intrinsic::nvvm_div_rn_ftz_f, llvm::Intrinsic::nvvm_div_rp_d, llvm::Intrinsic::nvvm_div_rp_f, llvm::Intrinsic::nvvm_div_rp_ftz_f, llvm::Intrinsic::nvvm_div_rz_d, llvm::Intrinsic::nvvm_div_rz_f, llvm::Intrinsic::nvvm_div_rz_ftz_f, llvm::Intrinsic::nvvm_ex2_approx_d, llvm::Intrinsic::nvvm_ex2_approx_f, llvm::Intrinsic::nvvm_ex2_approx_ftz_f, llvm::Intrinsic::nvvm_f2h_rn, llvm::Intrinsic::nvvm_f2h_rn_ftz, llvm::Intrinsic::nvvm_f2i_rm, llvm::Intrinsic::nvvm_f2i_rm_ftz, llvm::Intrinsic::nvvm_f2i_rn, llvm::Intrinsic::nvvm_f2i_rn_ftz, llvm::Intrinsic::nvvm_f2i_rp, llvm::Intrinsic::nvvm_f2i_rp_ftz, llvm::Intrinsic::nvvm_f2i_rz, llvm::Intrinsic::nvvm_f2i_rz_ftz, llvm::Intrinsic::nvvm_f2ll_rm, llvm::Intrinsic::nvvm_f2ll_rm_ftz, llvm::Intrinsic::nvvm_f2ll_rn, llvm::Intrinsic::nvvm_f2ll_rn_ftz, llvm::Intrinsic::nvvm_f2ll_rp, llvm::Intrinsic::nvvm_f2ll_rp_ftz, llvm::Intrinsic::nvvm_f2ll_rz, llvm::Intrinsic::nvvm_f2ll_rz_ftz, llvm::Intrinsic::nvvm_f2ui_rm, llvm::Intrinsic::nvvm_f2ui_rm_ftz, llvm::Intrinsic::nvvm_f2ui_rn, llvm::Intrinsic::nvvm_f2ui_rn_ftz, llvm::Intrinsic::nvvm_f2ui_rp, llvm::Intrinsic::nvvm_f2ui_rp_ftz, llvm::Intrinsic::nvvm_f2ui_rz, llvm::Intrinsic::nvvm_f2ui_rz_ftz, llvm::Intrinsic::nvvm_f2ull_rm, llvm::Intrinsic::nvvm_f2ull_rm_ftz, llvm::Intrinsic::nvvm_f2ull_rn, llvm::Intrinsic::nvvm_f2ull_rn_ftz, llvm::Intrinsic::nvvm_f2ull_rp, llvm::Intrinsic::nvvm_f2ull_rp_ftz, llvm::Intrinsic::nvvm_f2ull_rz, llvm::Intrinsic::nvvm_f2ull_rz_ftz, llvm::Intrinsic::nvvm_fabs_d, llvm::Intrinsic::nvvm_fabs_f, llvm::Intrinsic::nvvm_fabs_ftz_f, llvm::Intrinsic::nvvm_floor_d, llvm::Intrinsic::nvvm_floor_f, llvm::Intrinsic::nvvm_floor_ftz_f, llvm::Intrinsic::nvvm_fma_rm_d, llvm::Intrinsic::nvvm_fma_rm_f, llvm::Intrinsic::nvvm_fma_rm_ftz_f, llvm::Intrinsic::nvvm_fma_rn_d, llvm::Intrinsic::nvvm_fma_rn_f, llvm::Intrinsic::nvvm_fma_rn_ftz_f, llvm::Intrinsic::nvvm_fma_rp_d, llvm::Intrinsic::nvvm_fma_rp_f, llvm::Intrinsic::nvvm_fma_rp_ftz_f, llvm::Intrinsic::nvvm_fma_rz_d, llvm::Intrinsic::nvvm_fma_rz_f, llvm::Intrinsic::nvvm_fma_rz_ftz_f, llvm::Intrinsic::nvvm_fmax_d, llvm::Intrinsic::nvvm_fmax_f, llvm::Intrinsic::nvvm_fmax_ftz_f, llvm::Intrinsic::nvvm_fmin_d, llvm::Intrinsic::nvvm_fmin_f, llvm::Intrinsic::nvvm_fmin_ftz_f, llvm::Intrinsic::nvvm_h2f, llvm::Intrinsic::nvvm_i2d_rm, llvm::Intrinsic::nvvm_i2d_rn, llvm::Intrinsic::nvvm_i2d_rp, llvm::Intrinsic::nvvm_i2d_rz, llvm::Intrinsic::nvvm_i2f_rm, llvm::Intrinsic::nvvm_i2f_rn, llvm::Intrinsic::nvvm_i2f_rp, llvm::Intrinsic::nvvm_i2f_rz, llvm::Intrinsic::nvvm_ldg_global_f, llvm::Intrinsic::nvvm_ldg_global_i, llvm::Intrinsic::nvvm_ldg_global_p, llvm::Intrinsic::nvvm_ldu_global_f, llvm::Intrinsic::nvvm_ldu_global_i, llvm::Intrinsic::nvvm_ldu_global_p, llvm::Intrinsic::nvvm_lg2_approx_d, llvm::Intrinsic::nvvm_lg2_approx_f, llvm::Intrinsic::nvvm_lg2_approx_ftz_f, llvm::Intrinsic::nvvm_ll2d_rm, llvm::Intrinsic::nvvm_ll2d_rn, llvm::Intrinsic::nvvm_ll2d_rp, llvm::Intrinsic::nvvm_ll2d_rz, llvm::Intrinsic::nvvm_ll2f_rm, llvm::Intrinsic::nvvm_ll2f_rn, llvm::Intrinsic::nvvm_ll2f_rp, llvm::Intrinsic::nvvm_ll2f_rz, llvm::Intrinsic::nvvm_lohi_i2d, llvm::Intrinsic::nvvm_max_i, llvm::Intrinsic::nvvm_max_ll, llvm::Intrinsic::nvvm_max_ui, llvm::Intrinsic::nvvm_max_ull, llvm::Intrinsic::nvvm_membar_cta, llvm::Intrinsic::nvvm_membar_gl, llvm::Intrinsic::nvvm_membar_sys, llvm::Intrinsic::nvvm_min_i, llvm::Intrinsic::nvvm_min_ll, llvm::Intrinsic::nvvm_min_ui, llvm::Intrinsic::nvvm_min_ull, llvm::Intrinsic::nvvm_move_double, llvm::Intrinsic::nvvm_move_float, llvm::Intrinsic::nvvm_move_i16, llvm::Intrinsic::nvvm_move_i32, llvm::Intrinsic::nvvm_move_i64, llvm::Intrinsic::nvvm_move_ptr, llvm::Intrinsic::nvvm_mul24_i, llvm::Intrinsic::nvvm_mul24_ui, llvm::Intrinsic::nvvm_mul_rm_d, llvm::Intrinsic::nvvm_mul_rm_f, llvm::Intrinsic::nvvm_mul_rm_ftz_f, llvm::Intrinsic::nvvm_mul_rn_d, llvm::Intrinsic::nvvm_mul_rn_f, llvm::Intrinsic::nvvm_mul_rn_ftz_f, llvm::Intrinsic::nvvm_mul_rp_d, llvm::Intrinsic::nvvm_mul_rp_f, llvm::Intrinsic::nvvm_mul_rp_ftz_f, llvm::Intrinsic::nvvm_mul_rz_d, llvm::Intrinsic::nvvm_mul_rz_f, llvm::Intrinsic::nvvm_mul_rz_ftz_f, llvm::Intrinsic::nvvm_mulhi_i, llvm::Intrinsic::nvvm_mulhi_ll, llvm::Intrinsic::nvvm_mulhi_ui, llvm::Intrinsic::nvvm_mulhi_ull, llvm::Intrinsic::nvvm_popc_i, llvm::Intrinsic::nvvm_popc_ll, llvm::Intrinsic::nvvm_prmt, llvm::Intrinsic::nvvm_ptr_constant_to_gen, llvm::Intrinsic::nvvm_ptr_gen_to_constant, llvm::Intrinsic::nvvm_ptr_gen_to_global, llvm::Intrinsic::nvvm_ptr_gen_to_local, llvm::Intrinsic::nvvm_ptr_gen_to_param, llvm::Intrinsic::nvvm_ptr_gen_to_shared, llvm::Intrinsic::nvvm_ptr_global_to_gen, llvm::Intrinsic::nvvm_ptr_local_to_gen, llvm::Intrinsic::nvvm_ptr_shared_to_gen, llvm::Intrinsic::nvvm_rcp_approx_ftz_d, llvm::Intrinsic::nvvm_rcp_rm_d, llvm::Intrinsic::nvvm_rcp_rm_f, llvm::Intrinsic::nvvm_rcp_rm_ftz_f, llvm::Intrinsic::nvvm_rcp_rn_d, llvm::Intrinsic::nvvm_rcp_rn_f, llvm::Intrinsic::nvvm_rcp_rn_ftz_f, llvm::Intrinsic::nvvm_rcp_rp_d, llvm::Intrinsic::nvvm_rcp_rp_f, llvm::Intrinsic::nvvm_rcp_rp_ftz_f, llvm::Intrinsic::nvvm_rcp_rz_d, llvm::Intrinsic::nvvm_rcp_rz_f, llvm::Intrinsic::nvvm_rcp_rz_ftz_f, llvm::Intrinsic::nvvm_read_ptx_sreg_ctaid_x, llvm::Intrinsic::nvvm_read_ptx_sreg_ctaid_y, llvm::Intrinsic::nvvm_read_ptx_sreg_ctaid_z, llvm::Intrinsic::nvvm_read_ptx_sreg_nctaid_x, llvm::Intrinsic::nvvm_read_ptx_sreg_nctaid_y, llvm::Intrinsic::nvvm_read_ptx_sreg_nctaid_z, llvm::Intrinsic::nvvm_read_ptx_sreg_ntid_x, llvm::Intrinsic::nvvm_read_ptx_sreg_ntid_y, llvm::Intrinsic::nvvm_read_ptx_sreg_ntid_z, llvm::Intrinsic::nvvm_read_ptx_sreg_tid_x, llvm::Intrinsic::nvvm_read_ptx_sreg_tid_y, llvm::Intrinsic::nvvm_read_ptx_sreg_tid_z, llvm::Intrinsic::nvvm_read_ptx_sreg_warpsize, llvm::Intrinsic::nvvm_round_d, llvm::Intrinsic::nvvm_round_f, llvm::Intrinsic::nvvm_round_ftz_f, llvm::Intrinsic::nvvm_rsqrt_approx_d, llvm::Intrinsic::nvvm_rsqrt_approx_f, llvm::Intrinsic::nvvm_rsqrt_approx_ftz_f, llvm::Intrinsic::nvvm_sad_i, llvm::Intrinsic::nvvm_sad_ui, llvm::Intrinsic::nvvm_saturate_d, llvm::Intrinsic::nvvm_saturate_f, llvm::Intrinsic::nvvm_saturate_ftz_f, llvm::Intrinsic::nvvm_sin_approx_f, llvm::Intrinsic::nvvm_sin_approx_ftz_f, llvm::Intrinsic::nvvm_sqrt_approx_f, llvm::Intrinsic::nvvm_sqrt_approx_ftz_f, llvm::Intrinsic::nvvm_sqrt_f, llvm::Intrinsic::nvvm_sqrt_rm_d, llvm::Intrinsic::nvvm_sqrt_rm_f, llvm::Intrinsic::nvvm_sqrt_rm_ftz_f, llvm::Intrinsic::nvvm_sqrt_rn_d, llvm::Intrinsic::nvvm_sqrt_rn_f, llvm::Intrinsic::nvvm_sqrt_rn_ftz_f, llvm::Intrinsic::nvvm_sqrt_rp_d, llvm::Intrinsic::nvvm_sqrt_rp_f, llvm::Intrinsic::nvvm_sqrt_rp_ftz_f, llvm::Intrinsic::nvvm_sqrt_rz_d, llvm::Intrinsic::nvvm_sqrt_rz_f, llvm::Intrinsic::nvvm_sqrt_rz_ftz_f, llvm::Intrinsic::nvvm_trunc_d, llvm::Intrinsic::nvvm_trunc_f, llvm::Intrinsic::nvvm_trunc_ftz_f, llvm::Intrinsic::nvvm_ui2d_rm, llvm::Intrinsic::nvvm_ui2d_rn, llvm::Intrinsic::nvvm_ui2d_rp, llvm::Intrinsic::nvvm_ui2d_rz, llvm::Intrinsic::nvvm_ui2f_rm, llvm::Intrinsic::nvvm_ui2f_rn, llvm::Intrinsic::nvvm_ui2f_rp, llvm::Intrinsic::nvvm_ui2f_rz, llvm::Intrinsic::nvvm_ull2d_rm, llvm::Intrinsic::nvvm_ull2d_rn, llvm::Intrinsic::nvvm_ull2d_rp, llvm::Intrinsic::nvvm_ull2d_rz, llvm::Intrinsic::nvvm_ull2f_rm, llvm::Intrinsic::nvvm_ull2f_rn, llvm::Intrinsic::nvvm_ull2f_rp, llvm::Intrinsic::nvvm_ull2f_rz, llvm::Intrinsic::objectsize, llvm::Intrinsic::pcmarker, llvm::Intrinsic::pow, llvm::Intrinsic::powi, llvm::Intrinsic::ppc_altivec_dss, llvm::Intrinsic::ppc_altivec_dssall, llvm::Intrinsic::ppc_altivec_dst, llvm::Intrinsic::ppc_altivec_dstst, llvm::Intrinsic::ppc_altivec_dststt, llvm::Intrinsic::ppc_altivec_dstt, llvm::Intrinsic::ppc_altivec_lvebx, llvm::Intrinsic::ppc_altivec_lvehx, llvm::Intrinsic::ppc_altivec_lvewx, llvm::Intrinsic::ppc_altivec_lvsl, llvm::Intrinsic::ppc_altivec_lvsr, llvm::Intrinsic::ppc_altivec_lvx, llvm::Intrinsic::ppc_altivec_lvxl, llvm::Intrinsic::ppc_altivec_mfvscr, llvm::Intrinsic::ppc_altivec_mtvscr, llvm::Intrinsic::ppc_altivec_stvebx, llvm::Intrinsic::ppc_altivec_stvehx, llvm::Intrinsic::ppc_altivec_stvewx, llvm::Intrinsic::ppc_altivec_stvx, llvm::Intrinsic::ppc_altivec_stvxl, llvm::Intrinsic::ppc_altivec_vaddcuw, llvm::Intrinsic::ppc_altivec_vaddsbs, llvm::Intrinsic::ppc_altivec_vaddshs, llvm::Intrinsic::ppc_altivec_vaddsws, llvm::Intrinsic::ppc_altivec_vaddubs, llvm::Intrinsic::ppc_altivec_vadduhs, llvm::Intrinsic::ppc_altivec_vadduws, llvm::Intrinsic::ppc_altivec_vavgsb, llvm::Intrinsic::ppc_altivec_vavgsh, llvm::Intrinsic::ppc_altivec_vavgsw, llvm::Intrinsic::ppc_altivec_vavgub, llvm::Intrinsic::ppc_altivec_vavguh, llvm::Intrinsic::ppc_altivec_vavguw, llvm::Intrinsic::ppc_altivec_vcfsx, llvm::Intrinsic::ppc_altivec_vcfux, llvm::Intrinsic::ppc_altivec_vcmpbfp, llvm::Intrinsic::ppc_altivec_vcmpbfp_p, llvm::Intrinsic::ppc_altivec_vcmpeqfp, llvm::Intrinsic::ppc_altivec_vcmpeqfp_p, llvm::Intrinsic::ppc_altivec_vcmpequb, llvm::Intrinsic::ppc_altivec_vcmpequb_p, llvm::Intrinsic::ppc_altivec_vcmpequh, llvm::Intrinsic::ppc_altivec_vcmpequh_p, llvm::Intrinsic::ppc_altivec_vcmpequw, llvm::Intrinsic::ppc_altivec_vcmpequw_p, llvm::Intrinsic::ppc_altivec_vcmpgefp, llvm::Intrinsic::ppc_altivec_vcmpgefp_p, llvm::Intrinsic::ppc_altivec_vcmpgtfp, llvm::Intrinsic::ppc_altivec_vcmpgtfp_p, llvm::Intrinsic::ppc_altivec_vcmpgtsb, llvm::Intrinsic::ppc_altivec_vcmpgtsb_p, llvm::Intrinsic::ppc_altivec_vcmpgtsh, llvm::Intrinsic::ppc_altivec_vcmpgtsh_p, llvm::Intrinsic::ppc_altivec_vcmpgtsw, llvm::Intrinsic::ppc_altivec_vcmpgtsw_p, llvm::Intrinsic::ppc_altivec_vcmpgtub, llvm::Intrinsic::ppc_altivec_vcmpgtub_p, llvm::Intrinsic::ppc_altivec_vcmpgtuh, llvm::Intrinsic::ppc_altivec_vcmpgtuh_p, llvm::Intrinsic::ppc_altivec_vcmpgtuw, llvm::Intrinsic::ppc_altivec_vcmpgtuw_p, llvm::Intrinsic::ppc_altivec_vctsxs, llvm::Intrinsic::ppc_altivec_vctuxs, llvm::Intrinsic::ppc_altivec_vexptefp, llvm::Intrinsic::ppc_altivec_vlogefp, llvm::Intrinsic::ppc_altivec_vmaddfp, llvm::Intrinsic::ppc_altivec_vmaxfp, llvm::Intrinsic::ppc_altivec_vmaxsb, llvm::Intrinsic::ppc_altivec_vmaxsh, llvm::Intrinsic::ppc_altivec_vmaxsw, llvm::Intrinsic::ppc_altivec_vmaxub, llvm::Intrinsic::ppc_altivec_vmaxuh, llvm::Intrinsic::ppc_altivec_vmaxuw, llvm::Intrinsic::ppc_altivec_vmhaddshs, llvm::Intrinsic::ppc_altivec_vmhraddshs, llvm::Intrinsic::ppc_altivec_vminfp, llvm::Intrinsic::ppc_altivec_vminsb, llvm::Intrinsic::ppc_altivec_vminsh, llvm::Intrinsic::ppc_altivec_vminsw, llvm::Intrinsic::ppc_altivec_vminub, llvm::Intrinsic::ppc_altivec_vminuh, llvm::Intrinsic::ppc_altivec_vminuw, llvm::Intrinsic::ppc_altivec_vmladduhm, llvm::Intrinsic::ppc_altivec_vmsummbm, llvm::Intrinsic::ppc_altivec_vmsumshm, llvm::Intrinsic::ppc_altivec_vmsumshs, llvm::Intrinsic::ppc_altivec_vmsumubm, llvm::Intrinsic::ppc_altivec_vmsumuhm, llvm::Intrinsic::ppc_altivec_vmsumuhs, llvm::Intrinsic::ppc_altivec_vmulesb, llvm::Intrinsic::ppc_altivec_vmulesh, llvm::Intrinsic::ppc_altivec_vmuleub, llvm::Intrinsic::ppc_altivec_vmuleuh, llvm::Intrinsic::ppc_altivec_vmulosb, llvm::Intrinsic::ppc_altivec_vmulosh, llvm::Intrinsic::ppc_altivec_vmuloub, llvm::Intrinsic::ppc_altivec_vmulouh, llvm::Intrinsic::ppc_altivec_vnmsubfp, llvm::Intrinsic::ppc_altivec_vperm, llvm::Intrinsic::ppc_altivec_vpkpx, llvm::Intrinsic::ppc_altivec_vpkshss, llvm::Intrinsic::ppc_altivec_vpkshus, llvm::Intrinsic::ppc_altivec_vpkswss, llvm::Intrinsic::ppc_altivec_vpkswus, llvm::Intrinsic::ppc_altivec_vpkuhus, llvm::Intrinsic::ppc_altivec_vpkuwus, llvm::Intrinsic::ppc_altivec_vrefp, llvm::Intrinsic::ppc_altivec_vrfim, llvm::Intrinsic::ppc_altivec_vrfin, llvm::Intrinsic::ppc_altivec_vrfip, llvm::Intrinsic::ppc_altivec_vrfiz, llvm::Intrinsic::ppc_altivec_vrlb, llvm::Intrinsic::ppc_altivec_vrlh, llvm::Intrinsic::ppc_altivec_vrlw, llvm::Intrinsic::ppc_altivec_vrsqrtefp, llvm::Intrinsic::ppc_altivec_vsel, llvm::Intrinsic::ppc_altivec_vsl, llvm::Intrinsic::ppc_altivec_vslb, llvm::Intrinsic::ppc_altivec_vslh, llvm::Intrinsic::ppc_altivec_vslo, llvm::Intrinsic::ppc_altivec_vslw, llvm::Intrinsic::ppc_altivec_vsr, llvm::Intrinsic::ppc_altivec_vsrab, llvm::Intrinsic::ppc_altivec_vsrah, llvm::Intrinsic::ppc_altivec_vsraw, llvm::Intrinsic::ppc_altivec_vsrb, llvm::Intrinsic::ppc_altivec_vsrh, llvm::Intrinsic::ppc_altivec_vsro, llvm::Intrinsic::ppc_altivec_vsrw, llvm::Intrinsic::ppc_altivec_vsubcuw, llvm::Intrinsic::ppc_altivec_vsubsbs, llvm::Intrinsic::ppc_altivec_vsubshs, llvm::Intrinsic::ppc_altivec_vsubsws, llvm::Intrinsic::ppc_altivec_vsububs, llvm::Intrinsic::ppc_altivec_vsubuhs, llvm::Intrinsic::ppc_altivec_vsubuws, llvm::Intrinsic::ppc_altivec_vsum2sws, llvm::Intrinsic::ppc_altivec_vsum4sbs, llvm::Intrinsic::ppc_altivec_vsum4shs, llvm::Intrinsic::ppc_altivec_vsum4ubs, llvm::Intrinsic::ppc_altivec_vsumsws, llvm::Intrinsic::ppc_altivec_vupkhpx, llvm::Intrinsic::ppc_altivec_vupkhsb, llvm::Intrinsic::ppc_altivec_vupkhsh, llvm::Intrinsic::ppc_altivec_vupklpx, llvm::Intrinsic::ppc_altivec_vupklsb, llvm::Intrinsic::ppc_altivec_vupklsh, llvm::Intrinsic::ppc_dcba, llvm::Intrinsic::ppc_dcbf, llvm::Intrinsic::ppc_dcbi, llvm::Intrinsic::ppc_dcbst, llvm::Intrinsic::ppc_dcbt, llvm::Intrinsic::ppc_dcbtst, llvm::Intrinsic::ppc_dcbz, llvm::Intrinsic::ppc_dcbzl, llvm::Intrinsic::ppc_is_decremented_ctr_nonzero, llvm::Intrinsic::ppc_mtctr, llvm::Intrinsic::ppc_sync, llvm::Intrinsic::prefetch, llvm::Intrinsic::ptr_annotation, llvm::Intrinsic::ptx_bar_sync, llvm::Intrinsic::ptx_read_clock, llvm::Intrinsic::ptx_read_clock64, llvm::Intrinsic::ptx_read_ctaid_w, llvm::Intrinsic::ptx_read_ctaid_x, llvm::Intrinsic::ptx_read_ctaid_y, llvm::Intrinsic::ptx_read_ctaid_z, llvm::Intrinsic::ptx_read_gridid, llvm::Intrinsic::ptx_read_laneid, llvm::Intrinsic::ptx_read_lanemask_eq, llvm::Intrinsic::ptx_read_lanemask_ge, llvm::Intrinsic::ptx_read_lanemask_gt, llvm::Intrinsic::ptx_read_lanemask_le, llvm::Intrinsic::ptx_read_lanemask_lt, llvm::Intrinsic::ptx_read_nctaid_w, llvm::Intrinsic::ptx_read_nctaid_x, llvm::Intrinsic::ptx_read_nctaid_y, llvm::Intrinsic::ptx_read_nctaid_z, llvm::Intrinsic::ptx_read_nsmid, llvm::Intrinsic::ptx_read_ntid_w, llvm::Intrinsic::ptx_read_ntid_x, llvm::Intrinsic::ptx_read_ntid_y, llvm::Intrinsic::ptx_read_ntid_z, llvm::Intrinsic::ptx_read_nwarpid, llvm::Intrinsic::ptx_read_pm0, llvm::Intrinsic::ptx_read_pm1, llvm::Intrinsic::ptx_read_pm2, llvm::Intrinsic::ptx_read_pm3, llvm::Intrinsic::ptx_read_smid, llvm::Intrinsic::ptx_read_tid_w, llvm::Intrinsic::ptx_read_tid_x, llvm::Intrinsic::ptx_read_tid_y, llvm::Intrinsic::ptx_read_tid_z, llvm::Intrinsic::ptx_read_warpid, llvm::Intrinsic::r600_read_global_size_x, llvm::Intrinsic::r600_read_global_size_y, llvm::Intrinsic::r600_read_global_size_z, llvm::Intrinsic::r600_read_local_size_x, llvm::Intrinsic::r600_read_local_size_y, llvm::Intrinsic::r600_read_local_size_z, llvm::Intrinsic::r600_read_ngroups_x, llvm::Intrinsic::r600_read_ngroups_y, llvm::Intrinsic::r600_read_ngroups_z, llvm::Intrinsic::r600_read_tgid_x, llvm::Intrinsic::r600_read_tgid_y, llvm::Intrinsic::r600_read_tgid_z, llvm::Intrinsic::r600_read_tidig_x, llvm::Intrinsic::r600_read_tidig_y, llvm::Intrinsic::r600_read_tidig_z, llvm::Intrinsic::readcyclecounter, llvm::Intrinsic::returnaddress, llvm::Intrinsic::rint, llvm::Intrinsic::round, llvm::Intrinsic::sadd_with_overflow, llvm::Intrinsic::setjmp, llvm::Intrinsic::siglongjmp, llvm::Intrinsic::sigsetjmp, llvm::Intrinsic::sin, llvm::Intrinsic::smul_with_overflow, llvm::Intrinsic::sqrt, llvm::Intrinsic::ssub_with_overflow, llvm::Intrinsic::stackprotector, llvm::Intrinsic::stackprotectorcheck, llvm::Intrinsic::stackrestore, llvm::Intrinsic::stacksave, llvm::Intrinsic::trap, llvm::Intrinsic::trunc, llvm::Intrinsic::uadd_with_overflow, llvm::Intrinsic::umul_with_overflow, llvm::Intrinsic::usub_with_overflow, llvm::Intrinsic::vacopy, llvm::Intrinsic::vaend, llvm::Intrinsic::var_annotation, llvm::Intrinsic::vastart, llvm::Intrinsic::x86_3dnow_pavgusb, llvm::Intrinsic::x86_3dnow_pf2id, llvm::Intrinsic::x86_3dnow_pfacc, llvm::Intrinsic::x86_3dnow_pfadd, llvm::Intrinsic::x86_3dnow_pfcmpeq, llvm::Intrinsic::x86_3dnow_pfcmpge, llvm::Intrinsic::x86_3dnow_pfcmpgt, llvm::Intrinsic::x86_3dnow_pfmax, llvm::Intrinsic::x86_3dnow_pfmin, llvm::Intrinsic::x86_3dnow_pfmul, llvm::Intrinsic::x86_3dnow_pfrcp, llvm::Intrinsic::x86_3dnow_pfrcpit1, llvm::Intrinsic::x86_3dnow_pfrcpit2, llvm::Intrinsic::x86_3dnow_pfrsqit1, llvm::Intrinsic::x86_3dnow_pfrsqrt, llvm::Intrinsic::x86_3dnow_pfsub, llvm::Intrinsic::x86_3dnow_pfsubr, llvm::Intrinsic::x86_3dnow_pi2fd, llvm::Intrinsic::x86_3dnow_pmulhrw, llvm::Intrinsic::x86_3dnowa_pf2iw, llvm::Intrinsic::x86_3dnowa_pfnacc, llvm::Intrinsic::x86_3dnowa_pfpnacc, llvm::Intrinsic::x86_3dnowa_pi2fw, llvm::Intrinsic::x86_3dnowa_pswapd, llvm::Intrinsic::x86_aesni_aesdec, llvm::Intrinsic::x86_aesni_aesdeclast, llvm::Intrinsic::x86_aesni_aesenc, llvm::Intrinsic::x86_aesni_aesenclast, llvm::Intrinsic::x86_aesni_aesimc, llvm::Intrinsic::x86_aesni_aeskeygenassist, llvm::Intrinsic::x86_avx2_gather_d_d, llvm::Intrinsic::x86_avx2_gather_d_d_256, llvm::Intrinsic::x86_avx2_gather_d_pd, llvm::Intrinsic::x86_avx2_gather_d_pd_256, llvm::Intrinsic::x86_avx2_gather_d_ps, llvm::Intrinsic::x86_avx2_gather_d_ps_256, llvm::Intrinsic::x86_avx2_gather_d_q, llvm::Intrinsic::x86_avx2_gather_d_q_256, llvm::Intrinsic::x86_avx2_gather_q_d, llvm::Intrinsic::x86_avx2_gather_q_d_256, llvm::Intrinsic::x86_avx2_gather_q_pd, llvm::Intrinsic::x86_avx2_gather_q_pd_256, llvm::Intrinsic::x86_avx2_gather_q_ps, llvm::Intrinsic::x86_avx2_gather_q_ps_256, llvm::Intrinsic::x86_avx2_gather_q_q, llvm::Intrinsic::x86_avx2_gather_q_q_256, llvm::Intrinsic::x86_avx2_maskload_d, llvm::Intrinsic::x86_avx2_maskload_d_256, llvm::Intrinsic::x86_avx2_maskload_q, llvm::Intrinsic::x86_avx2_maskload_q_256, llvm::Intrinsic::x86_avx2_maskstore_d, llvm::Intrinsic::x86_avx2_maskstore_d_256, llvm::Intrinsic::x86_avx2_maskstore_q, llvm::Intrinsic::x86_avx2_maskstore_q_256, llvm::Intrinsic::x86_avx2_movntdqa, llvm::Intrinsic::x86_avx2_mpsadbw, llvm::Intrinsic::x86_avx2_pabs_b, llvm::Intrinsic::x86_avx2_pabs_d, llvm::Intrinsic::x86_avx2_pabs_w, llvm::Intrinsic::x86_avx2_packssdw, llvm::Intrinsic::x86_avx2_packsswb, llvm::Intrinsic::x86_avx2_packusdw, llvm::Intrinsic::x86_avx2_packuswb, llvm::Intrinsic::x86_avx2_padds_b, llvm::Intrinsic::x86_avx2_padds_w, llvm::Intrinsic::x86_avx2_paddus_b, llvm::Intrinsic::x86_avx2_paddus_w, llvm::Intrinsic::x86_avx2_pavg_b, llvm::Intrinsic::x86_avx2_pavg_w, llvm::Intrinsic::x86_avx2_pblendd_128, llvm::Intrinsic::x86_avx2_pblendd_256, llvm::Intrinsic::x86_avx2_pblendvb, llvm::Intrinsic::x86_avx2_pblendw, llvm::Intrinsic::x86_avx2_pbroadcastb_128, llvm::Intrinsic::x86_avx2_pbroadcastb_256, llvm::Intrinsic::x86_avx2_pbroadcastd_128, llvm::Intrinsic::x86_avx2_pbroadcastd_256, llvm::Intrinsic::x86_avx2_pbroadcastq_128, llvm::Intrinsic::x86_avx2_pbroadcastq_256, llvm::Intrinsic::x86_avx2_pbroadcastw_128, llvm::Intrinsic::x86_avx2_pbroadcastw_256, llvm::Intrinsic::x86_avx2_permd, llvm::Intrinsic::x86_avx2_permps, llvm::Intrinsic::x86_avx2_phadd_d, llvm::Intrinsic::x86_avx2_phadd_sw, llvm::Intrinsic::x86_avx2_phadd_w, llvm::Intrinsic::x86_avx2_phsub_d, llvm::Intrinsic::x86_avx2_phsub_sw, llvm::Intrinsic::x86_avx2_phsub_w, llvm::Intrinsic::x86_avx2_pmadd_ub_sw, llvm::Intrinsic::x86_avx2_pmadd_wd, llvm::Intrinsic::x86_avx2_pmaxs_b, llvm::Intrinsic::x86_avx2_pmaxs_d, llvm::Intrinsic::x86_avx2_pmaxs_w, llvm::Intrinsic::x86_avx2_pmaxu_b, llvm::Intrinsic::x86_avx2_pmaxu_d, llvm::Intrinsic::x86_avx2_pmaxu_w, llvm::Intrinsic::x86_avx2_pmins_b, llvm::Intrinsic::x86_avx2_pmins_d, llvm::Intrinsic::x86_avx2_pmins_w, llvm::Intrinsic::x86_avx2_pminu_b, llvm::Intrinsic::x86_avx2_pminu_d, llvm::Intrinsic::x86_avx2_pminu_w, llvm::Intrinsic::x86_avx2_pmovmskb, llvm::Intrinsic::x86_avx2_pmovsxbd, llvm::Intrinsic::x86_avx2_pmovsxbq, llvm::Intrinsic::x86_avx2_pmovsxbw, llvm::Intrinsic::x86_avx2_pmovsxdq, llvm::Intrinsic::x86_avx2_pmovsxwd, llvm::Intrinsic::x86_avx2_pmovsxwq, llvm::Intrinsic::x86_avx2_pmovzxbd, llvm::Intrinsic::x86_avx2_pmovzxbq, llvm::Intrinsic::x86_avx2_pmovzxbw, llvm::Intrinsic::x86_avx2_pmovzxdq, llvm::Intrinsic::x86_avx2_pmovzxwd, llvm::Intrinsic::x86_avx2_pmovzxwq, llvm::Intrinsic::x86_avx2_pmul_dq, llvm::Intrinsic::x86_avx2_pmul_hr_sw, llvm::Intrinsic::x86_avx2_pmulh_w, llvm::Intrinsic::x86_avx2_pmulhu_w, llvm::Intrinsic::x86_avx2_pmulu_dq, llvm::Intrinsic::x86_avx2_psad_bw, llvm::Intrinsic::x86_avx2_pshuf_b, llvm::Intrinsic::x86_avx2_psign_b, llvm::Intrinsic::x86_avx2_psign_d, llvm::Intrinsic::x86_avx2_psign_w, llvm::Intrinsic::x86_avx2_psll_d, llvm::Intrinsic::x86_avx2_psll_dq, llvm::Intrinsic::x86_avx2_psll_dq_bs, llvm::Intrinsic::x86_avx2_psll_q, llvm::Intrinsic::x86_avx2_psll_w, llvm::Intrinsic::x86_avx2_pslli_d, llvm::Intrinsic::x86_avx2_pslli_q, llvm::Intrinsic::x86_avx2_pslli_w, llvm::Intrinsic::x86_avx2_psllv_d, llvm::Intrinsic::x86_avx2_psllv_d_256, llvm::Intrinsic::x86_avx2_psllv_q, llvm::Intrinsic::x86_avx2_psllv_q_256, llvm::Intrinsic::x86_avx2_psra_d, llvm::Intrinsic::x86_avx2_psra_w, llvm::Intrinsic::x86_avx2_psrai_d, llvm::Intrinsic::x86_avx2_psrai_w, llvm::Intrinsic::x86_avx2_psrav_d, llvm::Intrinsic::x86_avx2_psrav_d_256, llvm::Intrinsic::x86_avx2_psrl_d, llvm::Intrinsic::x86_avx2_psrl_dq, llvm::Intrinsic::x86_avx2_psrl_dq_bs, llvm::Intrinsic::x86_avx2_psrl_q, llvm::Intrinsic::x86_avx2_psrl_w, llvm::Intrinsic::x86_avx2_psrli_d, llvm::Intrinsic::x86_avx2_psrli_q, llvm::Intrinsic::x86_avx2_psrli_w, llvm::Intrinsic::x86_avx2_psrlv_d, llvm::Intrinsic::x86_avx2_psrlv_d_256, llvm::Intrinsic::x86_avx2_psrlv_q, llvm::Intrinsic::x86_avx2_psrlv_q_256, llvm::Intrinsic::x86_avx2_psubs_b, llvm::Intrinsic::x86_avx2_psubs_w, llvm::Intrinsic::x86_avx2_psubus_b, llvm::Intrinsic::x86_avx2_psubus_w, llvm::Intrinsic::x86_avx2_vbroadcast_sd_pd_256, llvm::Intrinsic::x86_avx2_vbroadcast_ss_ps, llvm::Intrinsic::x86_avx2_vbroadcast_ss_ps_256, llvm::Intrinsic::x86_avx2_vbroadcasti128, llvm::Intrinsic::x86_avx2_vextracti128, llvm::Intrinsic::x86_avx2_vinserti128, llvm::Intrinsic::x86_avx2_vperm2i128, llvm::Intrinsic::x86_avx512_and_pi, llvm::Intrinsic::x86_avx512_cmpeq_pi_512, llvm::Intrinsic::x86_avx512_conflict_d_512, llvm::Intrinsic::x86_avx512_conflict_d_mask_512, llvm::Intrinsic::x86_avx512_conflict_d_maskz_512, llvm::Intrinsic::x86_avx512_conflict_q_512, llvm::Intrinsic::x86_avx512_conflict_q_mask_512, llvm::Intrinsic::x86_avx512_conflict_q_maskz_512, llvm::Intrinsic::x86_avx512_cvt_ps2dq_512, llvm::Intrinsic::x86_avx512_cvtdq2_ps_512, llvm::Intrinsic::x86_avx512_cvtsd2usi, llvm::Intrinsic::x86_avx512_cvtsd2usi64, llvm::Intrinsic::x86_avx512_cvtss2usi, llvm::Intrinsic::x86_avx512_cvtss2usi64, llvm::Intrinsic::x86_avx512_cvttsd2usi, llvm::Intrinsic::x86_avx512_cvttsd2usi64, llvm::Intrinsic::x86_avx512_cvttss2usi, llvm::Intrinsic::x86_avx512_cvttss2usi64, llvm::Intrinsic::x86_avx512_cvtusi2sd, llvm::Intrinsic::x86_avx512_cvtusi2ss, llvm::Intrinsic::x86_avx512_cvtusi642sd, llvm::Intrinsic::x86_avx512_cvtusi642ss, llvm::Intrinsic::x86_avx512_gather_dpd_512, llvm::Intrinsic::x86_avx512_gather_dpd_mask_512, llvm::Intrinsic::x86_avx512_gather_dpi_512, llvm::Intrinsic::x86_avx512_gather_dpi_mask_512, llvm::Intrinsic::x86_avx512_gather_dpq_512, llvm::Intrinsic::x86_avx512_gather_dpq_mask_512, llvm::Intrinsic::x86_avx512_gather_dps_512, llvm::Intrinsic::x86_avx512_gather_dps_mask_512, llvm::Intrinsic::x86_avx512_gather_qpd_512, llvm::Intrinsic::x86_avx512_gather_qpd_mask_512, llvm::Intrinsic::x86_avx512_gather_qpi_512, llvm::Intrinsic::x86_avx512_gather_qpi_mask_512, llvm::Intrinsic::x86_avx512_gather_qpq_512, llvm::Intrinsic::x86_avx512_gather_qpq_mask_512, llvm::Intrinsic::x86_avx512_gather_qps_512, llvm::Intrinsic::x86_avx512_gather_qps_mask_512, llvm::Intrinsic::x86_avx512_kortestc, llvm::Intrinsic::x86_avx512_kortestz, llvm::Intrinsic::x86_avx512_max_pd_512, llvm::Intrinsic::x86_avx512_max_ps_512, llvm::Intrinsic::x86_avx512_min_pd_512, llvm::Intrinsic::x86_avx512_min_ps_512, llvm::Intrinsic::x86_avx512_mskblend_d_512, llvm::Intrinsic::x86_avx512_mskblend_pd_512, llvm::Intrinsic::x86_avx512_mskblend_ps_512, llvm::Intrinsic::x86_avx512_mskblend_q_512, llvm::Intrinsic::x86_avx512_pbroadcastd_512, llvm::Intrinsic::x86_avx512_pbroadcastd_i32_512, llvm::Intrinsic::x86_avx512_pbroadcastq_512, llvm::Intrinsic::x86_avx512_pbroadcastq_i64_512, llvm::Intrinsic::x86_avx512_pmaxs_d, llvm::Intrinsic::x86_avx512_pmaxs_q, llvm::Intrinsic::x86_avx512_pmaxu_d, llvm::Intrinsic::x86_avx512_pmaxu_q, llvm::Intrinsic::x86_avx512_pmins_d, llvm::Intrinsic::x86_avx512_pmins_q, llvm::Intrinsic::x86_avx512_pminu_d, llvm::Intrinsic::x86_avx512_pminu_q, llvm::Intrinsic::x86_avx512_pmovzxbd, llvm::Intrinsic::x86_avx512_pmovzxbq, llvm::Intrinsic::x86_avx512_pmovzxdq, llvm::Intrinsic::x86_avx512_pmovzxwd, llvm::Intrinsic::x86_avx512_pmovzxwq, llvm::Intrinsic::x86_avx512_psll_dq, llvm::Intrinsic::x86_avx512_psll_dq_bs, llvm::Intrinsic::x86_avx512_psrl_dq, llvm::Intrinsic::x86_avx512_psrl_dq_bs, llvm::Intrinsic::x86_avx512_rcp14_pd_512, llvm::Intrinsic::x86_avx512_rcp14_ps_512, llvm::Intrinsic::x86_avx512_rcp14_sd, llvm::Intrinsic::x86_avx512_rcp14_ss, llvm::Intrinsic::x86_avx512_rcp28_pd_512, llvm::Intrinsic::x86_avx512_rcp28_ps_512, llvm::Intrinsic::x86_avx512_rcp28_sd, llvm::Intrinsic::x86_avx512_rcp28_ss, llvm::Intrinsic::x86_avx512_rndscale_pd_512, llvm::Intrinsic::x86_avx512_rndscale_ps_512, llvm::Intrinsic::x86_avx512_rndscale_sd, llvm::Intrinsic::x86_avx512_rndscale_ss, llvm::Intrinsic::x86_avx512_rsqrt14_pd_512, llvm::Intrinsic::x86_avx512_rsqrt14_ps_512, llvm::Intrinsic::x86_avx512_rsqrt14_sd, llvm::Intrinsic::x86_avx512_rsqrt14_ss, llvm::Intrinsic::x86_avx512_rsqrt28_pd_512, llvm::Intrinsic::x86_avx512_rsqrt28_ps_512, llvm::Intrinsic::x86_avx512_rsqrt28_sd, llvm::Intrinsic::x86_avx512_rsqrt28_ss, llvm::Intrinsic::x86_avx512_scatter_dpd_512, llvm::Intrinsic::x86_avx512_scatter_dpd_mask_512, llvm::Intrinsic::x86_avx512_scatter_dpi_512, llvm::Intrinsic::x86_avx512_scatter_dpi_mask_512, llvm::Intrinsic::x86_avx512_scatter_dpq_512, llvm::Intrinsic::x86_avx512_scatter_dpq_mask_512, llvm::Intrinsic::x86_avx512_scatter_dps_512, llvm::Intrinsic::x86_avx512_scatter_dps_mask_512, llvm::Intrinsic::x86_avx512_scatter_qpd_512, llvm::Intrinsic::x86_avx512_scatter_qpd_mask_512, llvm::Intrinsic::x86_avx512_scatter_qpi_512, llvm::Intrinsic::x86_avx512_scatter_qpi_mask_512, llvm::Intrinsic::x86_avx512_scatter_qpq_512, llvm::Intrinsic::x86_avx512_scatter_qpq_mask_512, llvm::Intrinsic::x86_avx512_scatter_qps_512, llvm::Intrinsic::x86_avx512_scatter_qps_mask_512, llvm::Intrinsic::x86_avx512_sqrt_pd_512, llvm::Intrinsic::x86_avx512_sqrt_ps_512, llvm::Intrinsic::x86_avx512_sqrt_sd, llvm::Intrinsic::x86_avx512_sqrt_ss, llvm::Intrinsic::x86_avx512_vbroadcast_sd_512, llvm::Intrinsic::x86_avx512_vbroadcast_sd_pd_512, llvm::Intrinsic::x86_avx512_vbroadcast_ss_512, llvm::Intrinsic::x86_avx512_vbroadcast_ss_ps_512, llvm::Intrinsic::x86_avx512_vcvtph2ps_512, llvm::Intrinsic::x86_avx512_vcvtps2ph_512, llvm::Intrinsic::x86_avx_addsub_pd_256, llvm::Intrinsic::x86_avx_addsub_ps_256, llvm::Intrinsic::x86_avx_blend_pd_256, llvm::Intrinsic::x86_avx_blend_ps_256, llvm::Intrinsic::x86_avx_blendv_pd_256, llvm::Intrinsic::x86_avx_blendv_ps_256, llvm::Intrinsic::x86_avx_cmp_pd_256, llvm::Intrinsic::x86_avx_cmp_ps_256, llvm::Intrinsic::x86_avx_cvt_pd2_ps_256, llvm::Intrinsic::x86_avx_cvt_pd2dq_256, llvm::Intrinsic::x86_avx_cvt_ps2_pd_256, llvm::Intrinsic::x86_avx_cvt_ps2dq_256, llvm::Intrinsic::x86_avx_cvtdq2_pd_256, llvm::Intrinsic::x86_avx_cvtdq2_ps_256, llvm::Intrinsic::x86_avx_cvtt_pd2dq_256, llvm::Intrinsic::x86_avx_cvtt_ps2dq_256, llvm::Intrinsic::x86_avx_dp_ps_256, llvm::Intrinsic::x86_avx_hadd_pd_256, llvm::Intrinsic::x86_avx_hadd_ps_256, llvm::Intrinsic::x86_avx_hsub_pd_256, llvm::Intrinsic::x86_avx_hsub_ps_256, llvm::Intrinsic::x86_avx_ldu_dq_256, llvm::Intrinsic::x86_avx_maskload_pd, llvm::Intrinsic::x86_avx_maskload_pd_256, llvm::Intrinsic::x86_avx_maskload_ps, llvm::Intrinsic::x86_avx_maskload_ps_256, llvm::Intrinsic::x86_avx_maskstore_pd, llvm::Intrinsic::x86_avx_maskstore_pd_256, llvm::Intrinsic::x86_avx_maskstore_ps, llvm::Intrinsic::x86_avx_maskstore_ps_256, llvm::Intrinsic::x86_avx_max_pd_256, llvm::Intrinsic::x86_avx_max_ps_256, llvm::Intrinsic::x86_avx_min_pd_256, llvm::Intrinsic::x86_avx_min_ps_256, llvm::Intrinsic::x86_avx_movmsk_pd_256, llvm::Intrinsic::x86_avx_movmsk_ps_256, llvm::Intrinsic::x86_avx_ptestc_256, llvm::Intrinsic::x86_avx_ptestnzc_256, llvm::Intrinsic::x86_avx_ptestz_256, llvm::Intrinsic::x86_avx_rcp_ps_256, llvm::Intrinsic::x86_avx_round_pd_256, llvm::Intrinsic::x86_avx_round_ps_256, llvm::Intrinsic::x86_avx_rsqrt_ps_256, llvm::Intrinsic::x86_avx_sqrt_pd_256, llvm::Intrinsic::x86_avx_sqrt_ps_256, llvm::Intrinsic::x86_avx_storeu_dq_256, llvm::Intrinsic::x86_avx_storeu_pd_256, llvm::Intrinsic::x86_avx_storeu_ps_256, llvm::Intrinsic::x86_avx_vbroadcast_sd_256, llvm::Intrinsic::x86_avx_vbroadcast_ss, llvm::Intrinsic::x86_avx_vbroadcast_ss_256, llvm::Intrinsic::x86_avx_vbroadcastf128_pd_256, llvm::Intrinsic::x86_avx_vbroadcastf128_ps_256, llvm::Intrinsic::x86_avx_vextractf128_pd_256, llvm::Intrinsic::x86_avx_vextractf128_ps_256, llvm::Intrinsic::x86_avx_vextractf128_si_256, llvm::Intrinsic::x86_avx_vinsertf128_pd_256, llvm::Intrinsic::x86_avx_vinsertf128_ps_256, llvm::Intrinsic::x86_avx_vinsertf128_si_256, llvm::Intrinsic::x86_avx_vperm2f128_pd_256, llvm::Intrinsic::x86_avx_vperm2f128_ps_256, llvm::Intrinsic::x86_avx_vperm2f128_si_256, llvm::Intrinsic::x86_avx_vpermilvar_pd, llvm::Intrinsic::x86_avx_vpermilvar_pd_256, llvm::Intrinsic::x86_avx_vpermilvar_ps, llvm::Intrinsic::x86_avx_vpermilvar_ps_256, llvm::Intrinsic::x86_avx_vtestc_pd, llvm::Intrinsic::x86_avx_vtestc_pd_256, llvm::Intrinsic::x86_avx_vtestc_ps, llvm::Intrinsic::x86_avx_vtestc_ps_256, llvm::Intrinsic::x86_avx_vtestnzc_pd, llvm::Intrinsic::x86_avx_vtestnzc_pd_256, llvm::Intrinsic::x86_avx_vtestnzc_ps, llvm::Intrinsic::x86_avx_vtestnzc_ps_256, llvm::Intrinsic::x86_avx_vtestz_pd, llvm::Intrinsic::x86_avx_vtestz_pd_256, llvm::Intrinsic::x86_avx_vtestz_ps, llvm::Intrinsic::x86_avx_vtestz_ps_256, llvm::Intrinsic::x86_avx_vzeroall, llvm::Intrinsic::x86_avx_vzeroupper, llvm::Intrinsic::x86_bmi_bextr_32, llvm::Intrinsic::x86_bmi_bextr_64, llvm::Intrinsic::x86_bmi_bzhi_32, llvm::Intrinsic::x86_bmi_bzhi_64, llvm::Intrinsic::x86_bmi_pdep_32, llvm::Intrinsic::x86_bmi_pdep_64, llvm::Intrinsic::x86_bmi_pext_32, llvm::Intrinsic::x86_bmi_pext_64, llvm::Intrinsic::x86_fma_vfmadd_pd, llvm::Intrinsic::x86_fma_vfmadd_pd_256, llvm::Intrinsic::x86_fma_vfmadd_pd_512, llvm::Intrinsic::x86_fma_vfmadd_ps, llvm::Intrinsic::x86_fma_vfmadd_ps_256, llvm::Intrinsic::x86_fma_vfmadd_ps_512, llvm::Intrinsic::x86_fma_vfmadd_sd, llvm::Intrinsic::x86_fma_vfmadd_ss, llvm::Intrinsic::x86_fma_vfmaddsub_pd, llvm::Intrinsic::x86_fma_vfmaddsub_pd_256, llvm::Intrinsic::x86_fma_vfmaddsub_pd_512, llvm::Intrinsic::x86_fma_vfmaddsub_ps, llvm::Intrinsic::x86_fma_vfmaddsub_ps_256, llvm::Intrinsic::x86_fma_vfmaddsub_ps_512, llvm::Intrinsic::x86_fma_vfmsub_pd, llvm::Intrinsic::x86_fma_vfmsub_pd_256, llvm::Intrinsic::x86_fma_vfmsub_pd_512, llvm::Intrinsic::x86_fma_vfmsub_ps, llvm::Intrinsic::x86_fma_vfmsub_ps_256, llvm::Intrinsic::x86_fma_vfmsub_ps_512, llvm::Intrinsic::x86_fma_vfmsub_sd, llvm::Intrinsic::x86_fma_vfmsub_ss, llvm::Intrinsic::x86_fma_vfmsubadd_pd, llvm::Intrinsic::x86_fma_vfmsubadd_pd_256, llvm::Intrinsic::x86_fma_vfmsubadd_pd_512, llvm::Intrinsic::x86_fma_vfmsubadd_ps, llvm::Intrinsic::x86_fma_vfmsubadd_ps_256, llvm::Intrinsic::x86_fma_vfmsubadd_ps_512, llvm::Intrinsic::x86_fma_vfnmadd_pd, llvm::Intrinsic::x86_fma_vfnmadd_pd_256, llvm::Intrinsic::x86_fma_vfnmadd_pd_512, llvm::Intrinsic::x86_fma_vfnmadd_ps, llvm::Intrinsic::x86_fma_vfnmadd_ps_256, llvm::Intrinsic::x86_fma_vfnmadd_ps_512, llvm::Intrinsic::x86_fma_vfnmadd_sd, llvm::Intrinsic::x86_fma_vfnmadd_ss, llvm::Intrinsic::x86_fma_vfnmsub_pd, llvm::Intrinsic::x86_fma_vfnmsub_pd_256, llvm::Intrinsic::x86_fma_vfnmsub_pd_512, llvm::Intrinsic::x86_fma_vfnmsub_ps, llvm::Intrinsic::x86_fma_vfnmsub_ps_256, llvm::Intrinsic::x86_fma_vfnmsub_ps_512, llvm::Intrinsic::x86_fma_vfnmsub_sd, llvm::Intrinsic::x86_fma_vfnmsub_ss, llvm::Intrinsic::x86_int, llvm::Intrinsic::x86_int2mask_v16i1, llvm::Intrinsic::x86_kadd_v16i1, llvm::Intrinsic::x86_kand_v16i1, llvm::Intrinsic::x86_kandn_v16i1, llvm::Intrinsic::x86_knot_v16i1, llvm::Intrinsic::x86_kor_v16i1, llvm::Intrinsic::x86_kunpck_v16i1, llvm::Intrinsic::x86_kxnor_v16i1, llvm::Intrinsic::x86_kxor_v16i1, llvm::Intrinsic::x86_mask2int_v16i1, llvm::Intrinsic::x86_mmx_emms, llvm::Intrinsic::x86_mmx_femms, llvm::Intrinsic::x86_mmx_maskmovq, llvm::Intrinsic::x86_mmx_movnt_dq, llvm::Intrinsic::x86_mmx_packssdw, llvm::Intrinsic::x86_mmx_packsswb, llvm::Intrinsic::x86_mmx_packuswb, llvm::Intrinsic::x86_mmx_padd_b, llvm::Intrinsic::x86_mmx_padd_d, llvm::Intrinsic::x86_mmx_padd_q, llvm::Intrinsic::x86_mmx_padd_w, llvm::Intrinsic::x86_mmx_padds_b, llvm::Intrinsic::x86_mmx_padds_w, llvm::Intrinsic::x86_mmx_paddus_b, llvm::Intrinsic::x86_mmx_paddus_w, llvm::Intrinsic::x86_mmx_palignr_b, llvm::Intrinsic::x86_mmx_pand, llvm::Intrinsic::x86_mmx_pandn, llvm::Intrinsic::x86_mmx_pavg_b, llvm::Intrinsic::x86_mmx_pavg_w, llvm::Intrinsic::x86_mmx_pcmpeq_b, llvm::Intrinsic::x86_mmx_pcmpeq_d, llvm::Intrinsic::x86_mmx_pcmpeq_w, llvm::Intrinsic::x86_mmx_pcmpgt_b, llvm::Intrinsic::x86_mmx_pcmpgt_d, llvm::Intrinsic::x86_mmx_pcmpgt_w, llvm::Intrinsic::x86_mmx_pextr_w, llvm::Intrinsic::x86_mmx_pinsr_w, llvm::Intrinsic::x86_mmx_pmadd_wd, llvm::Intrinsic::x86_mmx_pmaxs_w, llvm::Intrinsic::x86_mmx_pmaxu_b, llvm::Intrinsic::x86_mmx_pmins_w, llvm::Intrinsic::x86_mmx_pminu_b, llvm::Intrinsic::x86_mmx_pmovmskb, llvm::Intrinsic::x86_mmx_pmulh_w, llvm::Intrinsic::x86_mmx_pmulhu_w, llvm::Intrinsic::x86_mmx_pmull_w, llvm::Intrinsic::x86_mmx_pmulu_dq, llvm::Intrinsic::x86_mmx_por, llvm::Intrinsic::x86_mmx_psad_bw, llvm::Intrinsic::x86_mmx_psll_d, llvm::Intrinsic::x86_mmx_psll_q, llvm::Intrinsic::x86_mmx_psll_w, llvm::Intrinsic::x86_mmx_pslli_d, llvm::Intrinsic::x86_mmx_pslli_q, llvm::Intrinsic::x86_mmx_pslli_w, llvm::Intrinsic::x86_mmx_psra_d, llvm::Intrinsic::x86_mmx_psra_w, llvm::Intrinsic::x86_mmx_psrai_d, llvm::Intrinsic::x86_mmx_psrai_w, llvm::Intrinsic::x86_mmx_psrl_d, llvm::Intrinsic::x86_mmx_psrl_q, llvm::Intrinsic::x86_mmx_psrl_w, llvm::Intrinsic::x86_mmx_psrli_d, llvm::Intrinsic::x86_mmx_psrli_q, llvm::Intrinsic::x86_mmx_psrli_w, llvm::Intrinsic::x86_mmx_psub_b, llvm::Intrinsic::x86_mmx_psub_d, llvm::Intrinsic::x86_mmx_psub_q, llvm::Intrinsic::x86_mmx_psub_w, llvm::Intrinsic::x86_mmx_psubs_b, llvm::Intrinsic::x86_mmx_psubs_w, llvm::Intrinsic::x86_mmx_psubus_b, llvm::Intrinsic::x86_mmx_psubus_w, llvm::Intrinsic::x86_mmx_punpckhbw, llvm::Intrinsic::x86_mmx_punpckhdq, llvm::Intrinsic::x86_mmx_punpckhwd, llvm::Intrinsic::x86_mmx_punpcklbw, llvm::Intrinsic::x86_mmx_punpckldq, llvm::Intrinsic::x86_mmx_punpcklwd, llvm::Intrinsic::x86_mmx_pxor, llvm::Intrinsic::x86_pclmulqdq, llvm::Intrinsic::x86_rdfsbase_32, llvm::Intrinsic::x86_rdfsbase_64, llvm::Intrinsic::x86_rdgsbase_32, llvm::Intrinsic::x86_rdgsbase_64, llvm::Intrinsic::x86_rdrand_16, llvm::Intrinsic::x86_rdrand_32, llvm::Intrinsic::x86_rdrand_64, llvm::Intrinsic::x86_rdseed_16, llvm::Intrinsic::x86_rdseed_32, llvm::Intrinsic::x86_rdseed_64, llvm::Intrinsic::x86_sha1msg1, llvm::Intrinsic::x86_sha1msg2, llvm::Intrinsic::x86_sha1nexte, llvm::Intrinsic::x86_sha1rnds4, llvm::Intrinsic::x86_sha256msg1, llvm::Intrinsic::x86_sha256msg2, llvm::Intrinsic::x86_sha256rnds2, llvm::Intrinsic::x86_sse2_add_sd, llvm::Intrinsic::x86_sse2_clflush, llvm::Intrinsic::x86_sse2_cmp_pd, llvm::Intrinsic::x86_sse2_cmp_sd, llvm::Intrinsic::x86_sse2_comieq_sd, llvm::Intrinsic::x86_sse2_comige_sd, llvm::Intrinsic::x86_sse2_comigt_sd, llvm::Intrinsic::x86_sse2_comile_sd, llvm::Intrinsic::x86_sse2_comilt_sd, llvm::Intrinsic::x86_sse2_comineq_sd, llvm::Intrinsic::x86_sse2_cvtdq2pd, llvm::Intrinsic::x86_sse2_cvtdq2ps, llvm::Intrinsic::x86_sse2_cvtpd2dq, llvm::Intrinsic::x86_sse2_cvtpd2ps, llvm::Intrinsic::x86_sse2_cvtps2dq, llvm::Intrinsic::x86_sse2_cvtps2pd, llvm::Intrinsic::x86_sse2_cvtsd2si, llvm::Intrinsic::x86_sse2_cvtsd2si64, llvm::Intrinsic::x86_sse2_cvtsd2ss, llvm::Intrinsic::x86_sse2_cvtsi2sd, llvm::Intrinsic::x86_sse2_cvtsi642sd, llvm::Intrinsic::x86_sse2_cvtss2sd, llvm::Intrinsic::x86_sse2_cvttpd2dq, llvm::Intrinsic::x86_sse2_cvttps2dq, llvm::Intrinsic::x86_sse2_cvttsd2si, llvm::Intrinsic::x86_sse2_cvttsd2si64, llvm::Intrinsic::x86_sse2_div_sd, llvm::Intrinsic::x86_sse2_lfence, llvm::Intrinsic::x86_sse2_maskmov_dqu, llvm::Intrinsic::x86_sse2_max_pd, llvm::Intrinsic::x86_sse2_max_sd, llvm::Intrinsic::x86_sse2_mfence, llvm::Intrinsic::x86_sse2_min_pd, llvm::Intrinsic::x86_sse2_min_sd, llvm::Intrinsic::x86_sse2_movmsk_pd, llvm::Intrinsic::x86_sse2_mul_sd, llvm::Intrinsic::x86_sse2_packssdw_128, llvm::Intrinsic::x86_sse2_packsswb_128, llvm::Intrinsic::x86_sse2_packuswb_128, llvm::Intrinsic::x86_sse2_padds_b, llvm::Intrinsic::x86_sse2_padds_w, llvm::Intrinsic::x86_sse2_paddus_b, llvm::Intrinsic::x86_sse2_paddus_w, llvm::Intrinsic::x86_sse2_pavg_b, llvm::Intrinsic::x86_sse2_pavg_w, llvm::Intrinsic::x86_sse2_pmadd_wd, llvm::Intrinsic::x86_sse2_pmaxs_w, llvm::Intrinsic::x86_sse2_pmaxu_b, llvm::Intrinsic::x86_sse2_pmins_w, llvm::Intrinsic::x86_sse2_pminu_b, llvm::Intrinsic::x86_sse2_pmovmskb_128, llvm::Intrinsic::x86_sse2_pmulh_w, llvm::Intrinsic::x86_sse2_pmulhu_w, llvm::Intrinsic::x86_sse2_pmulu_dq, llvm::Intrinsic::x86_sse2_psad_bw, llvm::Intrinsic::x86_sse2_psll_d, llvm::Intrinsic::x86_sse2_psll_dq, llvm::Intrinsic::x86_sse2_psll_dq_bs, llvm::Intrinsic::x86_sse2_psll_q, llvm::Intrinsic::x86_sse2_psll_w, llvm::Intrinsic::x86_sse2_pslli_d, llvm::Intrinsic::x86_sse2_pslli_q, llvm::Intrinsic::x86_sse2_pslli_w, llvm::Intrinsic::x86_sse2_psra_d, llvm::Intrinsic::x86_sse2_psra_w, llvm::Intrinsic::x86_sse2_psrai_d, llvm::Intrinsic::x86_sse2_psrai_w, llvm::Intrinsic::x86_sse2_psrl_d, llvm::Intrinsic::x86_sse2_psrl_dq, llvm::Intrinsic::x86_sse2_psrl_dq_bs, llvm::Intrinsic::x86_sse2_psrl_q, llvm::Intrinsic::x86_sse2_psrl_w, llvm::Intrinsic::x86_sse2_psrli_d, llvm::Intrinsic::x86_sse2_psrli_q, llvm::Intrinsic::x86_sse2_psrli_w, llvm::Intrinsic::x86_sse2_psubs_b, llvm::Intrinsic::x86_sse2_psubs_w, llvm::Intrinsic::x86_sse2_psubus_b, llvm::Intrinsic::x86_sse2_psubus_w, llvm::Intrinsic::x86_sse2_sqrt_pd, llvm::Intrinsic::x86_sse2_sqrt_sd, llvm::Intrinsic::x86_sse2_storel_dq, llvm::Intrinsic::x86_sse2_storeu_dq, llvm::Intrinsic::x86_sse2_storeu_pd, llvm::Intrinsic::x86_sse2_sub_sd, llvm::Intrinsic::x86_sse2_ucomieq_sd, llvm::Intrinsic::x86_sse2_ucomige_sd, llvm::Intrinsic::x86_sse2_ucomigt_sd, llvm::Intrinsic::x86_sse2_ucomile_sd, llvm::Intrinsic::x86_sse2_ucomilt_sd, llvm::Intrinsic::x86_sse2_ucomineq_sd, llvm::Intrinsic::x86_sse3_addsub_pd, llvm::Intrinsic::x86_sse3_addsub_ps, llvm::Intrinsic::x86_sse3_hadd_pd, llvm::Intrinsic::x86_sse3_hadd_ps, llvm::Intrinsic::x86_sse3_hsub_pd, llvm::Intrinsic::x86_sse3_hsub_ps, llvm::Intrinsic::x86_sse3_ldu_dq, llvm::Intrinsic::x86_sse3_monitor, llvm::Intrinsic::x86_sse3_mwait, llvm::Intrinsic::x86_sse41_blendpd, llvm::Intrinsic::x86_sse41_blendps, llvm::Intrinsic::x86_sse41_blendvpd, llvm::Intrinsic::x86_sse41_blendvps, llvm::Intrinsic::x86_sse41_dppd, llvm::Intrinsic::x86_sse41_dpps, llvm::Intrinsic::x86_sse41_extractps, llvm::Intrinsic::x86_sse41_insertps, llvm::Intrinsic::x86_sse41_movntdqa, llvm::Intrinsic::x86_sse41_mpsadbw, llvm::Intrinsic::x86_sse41_packusdw, llvm::Intrinsic::x86_sse41_pblendvb, llvm::Intrinsic::x86_sse41_pblendw, llvm::Intrinsic::x86_sse41_pextrb, llvm::Intrinsic::x86_sse41_pextrd, llvm::Intrinsic::x86_sse41_pextrq, llvm::Intrinsic::x86_sse41_phminposuw, llvm::Intrinsic::x86_sse41_pmaxsb, llvm::Intrinsic::x86_sse41_pmaxsd, llvm::Intrinsic::x86_sse41_pmaxud, llvm::Intrinsic::x86_sse41_pmaxuw, llvm::Intrinsic::x86_sse41_pminsb, llvm::Intrinsic::x86_sse41_pminsd, llvm::Intrinsic::x86_sse41_pminud, llvm::Intrinsic::x86_sse41_pminuw, llvm::Intrinsic::x86_sse41_pmovsxbd, llvm::Intrinsic::x86_sse41_pmovsxbq, llvm::Intrinsic::x86_sse41_pmovsxbw, llvm::Intrinsic::x86_sse41_pmovsxdq, llvm::Intrinsic::x86_sse41_pmovsxwd, llvm::Intrinsic::x86_sse41_pmovsxwq, llvm::Intrinsic::x86_sse41_pmovzxbd, llvm::Intrinsic::x86_sse41_pmovzxbq, llvm::Intrinsic::x86_sse41_pmovzxbw, llvm::Intrinsic::x86_sse41_pmovzxdq, llvm::Intrinsic::x86_sse41_pmovzxwd, llvm::Intrinsic::x86_sse41_pmovzxwq, llvm::Intrinsic::x86_sse41_pmuldq, llvm::Intrinsic::x86_sse41_ptestc, llvm::Intrinsic::x86_sse41_ptestnzc, llvm::Intrinsic::x86_sse41_ptestz, llvm::Intrinsic::x86_sse41_round_pd, llvm::Intrinsic::x86_sse41_round_ps, llvm::Intrinsic::x86_sse41_round_sd, llvm::Intrinsic::x86_sse41_round_ss, llvm::Intrinsic::x86_sse42_crc32_32_16, llvm::Intrinsic::x86_sse42_crc32_32_32, llvm::Intrinsic::x86_sse42_crc32_32_8, llvm::Intrinsic::x86_sse42_crc32_64_64, llvm::Intrinsic::x86_sse42_pcmpestri128, llvm::Intrinsic::x86_sse42_pcmpestria128, llvm::Intrinsic::x86_sse42_pcmpestric128, llvm::Intrinsic::x86_sse42_pcmpestrio128, llvm::Intrinsic::x86_sse42_pcmpestris128, llvm::Intrinsic::x86_sse42_pcmpestriz128, llvm::Intrinsic::x86_sse42_pcmpestrm128, llvm::Intrinsic::x86_sse42_pcmpistri128, llvm::Intrinsic::x86_sse42_pcmpistria128, llvm::Intrinsic::x86_sse42_pcmpistric128, llvm::Intrinsic::x86_sse42_pcmpistrio128, llvm::Intrinsic::x86_sse42_pcmpistris128, llvm::Intrinsic::x86_sse42_pcmpistriz128, llvm::Intrinsic::x86_sse42_pcmpistrm128, llvm::Intrinsic::x86_sse4a_extrq, llvm::Intrinsic::x86_sse4a_extrqi, llvm::Intrinsic::x86_sse4a_insertq, llvm::Intrinsic::x86_sse4a_insertqi, llvm::Intrinsic::x86_sse4a_movnt_sd, llvm::Intrinsic::x86_sse4a_movnt_ss, llvm::Intrinsic::x86_sse_add_ss, llvm::Intrinsic::x86_sse_cmp_ps, llvm::Intrinsic::x86_sse_cmp_ss, llvm::Intrinsic::x86_sse_comieq_ss, llvm::Intrinsic::x86_sse_comige_ss, llvm::Intrinsic::x86_sse_comigt_ss, llvm::Intrinsic::x86_sse_comile_ss, llvm::Intrinsic::x86_sse_comilt_ss, llvm::Intrinsic::x86_sse_comineq_ss, llvm::Intrinsic::x86_sse_cvtpd2pi, llvm::Intrinsic::x86_sse_cvtpi2pd, llvm::Intrinsic::x86_sse_cvtpi2ps, llvm::Intrinsic::x86_sse_cvtps2pi, llvm::Intrinsic::x86_sse_cvtsi2ss, llvm::Intrinsic::x86_sse_cvtsi642ss, llvm::Intrinsic::x86_sse_cvtss2si, llvm::Intrinsic::x86_sse_cvtss2si64, llvm::Intrinsic::x86_sse_cvttpd2pi, llvm::Intrinsic::x86_sse_cvttps2pi, llvm::Intrinsic::x86_sse_cvttss2si, llvm::Intrinsic::x86_sse_cvttss2si64, llvm::Intrinsic::x86_sse_div_ss, llvm::Intrinsic::x86_sse_ldmxcsr, llvm::Intrinsic::x86_sse_max_ps, llvm::Intrinsic::x86_sse_max_ss, llvm::Intrinsic::x86_sse_min_ps, llvm::Intrinsic::x86_sse_min_ss, llvm::Intrinsic::x86_sse_movmsk_ps, llvm::Intrinsic::x86_sse_mul_ss, llvm::Intrinsic::x86_sse_pshuf_w, llvm::Intrinsic::x86_sse_rcp_ps, llvm::Intrinsic::x86_sse_rcp_ss, llvm::Intrinsic::x86_sse_rsqrt_ps, llvm::Intrinsic::x86_sse_rsqrt_ss, llvm::Intrinsic::x86_sse_sfence, llvm::Intrinsic::x86_sse_sqrt_ps, llvm::Intrinsic::x86_sse_sqrt_ss, llvm::Intrinsic::x86_sse_stmxcsr, llvm::Intrinsic::x86_sse_storeu_ps, llvm::Intrinsic::x86_sse_sub_ss, llvm::Intrinsic::x86_sse_ucomieq_ss, llvm::Intrinsic::x86_sse_ucomige_ss, llvm::Intrinsic::x86_sse_ucomigt_ss, llvm::Intrinsic::x86_sse_ucomile_ss, llvm::Intrinsic::x86_sse_ucomilt_ss, llvm::Intrinsic::x86_sse_ucomineq_ss, llvm::Intrinsic::x86_ssse3_pabs_b, llvm::Intrinsic::x86_ssse3_pabs_b_128, llvm::Intrinsic::x86_ssse3_pabs_d, llvm::Intrinsic::x86_ssse3_pabs_d_128, llvm::Intrinsic::x86_ssse3_pabs_w, llvm::Intrinsic::x86_ssse3_pabs_w_128, llvm::Intrinsic::x86_ssse3_phadd_d, llvm::Intrinsic::x86_ssse3_phadd_d_128, llvm::Intrinsic::x86_ssse3_phadd_sw, llvm::Intrinsic::x86_ssse3_phadd_sw_128, llvm::Intrinsic::x86_ssse3_phadd_w, llvm::Intrinsic::x86_ssse3_phadd_w_128, llvm::Intrinsic::x86_ssse3_phsub_d, llvm::Intrinsic::x86_ssse3_phsub_d_128, llvm::Intrinsic::x86_ssse3_phsub_sw, llvm::Intrinsic::x86_ssse3_phsub_sw_128, llvm::Intrinsic::x86_ssse3_phsub_w, llvm::Intrinsic::x86_ssse3_phsub_w_128, llvm::Intrinsic::x86_ssse3_pmadd_ub_sw, llvm::Intrinsic::x86_ssse3_pmadd_ub_sw_128, llvm::Intrinsic::x86_ssse3_pmul_hr_sw, llvm::Intrinsic::x86_ssse3_pmul_hr_sw_128, llvm::Intrinsic::x86_ssse3_pshuf_b, llvm::Intrinsic::x86_ssse3_pshuf_b_128, llvm::Intrinsic::x86_ssse3_psign_b, llvm::Intrinsic::x86_ssse3_psign_b_128, llvm::Intrinsic::x86_ssse3_psign_d, llvm::Intrinsic::x86_ssse3_psign_d_128, llvm::Intrinsic::x86_ssse3_psign_w, llvm::Intrinsic::x86_ssse3_psign_w_128, llvm::Intrinsic::x86_tbm_bextri_u32, llvm::Intrinsic::x86_tbm_bextri_u64, llvm::Intrinsic::x86_vcvtph2ps_128, llvm::Intrinsic::x86_vcvtph2ps_256, llvm::Intrinsic::x86_vcvtps2ph_128, llvm::Intrinsic::x86_vcvtps2ph_256, llvm::Intrinsic::x86_wrfsbase_32, llvm::Intrinsic::x86_wrfsbase_64, llvm::Intrinsic::x86_wrgsbase_32, llvm::Intrinsic::x86_wrgsbase_64, llvm::Intrinsic::x86_xabort, llvm::Intrinsic::x86_xbegin, llvm::Intrinsic::x86_xend, llvm::Intrinsic::x86_xop_vfrcz_pd, llvm::Intrinsic::x86_xop_vfrcz_pd_256, llvm::Intrinsic::x86_xop_vfrcz_ps, llvm::Intrinsic::x86_xop_vfrcz_ps_256, llvm::Intrinsic::x86_xop_vfrcz_sd, llvm::Intrinsic::x86_xop_vfrcz_ss, llvm::Intrinsic::x86_xop_vpcmov, llvm::Intrinsic::x86_xop_vpcmov_256, llvm::Intrinsic::x86_xop_vpcomb, llvm::Intrinsic::x86_xop_vpcomd, llvm::Intrinsic::x86_xop_vpcomq, llvm::Intrinsic::x86_xop_vpcomub, llvm::Intrinsic::x86_xop_vpcomud, llvm::Intrinsic::x86_xop_vpcomuq, llvm::Intrinsic::x86_xop_vpcomuw, llvm::Intrinsic::x86_xop_vpcomw, llvm::Intrinsic::x86_xop_vpermil2pd, llvm::Intrinsic::x86_xop_vpermil2pd_256, llvm::Intrinsic::x86_xop_vpermil2ps, llvm::Intrinsic::x86_xop_vpermil2ps_256, llvm::Intrinsic::x86_xop_vphaddbd, llvm::Intrinsic::x86_xop_vphaddbq, llvm::Intrinsic::x86_xop_vphaddbw, llvm::Intrinsic::x86_xop_vphadddq, llvm::Intrinsic::x86_xop_vphaddubd, llvm::Intrinsic::x86_xop_vphaddubq, llvm::Intrinsic::x86_xop_vphaddubw, llvm::Intrinsic::x86_xop_vphaddudq, llvm::Intrinsic::x86_xop_vphadduwd, llvm::Intrinsic::x86_xop_vphadduwq, llvm::Intrinsic::x86_xop_vphaddwd, llvm::Intrinsic::x86_xop_vphaddwq, llvm::Intrinsic::x86_xop_vphsubbw, llvm::Intrinsic::x86_xop_vphsubdq, llvm::Intrinsic::x86_xop_vphsubwd, llvm::Intrinsic::x86_xop_vpmacsdd, llvm::Intrinsic::x86_xop_vpmacsdqh, llvm::Intrinsic::x86_xop_vpmacsdql, llvm::Intrinsic::x86_xop_vpmacssdd, llvm::Intrinsic::x86_xop_vpmacssdqh, llvm::Intrinsic::x86_xop_vpmacssdql, llvm::Intrinsic::x86_xop_vpmacsswd, llvm::Intrinsic::x86_xop_vpmacssww, llvm::Intrinsic::x86_xop_vpmacswd, llvm::Intrinsic::x86_xop_vpmacsww, llvm::Intrinsic::x86_xop_vpmadcsswd, llvm::Intrinsic::x86_xop_vpmadcswd, llvm::Intrinsic::x86_xop_vpperm, llvm::Intrinsic::x86_xop_vprotb, llvm::Intrinsic::x86_xop_vprotbi, llvm::Intrinsic::x86_xop_vprotd, llvm::Intrinsic::x86_xop_vprotdi, llvm::Intrinsic::x86_xop_vprotq, llvm::Intrinsic::x86_xop_vprotqi, llvm::Intrinsic::x86_xop_vprotw, llvm::Intrinsic::x86_xop_vprotwi, llvm::Intrinsic::x86_xop_vpshab, llvm::Intrinsic::x86_xop_vpshad, llvm::Intrinsic::x86_xop_vpshaq, llvm::Intrinsic::x86_xop_vpshaw, llvm::Intrinsic::x86_xop_vpshlb, llvm::Intrinsic::x86_xop_vpshld, llvm::Intrinsic::x86_xop_vpshlq, llvm::Intrinsic::x86_xop_vpshlw, llvm::Intrinsic::x86_xtest, llvm::Intrinsic::xcore_bitrev, llvm::Intrinsic::xcore_checkevent, llvm::Intrinsic::xcore_chkct, llvm::Intrinsic::xcore_clre, llvm::Intrinsic::xcore_clrsr, llvm::Intrinsic::xcore_crc32, llvm::Intrinsic::xcore_crc8, llvm::Intrinsic::xcore_eeu, llvm::Intrinsic::xcore_endin, llvm::Intrinsic::xcore_freer, llvm::Intrinsic::xcore_geted, llvm::Intrinsic::xcore_getet, llvm::Intrinsic::xcore_getid, llvm::Intrinsic::xcore_getps, llvm::Intrinsic::xcore_getr, llvm::Intrinsic::xcore_getst, llvm::Intrinsic::xcore_getts, llvm::Intrinsic::xcore_in, llvm::Intrinsic::xcore_inct, llvm::Intrinsic::xcore_initcp, llvm::Intrinsic::xcore_initdp, llvm::Intrinsic::xcore_initlr, llvm::Intrinsic::xcore_initpc, llvm::Intrinsic::xcore_initsp, llvm::Intrinsic::xcore_inshr, llvm::Intrinsic::xcore_int, llvm::Intrinsic::xcore_mjoin, llvm::Intrinsic::xcore_msync, llvm::Intrinsic::xcore_out, llvm::Intrinsic::xcore_outct, llvm::Intrinsic::xcore_outshr, llvm::Intrinsic::xcore_outt, llvm::Intrinsic::xcore_peek, llvm::Intrinsic::xcore_setc, llvm::Intrinsic::xcore_setclk, llvm::Intrinsic::xcore_setd, llvm::Intrinsic::xcore_setev, llvm::Intrinsic::xcore_setps, llvm::Intrinsic::xcore_setpsc, llvm::Intrinsic::xcore_setpt, llvm::Intrinsic::xcore_setrdy, llvm::Intrinsic::xcore_setsr, llvm::Intrinsic::xcore_settw, llvm::Intrinsic::xcore_setv, llvm::Intrinsic::xcore_sext, llvm::Intrinsic::xcore_ssync, llvm::Intrinsic::xcore_syncr, llvm::Intrinsic::xcore_testct, llvm::Intrinsic::xcore_testwct, llvm::Intrinsic::xcore_waitevent, llvm::Intrinsic::xcore_zext, llvm::Intrinsic::num_intrinsics }

Functions
std::string	llvm::Intrinsic::getName (ID id, ArrayRef< Type * > Tys=None)

FunctionType *	llvm::Intrinsic::getType (LLVMContext &Context, ID id, ArrayRef< Type * > Tys=None)

bool	llvm::Intrinsic::isOverloaded (ID id)

AttributeSet	llvm::Intrinsic::getAttributes (LLVMContext &C, ID id)

Function *	llvm::Intrinsic::getDeclaration (Module M, ID id, ArrayRef< Type > Tys=None)

ID	llvm::Intrinsic::getIntrinsicForGCCBuiltin (const char Prefix, const char BuiltinName)
	Map a GCC builtin name to an intrinsic ID. More...

void	llvm::Intrinsic::getIntrinsicInfoTableEntries (ID id, SmallVectorImpl< IITDescriptor > &T)

Macro Definition Documentation

#define GET_INTRINSIC_ENUM_VALUES

Definition at line 40 of file Intrinsics.h.

Classes

Namespaces

Macros

Enumerations

Functions

Macro Definition Documentation