llvm::MachineRegisterInfo Member List

This is the complete list of members for llvm::MachineRegisterInfo, including all inherited members.

addLiveIn(unsigned Reg, unsigned vreg=0)	llvm::MachineRegisterInfo	inline
addPhysRegsUsedFromRegMask(const uint32_t *RegMask)	llvm::MachineRegisterInfo	inline
addRegOperandToUseList(MachineOperand *MO)	llvm::MachineRegisterInfo
canReserveReg(unsigned PhysReg) const	llvm::MachineRegisterInfo	inline
clearKillFlags(unsigned Reg) const	llvm::MachineRegisterInfo
clearVirtRegs()	llvm::MachineRegisterInfo
constrainRegClass(unsigned Reg, const TargetRegisterClass *RC, unsigned MinNumRegs=0)	llvm::MachineRegisterInfo
createVirtualRegister(const TargetRegisterClass *RegClass)	llvm::MachineRegisterInfo
def_begin(unsigned RegNo) const	llvm::MachineRegisterInfo	inline
def_empty(unsigned RegNo) const	llvm::MachineRegisterInfo	inline
def_end()	llvm::MachineRegisterInfo	inlinestatic
def_iterator typedef	llvm::MachineRegisterInfo
defusechain_iterator class	llvm::MachineRegisterInfo	friend
dumpUses(unsigned RegNo) const	llvm::MachineRegisterInfo
EmitLiveInCopies(MachineBasicBlock *EntryMBB, const TargetRegisterInfo &TRI, const TargetInstrInfo &TII)	llvm::MachineRegisterInfo
freezeReservedRegs(const MachineFunction &)	llvm::MachineRegisterInfo
getLiveInPhysReg(unsigned VReg) const	llvm::MachineRegisterInfo
getLiveInVirtReg(unsigned PReg) const	llvm::MachineRegisterInfo
getNumVirtRegs() const	llvm::MachineRegisterInfo	inline
getPressureSets(unsigned RegUnit) const	llvm::MachineRegisterInfo	inline
getRegAllocationHint(unsigned Reg) const	llvm::MachineRegisterInfo	inline
getRegClass(unsigned Reg) const	llvm::MachineRegisterInfo	inline
getReservedRegs() const	llvm::MachineRegisterInfo	inline
getSimpleHint(unsigned Reg) const	llvm::MachineRegisterInfo	inline
getTargetRegisterInfo() const	llvm::MachineRegisterInfo	inline
getUniqueVRegDef(unsigned Reg) const	llvm::MachineRegisterInfo
getVRegDef(unsigned Reg) const	llvm::MachineRegisterInfo
hasOneDef(unsigned RegNo) const	llvm::MachineRegisterInfo	inline
hasOneNonDBGUse(unsigned RegNo) const	llvm::MachineRegisterInfo
hasOneUse(unsigned RegNo) const	llvm::MachineRegisterInfo	inline
invalidateLiveness()	llvm::MachineRegisterInfo	inline
isAllocatable(unsigned PhysReg) const	llvm::MachineRegisterInfo	inline
isConstantPhysReg(unsigned PhysReg, const MachineFunction &MF) const	llvm::MachineRegisterInfo
isLiveIn(unsigned Reg) const	llvm::MachineRegisterInfo
isPhysRegUsed(unsigned Reg) const	llvm::MachineRegisterInfo	inline
isReserved(unsigned PhysReg) const	llvm::MachineRegisterInfo	inline
isSSA() const	llvm::MachineRegisterInfo	inline
leaveSSA()	llvm::MachineRegisterInfo	inline
livein_begin() const	llvm::MachineRegisterInfo	inline
livein_empty() const	llvm::MachineRegisterInfo	inline
livein_end() const	llvm::MachineRegisterInfo	inline
livein_iterator typedef	llvm::MachineRegisterInfo
MachineRegisterInfo(const TargetMachine &TM)	llvm::MachineRegisterInfo	explicit
moveOperands(MachineOperand *Dst, MachineOperand *Src, unsigned NumOps)	llvm::MachineRegisterInfo
recomputeRegClass(unsigned Reg, const TargetMachine &)	llvm::MachineRegisterInfo
reg_begin(unsigned RegNo) const	llvm::MachineRegisterInfo	inline
reg_empty(unsigned RegNo) const	llvm::MachineRegisterInfo	inline
reg_end()	llvm::MachineRegisterInfo	inlinestatic
reg_iterator typedef	llvm::MachineRegisterInfo
reg_nodbg_begin(unsigned RegNo) const	llvm::MachineRegisterInfo	inline
reg_nodbg_empty(unsigned RegNo) const	llvm::MachineRegisterInfo	inline
reg_nodbg_end()	llvm::MachineRegisterInfo	inlinestatic
reg_nodbg_iterator typedef	llvm::MachineRegisterInfo
removeRegOperandFromUseList(MachineOperand *MO)	llvm::MachineRegisterInfo
replaceRegWith(unsigned FromReg, unsigned ToReg)	llvm::MachineRegisterInfo
reservedRegsFrozen() const	llvm::MachineRegisterInfo	inline
resetDelegate(Delegate *delegate)	llvm::MachineRegisterInfo	inline
setDelegate(Delegate *delegate)	llvm::MachineRegisterInfo	inline
setPhysRegUnused(unsigned Reg)	llvm::MachineRegisterInfo	inline
setPhysRegUsed(unsigned Reg)	llvm::MachineRegisterInfo	inline
setRegAllocationHint(unsigned Reg, unsigned Type, unsigned PrefReg)	llvm::MachineRegisterInfo	inline
setRegClass(unsigned Reg, const TargetRegisterClass *RC)	llvm::MachineRegisterInfo
setRegUnitUsed(unsigned RegUnit)	llvm::MachineRegisterInfo	inline
tracksLiveness() const	llvm::MachineRegisterInfo	inline
use_begin(unsigned RegNo) const	llvm::MachineRegisterInfo	inline
use_empty(unsigned RegNo) const	llvm::MachineRegisterInfo	inline
use_end()	llvm::MachineRegisterInfo	inlinestatic
use_iterator typedef	llvm::MachineRegisterInfo
use_nodbg_begin(unsigned RegNo) const	llvm::MachineRegisterInfo	inline
use_nodbg_empty(unsigned RegNo) const	llvm::MachineRegisterInfo	inline
use_nodbg_end()	llvm::MachineRegisterInfo	inlinestatic
use_nodbg_iterator typedef	llvm::MachineRegisterInfo
verifyUseList(unsigned Reg) const	llvm::MachineRegisterInfo
verifyUseLists() const	llvm::MachineRegisterInfo
~MachineRegisterInfo()	llvm::MachineRegisterInfo