#include <MachineRegisterInfo.h>

Classes
class	defusechain_iterator

class	Delegate

Public Types
typedef defusechain_iterator < true, true, false >	reg_iterator

typedef defusechain_iterator < true, true, true >	reg_nodbg_iterator

typedef defusechain_iterator < false, true, false >	def_iterator
	def_iterator/def_begin/def_end - Walk all defs of the specified register. More...

typedef defusechain_iterator < true, false, false >	use_iterator
	use_iterator/use_begin/use_end - Walk all uses of the specified register. More...

typedef defusechain_iterator < true, false, true >	use_nodbg_iterator

typedef std::vector< std::pair < unsigned, unsigned > >::const_iterator	livein_iterator

Public Member Functions
	MachineRegisterInfo (const TargetMachine &TM)

	~MachineRegisterInfo ()

const TargetRegisterInfo *	getTargetRegisterInfo () const

void	resetDelegate (Delegate *delegate)

void	setDelegate (Delegate *delegate)

bool	isSSA () const

void	leaveSSA ()

bool	tracksLiveness () const

void	invalidateLiveness ()

void	addRegOperandToUseList (MachineOperand *MO)
	Add MO to the linked list of operands for its register. More...

void	removeRegOperandFromUseList (MachineOperand *MO)
	Remove MO from its use-def list. More...

void	moveOperands (MachineOperand Dst, MachineOperand Src, unsigned NumOps)

void	verifyUseList (unsigned Reg) const
	Verify the sanity of the use list for Reg. More...

void	verifyUseLists () const
	Verify the use list of all registers. More...

reg_iterator	reg_begin (unsigned RegNo) const

bool	reg_empty (unsigned RegNo) const

reg_nodbg_iterator	reg_nodbg_begin (unsigned RegNo) const

bool	reg_nodbg_empty (unsigned RegNo) const

def_iterator	def_begin (unsigned RegNo) const

bool	def_empty (unsigned RegNo) const

bool	hasOneDef (unsigned RegNo) const

use_iterator	use_begin (unsigned RegNo) const

bool	use_empty (unsigned RegNo) const

bool	hasOneUse (unsigned RegNo) const

use_nodbg_iterator	use_nodbg_begin (unsigned RegNo) const

bool	use_nodbg_empty (unsigned RegNo) const

bool	hasOneNonDBGUse (unsigned RegNo) const

void	replaceRegWith (unsigned FromReg, unsigned ToReg)

MachineInstr *	getVRegDef (unsigned Reg) const

MachineInstr *	getUniqueVRegDef (unsigned Reg) const

void	clearKillFlags (unsigned Reg) const

void	dumpUses (unsigned RegNo) const

bool	isConstantPhysReg (unsigned PhysReg, const MachineFunction &MF) const

PSetIterator	getPressureSets (unsigned RegUnit) const

const TargetRegisterClass *	getRegClass (unsigned Reg) const

void	setRegClass (unsigned Reg, const TargetRegisterClass *RC)

const TargetRegisterClass *	constrainRegClass (unsigned Reg, const TargetRegisterClass *RC, unsigned MinNumRegs=0)

bool	recomputeRegClass (unsigned Reg, const TargetMachine &)

unsigned	createVirtualRegister (const TargetRegisterClass *RegClass)

unsigned	getNumVirtRegs () const

void	clearVirtRegs ()
	clearVirtRegs - Remove all virtual registers (after physreg assignment). More...

void	setRegAllocationHint (unsigned Reg, unsigned Type, unsigned PrefReg)

std::pair< unsigned, unsigned >	getRegAllocationHint (unsigned Reg) const

unsigned	getSimpleHint (unsigned Reg) const

bool	isPhysRegUsed (unsigned Reg) const

void	setRegUnitUsed (unsigned RegUnit)

void	setPhysRegUsed (unsigned Reg)

void	addPhysRegsUsedFromRegMask (const uint32_t *RegMask)

void	setPhysRegUnused (unsigned Reg)

void	freezeReservedRegs (const MachineFunction &)

bool	reservedRegsFrozen () const

bool	canReserveReg (unsigned PhysReg) const

const BitVector &	getReservedRegs () const

bool	isReserved (unsigned PhysReg) const

bool	isAllocatable (unsigned PhysReg) const

void	addLiveIn (unsigned Reg, unsigned vreg=0)

livein_iterator	livein_begin () const

livein_iterator	livein_end () const

bool	livein_empty () const

bool	isLiveIn (unsigned Reg) const

unsigned	getLiveInPhysReg (unsigned VReg) const

unsigned	getLiveInVirtReg (unsigned PReg) const

void	EmitLiveInCopies (MachineBasicBlock *EntryMBB, const TargetRegisterInfo &TRI, const TargetInstrInfo &TII)

Static Public Member Functions
static reg_iterator	reg_end ()

static reg_nodbg_iterator	reg_nodbg_end ()

static def_iterator	def_end ()

static use_iterator	use_end ()

static use_nodbg_iterator	use_nodbg_end ()

Friends
template<bool , bool , bool >
class	defusechain_iterator

Detailed Description

MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.

Definition at line 30 of file MachineRegisterInfo.h.

Member Typedef Documentation

typedef defusechain_iterator<false,true,false> llvm::MachineRegisterInfo::def_iterator

def_iterator/def_begin/def_end - Walk all defs of the specified register.

Definition at line 236 of file MachineRegisterInfo.h.

typedef std::vector<std::pair<unsigned,unsigned> >::const_iterator llvm::MachineRegisterInfo::livein_iterator

Definition at line 528 of file MachineRegisterInfo.h.

typedef defusechain_iterator<true,true,false> llvm::MachineRegisterInfo::reg_iterator

reg_iterator/reg_begin/reg_end - Walk all defs and uses of the specified register.

Definition at line 211 of file MachineRegisterInfo.h.

typedef defusechain_iterator<true,true,true> llvm::MachineRegisterInfo::reg_nodbg_iterator

reg_nodbg_iterator/reg_nodbg_begin/reg_nodbg_end - Walk all defs and uses of the specified register, skipping those marked as Debug.

Definition at line 223 of file MachineRegisterInfo.h.

typedef defusechain_iterator<true,false,false> llvm::MachineRegisterInfo::use_iterator

use_iterator/use_begin/use_end - Walk all uses of the specified register.

Definition at line 256 of file MachineRegisterInfo.h.

typedef defusechain_iterator<true,false,true> llvm::MachineRegisterInfo::use_nodbg_iterator

use_nodbg_iterator/use_nodbg_begin/use_nodbg_end - Walk all uses of the specified register, skipping those marked as Debug.

Definition at line 277 of file MachineRegisterInfo.h.

Constructor & Destructor Documentation

MachineRegisterInfo::MachineRegisterInfo ( const TargetMachine & TM )

explicit

Definition at line 25 of file MachineRegisterInfo.cpp.

References llvm::MCRegisterInfo::getNumRegs(), getTargetRegisterInfo(), llvm::Intrinsic::memset, and llvm::BitVector::resize().

MachineRegisterInfo::~MachineRegisterInfo ( )

Definition at line 39 of file MachineRegisterInfo.cpp.

Referenced by llvm::MachineFunction::~MachineFunction().

Member Function Documentation

void llvm::MachineRegisterInfo::addLiveIn	(	unsigned	Reg,
		unsigned	vreg = `0`
	)

inline

addLiveIn - Add the specified register as a live-in. Note that it is an error to add the same register to the same set more than once.

Definition at line 521 of file MachineRegisterInfo.h.

Referenced by llvm::MachineFunction::addLiveIn(), addLiveIn(), llvm::AMDGPUTargetLowering::CreateLiveInRegister(), llvm::HexagonTargetLowering::LowerFormalArguments(), llvm::SystemZTargetLowering::LowerFormalArguments(), llvm::SparcTargetLowering::LowerFormalArguments_32(), and llvm::R600TargetLowering::LowerOperation().

void llvm::MachineRegisterInfo::addPhysRegsUsedFromRegMask ( const uint32_t * RegMask )

inline

addPhysRegsUsedFromRegMask - Mark any registers not in RegMask as used. This corresponds to the bit mask attached to register mask operands.

Definition at line 442 of file MachineRegisterInfo.h.

References llvm::BitVector::setBitsNotInMask().

void MachineRegisterInfo::addRegOperandToUseList ( MachineOperand * MO )

Add MO to the linked list of operands for its register.

Definition at line 180 of file MachineRegisterInfo.cpp.

References llvm::MachineOperand::getReg(), llvm::MachineOperand::isDef(), and llvm::MachineOperand::Reg.

Referenced by llvm::MachineInstr::addOperand(), llvm::MachineOperand::ChangeToRegister(), llvm::MachineOperand::setIsDef(), and llvm::MachineOperand::setReg().

bool llvm::MachineRegisterInfo::canReserveReg ( unsigned PhysReg ) const

inline

canReserveReg - Returns true if PhysReg can be used as a reserved register. Any register can be reserved before freezeReservedRegs() is called.

Definition at line 481 of file MachineRegisterInfo.h.

References reservedRegsFrozen(), and llvm::BitVector::test().

Referenced by llvm::X86RegisterInfo::canRealignStack(), and llvm::ARMBaseRegisterInfo::canRealignStack().

void MachineRegisterInfo::clearKillFlags ( unsigned Reg ) const

clearKillFlags - Iterate over all the uses of the given register and clear the kill flag from the MachineOperand. This function is used by optimization passes which extend register lifetimes and need only preserve conservative kill flag information.

Definition at line 338 of file MachineRegisterInfo.cpp.

References use_begin(), and use_end().

Referenced by llvm::HexagonInstrInfo::PredicateInstruction().

void MachineRegisterInfo::clearVirtRegs ( )

clearVirtRegs - Remove all virtual registers (after physreg assignment).

Definition at line 120 of file MachineRegisterInfo.cpp.

References getNumVirtRegs(), llvm::TargetRegisterInfo::index2VirtReg(), llvm_unreachable, and verifyUseList().

Referenced by llvm::PEI::runOnMachineFunction().

const TargetRegisterClass * MachineRegisterInfo::constrainRegClass	(	unsigned	Reg,
		const TargetRegisterClass *	RC,
		unsigned	MinNumRegs = `0`
	)

constrainRegClass - Constrain the register class of the specified virtual register to be a common subclass of RC and the current register class, but only if the new class has at least MinNumRegs registers. Return the new register class, or NULL if no such class exists. This should only be used when the constraint is known to be trivial, like GR32 -> GR32_NOSP. Beware of increasing register pressure.

Definition at line 52 of file MachineRegisterInfo.cpp.

References llvm::TargetRegisterInfo::getCommonSubClass(), llvm::TargetRegisterClass::getNumRegs(), getRegClass(), getTargetRegisterInfo(), and setRegClass().

Referenced by llvm::MachineBasicBlock::addLiveIn(), llvm::X86InstrInfo::classifyLEAReg(), llvm::SystemZInstrInfo::convertToThreeAddress(), llvm::X86InstrInfo::convertToThreeAddress(), llvm::AArch64TargetLowering::emitAtomicBinary(), llvm::AArch64TargetLowering::emitAtomicBinaryMinMax(), llvm::AArch64TargetLowering::emitAtomicCmpSwap(), llvm::FastISel::FastEmitInst_extractsubreg(), llvm::Thumb2InstrInfo::loadRegFromStackSlot(), llvm::PPCRegisterInfo::materializeFrameBaseRegister(), llvm::ARMBaseRegisterInfo::materializeFrameBaseRegister(), llvm::ARMBaseInstrInfo::optimizeSelect(), llvm::SelectionDAGISel::runOnMachineFunction(), and llvm::Thumb2InstrInfo::storeRegToStackSlot().

unsigned MachineRegisterInfo::createVirtualRegister ( const TargetRegisterClass * RegClass )

createVirtualRegister - Create and return a new virtual register in the function with the specified register class.

Definition at line 104 of file MachineRegisterInfo.cpp.

References getNumVirtRegs(), llvm::TargetRegisterInfo::index2VirtReg(), llvm::TargetRegisterClass::isAllocatable(), and llvm::MachineRegisterInfo::Delegate::MRI_NoteNewVirtualRegister().

Referenced by llvm::MachineBasicBlock::addLiveIn(), llvm::MachineFunction::addLiveIn(), addLiveIn(), llvm::Mips16InstrInfo::basicLoadImmediate(), llvm::X86InstrInfo::classifyLEAReg(), llvm::LiveRangeEdit::createEmptyIntervalFrom(), llvm::LiveRangeEdit::createFrom(), llvm::AMDGPUTargetLowering::CreateLiveInRegister(), llvm::FastISel::createResultReg(), llvm::HexagonInstrInfo::createVR(), llvm::AArch64RegisterInfo::eliminateFrameIndex(), llvm::Thumb1RegisterInfo::eliminateFrameIndex(), llvm::SystemZRegisterInfo::eliminateFrameIndex(), llvm::PPCRegisterInfo::eliminateFrameIndex(), llvm::ARMBaseRegisterInfo::eliminateFrameIndex(), llvm::AArch64TargetLowering::emitAtomicBinary(), llvm::PPCTargetLowering::EmitAtomicBinary(), llvm::AArch64TargetLowering::emitAtomicBinaryMinMax(), llvm::AArch64TargetLowering::emitAtomicCmpSwap(), llvm::PPCTargetLowering::emitEHSjLjLongJmp(), llvm::PPCTargetLowering::emitEHSjLjSetJmp(), llvm::R600TargetLowering::EmitInstrWithCustomInserter(), llvm::SITargetLowering::EmitInstrWithCustomInserter(), llvm::ARMTargetLowering::EmitInstrWithCustomInserter(), llvm::PPCTargetLowering::EmitInstrWithCustomInserter(), llvm::X86TargetLowering::EmitInstrWithCustomInserter(), llvm::PPCTargetLowering::EmitPartwordAtomicBinary(), llvm::NVPTXFrameLowering::emitPrologue(), llvm::MSP430TargetLowering::EmitShiftInstr(), emitThumbRegPlusImmInReg(), llvm::ARMBaseInstrInfo::FoldImmediate(), forceReg(), llvm::MipsFunctionInfo::getGlobalBaseReg(), llvm::SparcInstrInfo::getGlobalBaseReg(), llvm::X86InstrInfo::getGlobalBaseReg(), llvm::MipsFunctionInfo::getMips16SPAliasReg(), GetRegistersForValue(), InsertNewDef(), llvm::SIInstrInfo::legalizeOperands(), llvm::SIInstrInfo::legalizeOpWithMove(), llvm::PPCRegisterInfo::lowerCRRestore(), llvm::PPCRegisterInfo::lowerCRSpilling(), llvm::PPCRegisterInfo::lowerDynamicAlloc(), llvm::HexagonTargetLowering::LowerFormalArguments(), llvm::SystemZTargetLowering::LowerFormalArguments(), llvm::SparcTargetLowering::LowerFormalArguments_32(), llvm::PPCRegisterInfo::lowerVRSAVERestore(), llvm::PPCRegisterInfo::lowerVRSAVESpilling(), and llvm::SIInstrInfo::moveToVALU().

def_iterator llvm::MachineRegisterInfo::def_begin ( unsigned RegNo ) const

inline

Definition at line 237 of file MachineRegisterInfo.h.

Referenced by llvm::LiveRangeCalc::createDeadDefs(), def_empty(), getUniqueVRegDef(), getVRegDef(), hasOneDef(), isImplicitlyDefined(), isKilled(), MustSaveLR(), and regIsPICBase().

bool llvm::MachineRegisterInfo::def_empty ( unsigned RegNo ) const

inline

def_empty - Return true if there are no instructions defining the specified register (it may be live-in).

Definition at line 244 of file MachineRegisterInfo.h.

References def_begin(), and def_end().

Referenced by llvm::PBQPBuilder::build(), getUniqueVRegDef(), and isConstantPhysReg().

static def_iterator llvm::MachineRegisterInfo::def_end ( )

inlinestatic

Definition at line 240 of file MachineRegisterInfo.h.

Referenced by llvm::LiveRangeCalc::createDeadDefs(), def_empty(), getUniqueVRegDef(), getVRegDef(), hasOneDef(), isImplicitlyDefined(), isKilled(), MustSaveLR(), and regIsPICBase().

void MachineRegisterInfo::dumpUses ( unsigned RegNo ) const

Definition at line 401 of file MachineRegisterInfo.cpp.

References I, use_begin(), and use_end().

void MachineRegisterInfo::EmitLiveInCopies	(	MachineBasicBlock *	EntryMBB,
		const TargetRegisterInfo &	TRI,
		const TargetInstrInfo &	TII
	)

EmitLiveInCopies - Emit copies to initialize livein virtual registers into the given entry block.

Definition at line 371 of file MachineRegisterInfo.cpp.

References llvm::MachineBasicBlock::addLiveIn(), llvm::MachineBasicBlock::begin(), llvm::BuildMI(), llvm::TargetOpcode::COPY, llvm::MCInstrInfo::get(), and use_empty().

Referenced by llvm::SelectionDAGISel::runOnMachineFunction().

void MachineRegisterInfo::freezeReservedRegs ( const MachineFunction & MF )

freezeReservedRegs - Called by the register allocator to freeze the set of reserved registers before allocation begins.

Definition at line 407 of file MachineRegisterInfo.cpp.

References llvm::MCRegisterInfo::getNumRegs(), llvm::TargetRegisterInfo::getReservedRegs(), getTargetRegisterInfo(), and llvm::BitVector::size().

Referenced by llvm::RegAllocBase::init(), and llvm::SelectionDAGISel::runOnMachineFunction().

unsigned MachineRegisterInfo::getLiveInPhysReg ( unsigned VReg ) const

getLiveInPhysReg - If VReg is a live-in virtual register, return the corresponding live-in physical register.

Definition at line 352 of file MachineRegisterInfo.cpp.

References I, livein_begin(), and livein_end().

unsigned MachineRegisterInfo::getLiveInVirtReg ( unsigned PReg ) const

getLiveInVirtReg - If PReg is a live-in physical register, return the corresponding live-in physical register.

Definition at line 361 of file MachineRegisterInfo.cpp.

References I, livein_begin(), and livein_end().

Referenced by llvm::MachineFunction::addLiveIn(), and llvm::AMDGPUTargetLowering::CreateLiveInRegister().

unsigned llvm::MachineRegisterInfo::getNumVirtRegs ( ) const

inline

getNumVirtRegs - Return the number of virtual registers created.

Definition at line 378 of file MachineRegisterInfo.h.

Referenced by llvm::LiveIntervals::addKillFlags(), llvm::LiveVariables::addNewBlock(), llvm::ScheduleDAGInstrs::buildSchedGraph(), clearVirtRegs(), createVirtualRegister(), llvm::VirtRegMap::grow(), llvm::RegPressureTracker::init(), llvm::LiveIntervals::print(), llvm::PEI::runOnMachineFunction(), llvm::LiveIntervals::runOnMachineFunction(), llvm::ScheduleDAGInstrs::ScheduleDAGInstrs(), llvm::MachineBasicBlock::SplitCriticalEdge(), and verifyUseLists().

PSetIterator llvm::MachineRegisterInfo::getPressureSets ( unsigned RegUnit ) const

inline

Get an iterator over the pressure sets affected by the given physical or virtual register. If RegUnit is physical, it must be a register unit (from MCRegUnitIterator).

Definition at line 696 of file MachineRegisterInfo.h.

Referenced by llvm::PressureDiff::addPressureChange(), llvm::RegPressureTracker::decreaseRegPressure(), llvm::RegPressureTracker::discoverLiveIn(), llvm::RegPressureTracker::discoverLiveOut(), llvm::RegPressureTracker::increaseRegPressure(), and llvm::RegPressureTracker::initLiveThru().

std::pair<unsigned, unsigned> llvm::MachineRegisterInfo::getRegAllocationHint ( unsigned Reg ) const

inline

getRegAllocationHint - Return the register allocation hint for the specified virtual register.

Definition at line 393 of file MachineRegisterInfo.h.

Referenced by llvm::VirtRegAuxInfo::calculateSpillWeightAndHint(), llvm::ARMBaseRegisterInfo::getRegAllocationHints(), llvm::TargetRegisterInfo::getRegAllocationHints(), getSimpleHint(), and llvm::ARMBaseRegisterInfo::UpdateRegAllocHint().

const TargetRegisterClass* llvm::MachineRegisterInfo::getRegClass ( unsigned Reg ) const

inline

getRegClass - Return the register class of the specified virtual register.

Definition at line 342 of file MachineRegisterInfo.h.

Referenced by llvm::MachineFunction::addLiveIn(), llvm::RegAllocBase::allocatePhysRegs(), llvm::AllocationOrder::AllocationOrder(), llvm::VirtRegMap::assignVirt2StackSlot(), llvm::PBQPBuilder::build(), llvm::LiveRangeEdit::calculateRegClassAndHint(), canFoldCopy(), llvm::PPCInstrInfo::canInsertSelect(), llvm::X86InstrInfo::canInsertSelect(), llvm::SIInstrInfo::commuteInstruction(), constrainRegClass(), llvm::AMDGPUInstrInfo::convertToISA(), llvm::SystemZInstrInfo::convertToThreeAddress(), copyHint(), llvm::NVPTXInstrInfo::copyPhysReg(), llvm::LiveRangeEdit::createEmptyIntervalFrom(), llvm::LiveRangeEdit::createFrom(), llvm::PPCTargetLowering::emitEHSjLjSetJmp(), llvm::FastISel::FastEmitInst_extractsubreg(), llvm::ARMBaseInstrInfo::FoldImmediate(), llvm::SystemZInstrInfo::foldMemoryOperandImpl(), llvm::X86InstrInfo::foldMemoryOperandImpl(), foldPatchpoint(), GetCostForDef(), llvm::SIInstrInfo::getOpRegClass(), hasVGPROperands(), llvm::MachineSSAUpdater::Initialize(), llvm::X86InstrInfo::insertSelect(), llvm::SIInstrInfo::legalizeOperands(), llvm::X86InstrInfo::optimizeCompareInstr(), llvm::ARMBaseInstrInfo::optimizeSelect(), llvm::MachineInstr::print(), llvm::PSetIterator::PSetIterator(), recomputeRegClass(), llvm::SelectionDAGISel::runOnMachineFunction(), and llvm::CoalescerPair::setRegisters().

const BitVector& llvm::MachineRegisterInfo::getReservedRegs ( ) const

inline

getReservedRegs - Returns a reference to the frozen set of reserved registers. This method should always be preferred to calling TRI::getReservedRegs() when possible.

Definition at line 488 of file MachineRegisterInfo.h.

References reservedRegsFrozen().

Referenced by llvm::RegScavenger::getRegsUsed(), isReserved(), and llvm::RegisterClassInfo::runOnMachineFunction().

unsigned llvm::MachineRegisterInfo::getSimpleHint ( unsigned Reg ) const

inline

getSimpleHint - Return the preferred register allocation hint, or 0 if a standard simple hint (Type == 0) is not set.

Definition at line 399 of file MachineRegisterInfo.h.

References getRegAllocationHint().

const TargetRegisterInfo* llvm::MachineRegisterInfo::getTargetRegisterInfo ( ) const

inline

Definition at line 127 of file MachineRegisterInfo.h.

Referenced by constrainRegClass(), freezeReservedRegs(), isAllocatable(), isConstantPhysReg(), isPhysRegUsed(), MachineRegisterInfo(), llvm::PSetIterator::PSetIterator(), recomputeRegClass(), setPhysRegUnused(), setPhysRegUsed(), llvm::tryFoldSPUpdateIntoPushPop(), verifyUseList(), and verifyUseLists().

MachineInstr * MachineRegisterInfo::getUniqueVRegDef ( unsigned Reg ) const

getUniqueVRegDef - Return the unique machine instr that defines the specified virtual register or null if none is found. If there are multiple definitions or no definition, return null.

Definition at line 319 of file MachineRegisterInfo.cpp.

References def_begin(), def_empty(), def_end(), I, and llvm::next().

Referenced by getDef(), llvm::ARMBaseInstrInfo::optimizeCompareInstr(), llvm::PPCInstrInfo::optimizeCompareInstr(), and llvm::X86InstrInfo::optimizeCompareInstr().

MachineInstr * MachineRegisterInfo::getVRegDef ( unsigned Reg ) const

getVRegDef - Return the machine instr that defines the specified virtual register or null if none is found. This assumes that the code is in SSA form, so there should only be one definition.

Definition at line 308 of file MachineRegisterInfo.cpp.

References llvm::MachineRegisterInfo::defusechain_iterator< Uses, Defs, SkipDebug >::atEnd(), def_begin(), def_end(), I, and llvm::next().

Referenced by canCompareBeNewValueJump(), canFoldIntoMOVCC(), llvm::R600TargetLowering::EmitInstrWithCustomInserter(), llvm::LiveVariables::HandleVirtRegUse(), llvm::LiveVariables::VarInfo::isLiveIn(), MatchingStackOffset(), llvm::X86InstrInfo::optimizeLoadInstr(), llvm::ARMBaseInstrInfo::produceSameValue(), llvm::SelectionDAGISel::runOnMachineFunction(), llvm::LiveVariables::runOnMachineFunction(), and llvm::SSAUpdaterTraits< MachineSSAUpdater >::ValueIsPHI().

bool llvm::MachineRegisterInfo::hasOneDef ( unsigned RegNo ) const

inline

hasOneDef - Return true if there is exactly one instruction defining the specified register.

Definition at line 248 of file MachineRegisterInfo.h.

References def_begin(), and def_end().

Referenced by llvm::ScheduleDAGInstrs::addVRegDefDeps().

bool MachineRegisterInfo::hasOneNonDBGUse ( unsigned RegNo ) const

hasOneNonDBGUse - Return true if there is exactly one non-Debug instruction using the specified register.

Definition at line 327 of file MachineRegisterInfo.cpp.

References use_nodbg_begin(), and use_nodbg_end().

Referenced by canFoldIntoMOVCC(), findOnlyInterestingUse(), llvm::PPCInstrInfo::FoldImmediate(), llvm::ARMBaseInstrInfo::FoldImmediate(), and isOperandKill().

bool llvm::MachineRegisterInfo::hasOneUse ( unsigned RegNo ) const

inline

hasOneUse - Return true if there is exactly one instruction using the specified register.

Definition at line 268 of file MachineRegisterInfo.h.

References use_begin(), and use_end().

Referenced by isKilled(), and llvm::FastISel::tryToFoldLoad().

void llvm::MachineRegisterInfo::invalidateLiveness ( )

inline

invalidateLiveness - Indicates that register liveness is no longer being tracked accurately.

This should be called by late passes that invalidate the liveness information.

Definition at line 179 of file MachineRegisterInfo.h.

Referenced by llvm::BranchFolder::OptimizeFunction().

bool llvm::MachineRegisterInfo::isAllocatable ( unsigned PhysReg ) const

inline

isAllocatable - Returns true when PhysReg belongs to an allocatable register class and it hasn't been reserved.

Allocatable registers may show up in the allocation order of some virtual register, so a register allocator needs to track its liveness and availability.

Definition at line 510 of file MachineRegisterInfo.h.

References getTargetRegisterInfo(), llvm::TargetRegisterInfo::isInAllocatableClass(), and isReserved().

Referenced by llvm::CriticalAntiDepBreaker::BreakAntiDependencies(), llvm::AggressiveAntiDepBreaker::BreakAntiDependencies(), llvm::PBQPBuilderWithCoalescing::build(), llvm::VirtRegAuxInfo::calculateSpillWeightAndHint(), and isConstantPhysReg().

bool MachineRegisterInfo::isConstantPhysReg	(	unsigned	PhysReg,
		const MachineFunction &	MF
	)		const

isConstantPhysReg - Returns true if PhysReg is unallocatable and constant throughout the function. It is safe to move instructions that read such a physreg.

Definition at line 413 of file MachineRegisterInfo.cpp.

References def_empty(), getTargetRegisterInfo(), isAllocatable(), llvm::TargetRegisterInfo::isPhysicalRegister(), and llvm::MCRegAliasIterator::isValid().

bool MachineRegisterInfo::isLiveIn ( unsigned Reg ) const

Definition at line 343 of file MachineRegisterInfo.cpp.

References I, livein_begin(), and livein_end().

Referenced by llvm::X86FrameLowering::adjustForHiPEPrologue(), llvm::X86FrameLowering::adjustForSegmentedStacks(), llvm::AMDGPUTargetLowering::CreateLiveInRegister(), llvm::AArch64FrameLowering::determinePrologueDeath(), and llvm::Thumb1FrameLowering::spillCalleeSavedRegisters().

bool llvm::MachineRegisterInfo::isPhysRegUsed ( unsigned Reg ) const

inline

isPhysRegUsed - Return true if the specified register is used in this function. Also check for clobbered aliases and registers clobbered by function calls with register mask operands.

This only works after register allocation. It is primarily used by PrologEpilogInserter to determine which callee-saved registers need spilling.

Definition at line 416 of file MachineRegisterInfo.h.

References getTargetRegisterInfo(), llvm::MCRegisterInfo::DiffListIterator::isValid(), and llvm::BitVector::test().

Referenced by checkNumAlignedDPRCS2Regs(), llvm::Thumb1FrameLowering::emitEpilogue(), llvm::ARMFrameLowering::emitEpilogue(), HandleVRSaveUpdate(), llvm::SystemZFrameLowering::processFunctionBeforeCalleeSavedScan(), llvm::XCoreFrameLowering::processFunctionBeforeCalleeSavedScan(), llvm::PPCFrameLowering::processFunctionBeforeCalleeSavedScan(), llvm::ARMFrameLowering::processFunctionBeforeCalleeSavedScan(), llvm::AArch64FrameLowering::processFunctionBeforeCalleeSavedScan(), and verifyLeafProcRegUse().

bool llvm::MachineRegisterInfo::isReserved ( unsigned PhysReg ) const

inline

isReserved - Returns true when PhysReg is a reserved register.

Reserved registers may belong to an allocatable register class, but the target has explicitly requested that they are not used.

Definition at line 500 of file MachineRegisterInfo.h.

References getReservedRegs(), and llvm::BitVector::test().

Referenced by llvm::PBQPBuilder::build(), llvm::ARMBaseRegisterInfo::getRegAllocationHints(), llvm::TargetRegisterInfo::getRegAllocationHints(), isAllocatable(), llvm::ARMFrameLowering::processFunctionBeforeCalleeSavedScan(), and llvm::LiveVariables::runOnMachineFunction().

bool llvm::MachineRegisterInfo::isSSA ( ) const

inline

Definition at line 159 of file MachineRegisterInfo.h.

Referenced by llvm::MachineFunction::print(), and llvm::LiveVariables::runOnMachineFunction().

void llvm::MachineRegisterInfo::leaveSSA ( )

inline

Definition at line 162 of file MachineRegisterInfo.h.

livein_iterator llvm::MachineRegisterInfo::livein_begin ( ) const

inline

Definition at line 529 of file MachineRegisterInfo.h.

Referenced by checkFnHasLiveInYmm(), llvm::AMDGPUInstrInfo::getIndirectIndexBegin(), getLiveInPhysReg(), getLiveInVirtReg(), HandleVRSaveUpdate(), isEAXLiveIn(), isLiveIn(), llvm::MachineFunction::print(), and llvm::SelectionDAGISel::runOnMachineFunction().

bool llvm::MachineRegisterInfo::livein_empty ( ) const

inline

Definition at line 531 of file MachineRegisterInfo.h.

Referenced by llvm::AMDGPUInstrInfo::getIndirectIndexBegin(), and llvm::MachineFunction::print().

livein_iterator llvm::MachineRegisterInfo::livein_end ( ) const

inline

Definition at line 530 of file MachineRegisterInfo.h.

Referenced by checkFnHasLiveInYmm(), llvm::AMDGPUInstrInfo::getIndirectIndexBegin(), getLiveInPhysReg(), getLiveInVirtReg(), HandleVRSaveUpdate(), isEAXLiveIn(), isLiveIn(), llvm::MachineFunction::print(), and llvm::SelectionDAGISel::runOnMachineFunction().

void MachineRegisterInfo::moveOperands	(	MachineOperand *	Dst,
		MachineOperand *	Src,
		unsigned	NumOps
	)

Move NumOps operands from Src to Dst, updating use-def lists as needed.

The Dst range is assumed to be uninitialized memory. (Or it may contain operands that won't be destroyed, which is OK because the MO destructor is trivial anyway).

The Src and Dst ranges may overlap.

Definition at line 248 of file MachineRegisterInfo.cpp.

References llvm::MachineOperand::getReg(), llvm::MachineOperand::isReg(), and llvm::MachineOperand::Reg.

bool MachineRegisterInfo::recomputeRegClass	(	unsigned	Reg,
		const TargetMachine &	TM
	)

recomputeRegClass - Try to find a legal super-class of Reg's register class that still satisfies the constraints from the instructions using Reg. Returns true if Reg was upgraded.

This method can be used after constraints have been removed from a virtual register, for example after removing instructions or splitting the live range.

Definition at line 69 of file MachineRegisterInfo.cpp.

References llvm::TargetRegisterInfo::getCommonSubClass(), llvm::TargetMachine::getInstrInfo(), llvm::TargetRegisterInfo::getLargestLegalSuperClass(), llvm::TargetRegisterInfo::getMatchingSuperRegClass(), getRegClass(), llvm::TargetRegisterInfo::getSubClassWithSubReg(), getTargetRegisterInfo(), I, reg_nodbg_begin(), reg_nodbg_end(), setRegClass(), and TII.

Referenced by llvm::LiveRangeEdit::calculateRegClassAndHint().

reg_iterator llvm::MachineRegisterInfo::reg_begin ( unsigned RegNo ) const

inline

Definition at line 212 of file MachineRegisterInfo.h.

Referenced by llvm::RegAllocBase::allocatePhysRegs(), llvm::VirtRegAuxInfo::calculateSpillWeightAndHint(), llvm::ConnectedVNInfoEqClasses::Distribute(), llvm::findPHICopyInsertPoint(), reg_empty(), replaceRegWith(), llvm::LiveIntervals::shrinkToUses(), llvm::FastISel::tryToFoldLoad(), usesTheStack(), and verifyUseList().

bool llvm::MachineRegisterInfo::reg_empty ( unsigned RegNo ) const

inline

reg_empty - Return true if there are no instructions using or defining the specified register (it may be live-in).

Definition at line 219 of file MachineRegisterInfo.h.

References reg_begin(), and reg_end().

static reg_iterator llvm::MachineRegisterInfo::reg_end ( )

inlinestatic

Definition at line 215 of file MachineRegisterInfo.h.

Referenced by llvm::ConnectedVNInfoEqClasses::Distribute(), llvm::findPHICopyInsertPoint(), reg_empty(), replaceRegWith(), usesTheStack(), and verifyUseList().

reg_nodbg_iterator llvm::MachineRegisterInfo::reg_nodbg_begin ( unsigned RegNo ) const

inline

Definition at line 224 of file MachineRegisterInfo.h.

Referenced by llvm::LiveRangeCalc::extendToUses(), recomputeRegClass(), and reg_nodbg_empty().

bool llvm::MachineRegisterInfo::reg_nodbg_empty ( unsigned RegNo ) const

inline

reg_nodbg_empty - Return true if the only instructions using or defining Reg are Debug instructions.

Definition at line 231 of file MachineRegisterInfo.h.

References reg_nodbg_begin(), and reg_nodbg_end().

Referenced by llvm::LiveIntervals::addKillFlags(), and llvm::RegAllocBase::allocatePhysRegs().

static reg_nodbg_iterator llvm::MachineRegisterInfo::reg_nodbg_end ( )

inlinestatic

Definition at line 227 of file MachineRegisterInfo.h.

Referenced by llvm::LiveRangeCalc::extendToUses(), recomputeRegClass(), and reg_nodbg_empty().

void MachineRegisterInfo::removeRegOperandFromUseList ( MachineOperand * MO )

Remove MO from its use-def list.

Definition at line 219 of file MachineRegisterInfo.cpp.

References llvm::MachineOperand::getReg(), and llvm::MachineOperand::Reg.

Referenced by llvm::MachineOperand::ChangeToRegister(), llvm::MachineInstr::RemoveOperand(), llvm::MachineOperand::setIsDef(), and llvm::MachineOperand::setReg().

void MachineRegisterInfo::replaceRegWith	(	unsigned	FromReg,
		unsigned	ToReg
	)

replaceRegWith - Replace all instances of FromReg with ToReg in the machine function. This is like llvm-level X->replaceAllUsesWith(Y), except that it also changes any definitions of the register as well.

Note that it is usually necessary to first constrain ToReg's register class to match the FromReg constraints using:

constrainRegClass(ToReg, getRegClass(FromReg))

That function will return NULL if the virtual registers have incompatible constraints.

replaceRegWith - Replace all instances of FromReg with ToReg in the machine function. This is like llvm-level X->replaceAllUsesWith(Y), except that it also changes any definitions of the register as well.

Definition at line 293 of file MachineRegisterInfo.cpp.

References I, reg_begin(), reg_end(), and llvm::MachineOperand::setReg().

Referenced by llvm::SIInstrInfo::moveToVALU(), and llvm::SelectionDAGISel::runOnMachineFunction().

bool llvm::MachineRegisterInfo::reservedRegsFrozen ( ) const

inline

reservedRegsFrozen - Returns true after freezeReservedRegs() was called to ensure the set of reserved registers stays constant.

Definition at line 474 of file MachineRegisterInfo.h.

References llvm::BitVector::empty().

Referenced by canReserveReg(), and getReservedRegs().

void llvm::MachineRegisterInfo::resetDelegate ( Delegate * delegate )

inline

Definition at line 131 of file MachineRegisterInfo.h.

Referenced by llvm::LiveRangeEdit::~LiveRangeEdit().

void llvm::MachineRegisterInfo::setDelegate ( Delegate * delegate )

inline

Definition at line 140 of file MachineRegisterInfo.h.

Referenced by llvm::LiveRangeEdit::LiveRangeEdit().

void llvm::MachineRegisterInfo::setPhysRegUnused ( unsigned Reg )

inline

setPhysRegUnused - Mark the specified register unused in this function. This should only be called during and after register allocation.

Definition at line 448 of file MachineRegisterInfo.h.

References getTargetRegisterInfo(), llvm::MCRegisterInfo::DiffListIterator::isValid(), and llvm::BitVector::reset().

Referenced by llvm::PPCFrameLowering::processFunctionBeforeCalleeSavedScan(), and llvm::XCoreFrameLowering::processFunctionBeforeCalleeSavedScan().

void llvm::MachineRegisterInfo::setPhysRegUsed ( unsigned Reg )

inline

setPhysRegUsed - Mark the specified register used in this function. This should only be called during and after register allocation.

Definition at line 434 of file MachineRegisterInfo.h.

References getTargetRegisterInfo(), llvm::MCRegisterInfo::DiffListIterator::isValid(), and llvm::BitVector::set().

Referenced by llvm::X86FrameLowering::adjustForSegmentedStacks(), llvm::LiveRegMatrix::assign(), llvm::PBQPBuilder::build(), checkNumAlignedDPRCS2Regs(), llvm::SystemZFrameLowering::processFunctionBeforeCalleeSavedScan(), llvm::MipsSEFrameLowering::processFunctionBeforeCalleeSavedScan(), llvm::Mips16FrameLowering::processFunctionBeforeCalleeSavedScan(), llvm::X86FrameLowering::processFunctionBeforeCalleeSavedScan(), llvm::ARMFrameLowering::processFunctionBeforeCalleeSavedScan(), and llvm::AArch64FrameLowering::processFunctionBeforeCalleeSavedScan().

void llvm::MachineRegisterInfo::setRegAllocationHint	(	unsigned	Reg,
		unsigned	Type,
		unsigned	PrefReg
	)

inline

setRegAllocationHint - Specify a register allocation hint for the specified virtual register.

Definition at line 385 of file MachineRegisterInfo.h.

References Type.

Referenced by llvm::VirtRegAuxInfo::calculateSpillWeightAndHint(), and llvm::ARMBaseRegisterInfo::UpdateRegAllocHint().

void MachineRegisterInfo::setRegClass	(	unsigned	Reg,
		const TargetRegisterClass *	RC
	)

setRegClass - Set the register class of the specified virtual register.

Definition at line 46 of file MachineRegisterInfo.cpp.

References llvm::TargetRegisterClass::isAllocatable().

Referenced by llvm::SITargetLowering::AdjustInstrPostInstrSelection(), constrainRegClass(), llvm::AMDGPUInstrInfo::convertToISA(), and recomputeRegClass().

void llvm::MachineRegisterInfo::setRegUnitUsed ( unsigned RegUnit )

inline

Mark the specified register unit as used in this function. This should only be called during and after register allocation.

Definition at line 428 of file MachineRegisterInfo.h.

References llvm::BitVector::set().

bool llvm::MachineRegisterInfo::tracksLiveness ( ) const

inline

tracksLiveness - Returns true when tracking register liveness accurately.

While this flag is true, register liveness information in basic block live-in lists and machine instruction operands is accurate. This means it can be used to change the code in ways that affect the values in registers, for example by the register scavenger.

When this flag is false, liveness is no longer reliable.

Definition at line 172 of file MachineRegisterInfo.h.

Referenced by llvm::RegScavenger::enterBasicBlock(), llvm::BranchFolder::OptimizeFunction(), and llvm::MachineFunction::print().

use_iterator llvm::MachineRegisterInfo::use_begin ( unsigned RegNo ) const

inline

Definition at line 257 of file MachineRegisterInfo.h.

Referenced by clearKillFlags(), dumpUses(), hasOneUse(), isDefLiveOut(), llvm::SIInstrInfo::moveToVALU(), llvm::ARMBaseInstrInfo::optimizeCompareInstr(), llvm::PPCInstrInfo::optimizeCompareInstr(), llvm::SelectionDAGISel::runOnMachineFunction(), and use_empty().