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llvm::Mips16InstrInfo Member List

This is the complete list of members for llvm::Mips16InstrInfo, including all inherited members.

AddiuSpImm(int64_t Imm) const llvm::Mips16InstrInfo
adjustStackPtr(unsigned SP, int64_t Amount, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const llvm::Mips16InstrInfo
AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify) const llvm::MipsInstrInfovirtual
AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify, SmallVectorImpl< MachineInstr * > &BranchInstrs) const llvm::MipsInstrInfo
basicLoadImmediate(unsigned FrameReg, int64_t Imm, MachineBasicBlock &MBB, MachineBasicBlock::iterator II, DebugLoc DL, unsigned &NewImm) const llvm::Mips16InstrInfo
BranchType enum namellvm::MipsInstrInfo
BT_Cond enum valuellvm::MipsInstrInfo
BT_CondUncond enum valuellvm::MipsInstrInfo
BT_Indirect enum valuellvm::MipsInstrInfo
BT_NoBranch enum valuellvm::MipsInstrInfo
BT_None enum valuellvm::MipsInstrInfo
BT_Uncond enum valuellvm::MipsInstrInfo
BuildAddiuSpImm(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, int64_t Imm) const llvm::Mips16InstrInfo
copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, DebugLoc DL, unsigned DestReg, unsigned SrcReg, bool KillSrc) const llvm::Mips16InstrInfovirtual
create(MipsTargetMachine &TM)llvm::MipsInstrInfostatic
expandPostRAPseudo(MachineBasicBlock::iterator MI) const llvm::Mips16InstrInfovirtual
genInstrWithNewOpc(unsigned NewOpc, MachineBasicBlock::iterator I) const llvm::MipsInstrInfo
getInlineAsmLength(const char *Str, const MCAsmInfo &MAI) const llvm::Mips16InstrInfo
GetInstSizeInBytes(const MachineInstr *MI) const llvm::MipsInstrInfo
GetMemOperand(MachineBasicBlock &MBB, int FI, unsigned Flag) const llvm::MipsInstrInfoprotected
getOppositeBranchOpc(unsigned Opc) const llvm::Mips16InstrInfovirtual
getRegisterInfo() const llvm::Mips16InstrInfovirtual
InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, const SmallVectorImpl< MachineOperand > &Cond, DebugLoc DL) const llvm::MipsInstrInfovirtual
insertNoop(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI) const llvm::MipsInstrInfovirtual
isLoadFromStackSlot(const MachineInstr *MI, int &FrameIndex) const llvm::Mips16InstrInfovirtual
isStoreToStackSlot(const MachineInstr *MI, int &FrameIndex) const llvm::Mips16InstrInfovirtual
isZeroImm(const MachineOperand &op) const llvm::MipsInstrInfoprotected
loadImmediate(unsigned FrameReg, int64_t Imm, MachineBasicBlock &MBB, MachineBasicBlock::iterator II, DebugLoc DL, unsigned &NewImm) const llvm::Mips16InstrInfo
loadRegFromStack(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI, int64_t Offset) const llvm::Mips16InstrInfovirtual
loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const llvm::MipsInstrInfoinlinevirtual
makeFrame(unsigned SP, int64_t FrameSize, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const llvm::Mips16InstrInfo
Mips16InstrInfo(MipsTargetMachine &TM)llvm::Mips16InstrInfoexplicit
MipsInstrInfo(MipsTargetMachine &TM, unsigned UncondBrOpc)llvm::MipsInstrInfoexplicit
RemoveBranch(MachineBasicBlock &MBB) const llvm::MipsInstrInfovirtual
restoreFrame(unsigned SP, int64_t FrameSize, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const llvm::Mips16InstrInfo
ReverseBranchCondition(SmallVectorImpl< MachineOperand > &Cond) const llvm::MipsInstrInfovirtual
storeRegToStack(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI, int64_t Offset) const llvm::Mips16InstrInfovirtual
storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const llvm::MipsInstrInfoinlinevirtual
TMllvm::MipsInstrInfoprotected
UncondBrOpcllvm::MipsInstrInfoprotected
validImmediate(unsigned Opcode, unsigned Reg, int64_t Amount)llvm::Mips16InstrInfostatic
validSpImm8(int offset)llvm::Mips16InstrInfoinlinestatic