LLVM API Documentation
This is the complete list of members for llvm::Mips16InstrInfo, including all inherited members.
AddiuSpImm(int64_t Imm) const | llvm::Mips16InstrInfo | |
adjustStackPtr(unsigned SP, int64_t Amount, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const | llvm::Mips16InstrInfo | |
AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify) const | llvm::MipsInstrInfo | virtual |
AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify, SmallVectorImpl< MachineInstr * > &BranchInstrs) const | llvm::MipsInstrInfo | |
basicLoadImmediate(unsigned FrameReg, int64_t Imm, MachineBasicBlock &MBB, MachineBasicBlock::iterator II, DebugLoc DL, unsigned &NewImm) const | llvm::Mips16InstrInfo | |
BranchType enum name | llvm::MipsInstrInfo | |
BT_Cond enum value | llvm::MipsInstrInfo | |
BT_CondUncond enum value | llvm::MipsInstrInfo | |
BT_Indirect enum value | llvm::MipsInstrInfo | |
BT_NoBranch enum value | llvm::MipsInstrInfo | |
BT_None enum value | llvm::MipsInstrInfo | |
BT_Uncond enum value | llvm::MipsInstrInfo | |
BuildAddiuSpImm(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, int64_t Imm) const | llvm::Mips16InstrInfo | |
copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, DebugLoc DL, unsigned DestReg, unsigned SrcReg, bool KillSrc) const | llvm::Mips16InstrInfo | virtual |
create(MipsTargetMachine &TM) | llvm::MipsInstrInfo | static |
expandPostRAPseudo(MachineBasicBlock::iterator MI) const | llvm::Mips16InstrInfo | virtual |
genInstrWithNewOpc(unsigned NewOpc, MachineBasicBlock::iterator I) const | llvm::MipsInstrInfo | |
getInlineAsmLength(const char *Str, const MCAsmInfo &MAI) const | llvm::Mips16InstrInfo | |
GetInstSizeInBytes(const MachineInstr *MI) const | llvm::MipsInstrInfo | |
GetMemOperand(MachineBasicBlock &MBB, int FI, unsigned Flag) const | llvm::MipsInstrInfo | protected |
getOppositeBranchOpc(unsigned Opc) const | llvm::Mips16InstrInfo | virtual |
getRegisterInfo() const | llvm::Mips16InstrInfo | virtual |
InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, const SmallVectorImpl< MachineOperand > &Cond, DebugLoc DL) const | llvm::MipsInstrInfo | virtual |
insertNoop(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI) const | llvm::MipsInstrInfo | virtual |
isLoadFromStackSlot(const MachineInstr *MI, int &FrameIndex) const | llvm::Mips16InstrInfo | virtual |
isStoreToStackSlot(const MachineInstr *MI, int &FrameIndex) const | llvm::Mips16InstrInfo | virtual |
isZeroImm(const MachineOperand &op) const | llvm::MipsInstrInfo | protected |
loadImmediate(unsigned FrameReg, int64_t Imm, MachineBasicBlock &MBB, MachineBasicBlock::iterator II, DebugLoc DL, unsigned &NewImm) const | llvm::Mips16InstrInfo | |
loadRegFromStack(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI, int64_t Offset) const | llvm::Mips16InstrInfo | virtual |
loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const | llvm::MipsInstrInfo | inlinevirtual |
makeFrame(unsigned SP, int64_t FrameSize, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const | llvm::Mips16InstrInfo | |
Mips16InstrInfo(MipsTargetMachine &TM) | llvm::Mips16InstrInfo | explicit |
MipsInstrInfo(MipsTargetMachine &TM, unsigned UncondBrOpc) | llvm::MipsInstrInfo | explicit |
RemoveBranch(MachineBasicBlock &MBB) const | llvm::MipsInstrInfo | virtual |
restoreFrame(unsigned SP, int64_t FrameSize, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const | llvm::Mips16InstrInfo | |
ReverseBranchCondition(SmallVectorImpl< MachineOperand > &Cond) const | llvm::MipsInstrInfo | virtual |
storeRegToStack(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI, int64_t Offset) const | llvm::Mips16InstrInfo | virtual |
storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const | llvm::MipsInstrInfo | inlinevirtual |
TM | llvm::MipsInstrInfo | protected |
UncondBrOpc | llvm::MipsInstrInfo | protected |
validImmediate(unsigned Opcode, unsigned Reg, int64_t Amount) | llvm::Mips16InstrInfo | static |
validSpImm8(int offset) | llvm::Mips16InstrInfo | inlinestatic |