#include <Mips16InstrInfo.h>

Inheritance diagram for llvm::Mips16InstrInfo:

Collaboration diagram for llvm::Mips16InstrInfo:

Public Member Functions
	Mips16InstrInfo (MipsTargetMachine &TM)

virtual const MipsRegisterInfo &	getRegisterInfo () const

virtual unsigned	isLoadFromStackSlot (const MachineInstr *MI, int &FrameIndex) const

virtual unsigned	isStoreToStackSlot (const MachineInstr *MI, int &FrameIndex) const

virtual void	copyPhysReg (MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, DebugLoc DL, unsigned DestReg, unsigned SrcReg, bool KillSrc) const

virtual void	storeRegToStack (MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass RC, const TargetRegisterInfo TRI, int64_t Offset) const

virtual void	loadRegFromStack (MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned DestReg, int FrameIndex, const TargetRegisterClass RC, const TargetRegisterInfo TRI, int64_t Offset) const

virtual bool	expandPostRAPseudo (MachineBasicBlock::iterator MI) const

virtual unsigned	getOppositeBranchOpc (unsigned Opc) const

void	makeFrame (unsigned SP, int64_t FrameSize, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const

void	restoreFrame (unsigned SP, int64_t FrameSize, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const

void	adjustStackPtr (unsigned SP, int64_t Amount, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const
	Adjust SP by Amount bytes. More...

unsigned	loadImmediate (unsigned FrameReg, int64_t Imm, MachineBasicBlock &MBB, MachineBasicBlock::iterator II, DebugLoc DL, unsigned &NewImm) const
	Emit a series of instructions to load an immediate. More...

unsigned	basicLoadImmediate (unsigned FrameReg, int64_t Imm, MachineBasicBlock &MBB, MachineBasicBlock::iterator II, DebugLoc DL, unsigned &NewImm) const

const MCInstrDesc &	AddiuSpImm (int64_t Imm) const

void	BuildAddiuSpImm (MachineBasicBlock &MBB, MachineBasicBlock::iterator I, int64_t Imm) const

unsigned	getInlineAsmLength (const char *Str, const MCAsmInfo &MAI) const

Public Member Functions inherited from llvm::MipsInstrInfo
	MipsInstrInfo (MipsTargetMachine &TM, unsigned UncondBrOpc)

virtual bool	AnalyzeBranch (MachineBasicBlock &MBB, MachineBasicBlock &TBB, MachineBasicBlock &FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify) const
	Branch Analysis. More...

virtual unsigned	RemoveBranch (MachineBasicBlock &MBB) const

virtual unsigned	InsertBranch (MachineBasicBlock &MBB, MachineBasicBlock TBB, MachineBasicBlock FBB, const SmallVectorImpl< MachineOperand > &Cond, DebugLoc DL) const

virtual bool	ReverseBranchCondition (SmallVectorImpl< MachineOperand > &Cond) const

BranchType	AnalyzeBranch (MachineBasicBlock &MBB, MachineBasicBlock &TBB, MachineBasicBlock &FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify, SmallVectorImpl< MachineInstr * > &BranchInstrs) const

virtual void	insertNoop (MachineBasicBlock &MBB, MachineBasicBlock::iterator MI) const
	Insert nop instruction when hazard condition is found. More...

unsigned	GetInstSizeInBytes (const MachineInstr *MI) const
	Return the number of bytes of code the specified instruction may be. More...

virtual void	storeRegToStackSlot (MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass RC, const TargetRegisterInfo TRI) const

virtual void	loadRegFromStackSlot (MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned DestReg, int FrameIndex, const TargetRegisterClass RC, const TargetRegisterInfo TRI) const

MachineInstrBuilder	genInstrWithNewOpc (unsigned NewOpc, MachineBasicBlock::iterator I) const

Static Public Member Functions
static bool	validImmediate (unsigned Opcode, unsigned Reg, int64_t Amount)

static bool	validSpImm8 (int offset)

Static Public Member Functions inherited from llvm::MipsInstrInfo
static const MipsInstrInfo *	create (MipsTargetMachine &TM)

Additional Inherited Members
Public Types inherited from llvm::MipsInstrInfo
enum	BranchType { BT_None, BT_NoBranch, BT_Uncond, BT_Cond, BT_CondUncond, BT_Indirect }

Protected Member Functions inherited from llvm::MipsInstrInfo
bool	isZeroImm (const MachineOperand &op) const

MachineMemOperand *	GetMemOperand (MachineBasicBlock &MBB, int FI, unsigned Flag) const

Protected Attributes inherited from llvm::MipsInstrInfo
MipsTargetMachine &	TM

unsigned	UncondBrOpc

Detailed Description

Definition at line 22 of file Mips16InstrInfo.h.

Constructor & Destructor Documentation

Mips16InstrInfo::Mips16InstrInfo ( MipsTargetMachine & TM )

explicit

Definition at line 39 of file Mips16InstrInfo.cpp.

Member Function Documentation

const MCInstrDesc & Mips16InstrInfo::AddiuSpImm ( int64_t Imm ) const

Definition at line 467 of file Mips16InstrInfo.cpp.

References validSpImm8().

void Mips16InstrInfo::adjustStackPtr	(	unsigned	SP,
		int64_t	Amount,
		MachineBasicBlock &	MBB,
		MachineBasicBlock::iterator	I
	)		const

Adjust SP by Amount bytes.

Definition at line 302 of file Mips16InstrInfo.cpp.

References BuildAddiuSpImm(), and llvm::isInt< 16 >().

Referenced by llvm::Mips16FrameLowering::eliminateCallFramePseudoInstr().

unsigned Mips16InstrInfo::basicLoadImmediate	(	unsigned	FrameReg,
		int64_t	Imm,
		MachineBasicBlock &	MBB,
		MachineBasicBlock::iterator	II,
		DebugLoc	DL,
		unsigned &	NewImm
	)		const

This function generates the sequence of instructions needed to get the result of adding register REG and immediate IMM.

Definition at line 432 of file Mips16InstrInfo.cpp.

References llvm::MachineInstrBuilder::addImm(), llvm::BuildMI(), llvm::MachineRegisterInfo::createVirtualRegister(), llvm::MachineBasicBlock::getParent(), and llvm::MachineFunction::getRegInfo().

void Mips16InstrInfo::BuildAddiuSpImm	(	MachineBasicBlock &	MBB,
		MachineBasicBlock::iterator	I,
		int64_t	Imm
	)		const

Definition at line 475 of file Mips16InstrInfo.cpp.

References llvm::MachineInstrBuilder::addImm(), llvm::BuildMI(), and llvm::MachineBasicBlock::end().

Referenced by adjustStackPtr(), makeFrame(), and restoreFrame().

void Mips16InstrInfo::copyPhysReg	(	MachineBasicBlock &	MBB,
		MachineBasicBlock::iterator	MI,
		DebugLoc	DL,
		unsigned	DestReg,
		unsigned	SrcReg,
		bool	KillSrc
	)		const

virtual

Definition at line 69 of file Mips16InstrInfo.cpp.

References llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), llvm::RegState::Define, and llvm::getKillRegState().

Referenced by loadImmediate().

bool Mips16InstrInfo::expandPostRAPseudo ( MachineBasicBlock::iterator MI ) const

virtual

Definition at line 134 of file Mips16InstrInfo.cpp.

References llvm::MachineBasicBlock::erase(), and llvm::MachineBasicBlock::getParent().

unsigned Mips16InstrInfo::getInlineAsmLength	(	const char *	Str,
		const MCAsmInfo &	MAI
	)		const

Measure the specified inline asm to determine an approximation of its length. Comments (which run till the next SeparatorString or newline) do not count as an instruction. Any other non-whitespace text is considered an instruction, with multiple instructions separated by SeparatorString or newlines. Variable-length instructions are not handled here; this function may be overloaded in the target code to do that. We implement the special case of the .space directive taking only an integer argument, which is the size in bytes. This is used for creating inline code spacing for testing purposes using inline assembly.

Definition at line 518 of file Mips16InstrInfo.cpp.

References llvm::dbgs(), DEBUG, llvm::MCAsmInfo::getCommentString(), llvm::MCAsmInfo::getMaxInstLength(), llvm::MCAsmInfo::getSeparatorString(), llvm::LibFunc::strlen, llvm::LibFunc::strncmp, and llvm::LibFunc::strtol.

unsigned Mips16InstrInfo::getOppositeBranchOpc ( unsigned Opc ) const

virtual

GetOppositeBranchOpc - Return the inverse of the specified opcode, e.g. turning BEQ to BNE.

Implements llvm::MipsInstrInfo.

Definition at line 150 of file Mips16InstrInfo.cpp.

References llvm_unreachable.

const MipsRegisterInfo & Mips16InstrInfo::getRegisterInfo ( ) const

virtual

getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As such, whenever a client has an instance of instruction info, it should always be able to get register info as well (through this method).

Implements llvm::MipsInstrInfo.

Definition at line 43 of file Mips16InstrInfo.cpp.

unsigned Mips16InstrInfo::isLoadFromStackSlot	(	const MachineInstr *	MI,
		int &	FrameIndex
	)		const

virtual

isLoadFromStackSlot - If the specified machine instruction is a direct load from a stack slot, return the virtual or physical register number of the destination along with the FrameIndex of the loaded stack slot. If not, return 0. This predicate must return 0 if the instruction has any side effects other than loading from the stack slot.

Definition at line 53 of file Mips16InstrInfo.cpp.

unsigned Mips16InstrInfo::isStoreToStackSlot	(	const MachineInstr *	MI,
		int &	FrameIndex
	)		const

virtual

isStoreToStackSlot - If the specified machine instruction is a direct store to a stack slot, return the virtual or physical register number of the source reg along with the FrameIndex of the loaded stack slot. If not, return 0. This predicate must return 0 if the instruction has any side effects other than storing to the stack slot.

Definition at line 64 of file Mips16InstrInfo.cpp.

unsigned Mips16InstrInfo::loadImmediate	(	unsigned	FrameReg,
		int64_t	Imm,
		MachineBasicBlock &	MBB,
		MachineBasicBlock::iterator	II,
		DebugLoc	DL,
		unsigned &	NewImm
	)		const

Emit a series of instructions to load an immediate.

This function generates the sequence of instructions needed to get the result of adding register REG and immediate IMM.

Definition at line 314 of file Mips16InstrInfo.cpp.

References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), copyPhysReg(), llvm::RegScavenger::enterBasicBlock(), llvm::BitVector::find_first(), llvm::RegScavenger::forward(), llvm::MachineOperand::getReg(), llvm::RegScavenger::getRegsAvailable(), llvm::MachineOperand::isDef(), llvm::MachineOperand::isReg(), llvm::TargetRegisterInfo::isVirtualRegister(), llvm::RegState::Kill, llvm::next(), llvm::BitVector::reset(), and T1.

void Mips16InstrInfo::loadRegFromStack	(	MachineBasicBlock &	MBB,
		MachineBasicBlock::iterator	MBBI,
		unsigned	DestReg,
		int	FrameIndex,
		const TargetRegisterClass *	RC,
		const TargetRegisterInfo *	TRI,
		int64_t	Offset
	)		const

virtual

Implements llvm::MipsInstrInfo.

Definition at line 119 of file Mips16InstrInfo.cpp.

References llvm::MachineInstrBuilder::addFrameIndex(), llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addMemOperand(), llvm::BuildMI(), llvm::MachineBasicBlock::end(), llvm::MipsInstrInfo::GetMemOperand(), and llvm::MachineMemOperand::MOLoad.

void Mips16InstrInfo::makeFrame	(	unsigned	SP,
		int64_t	FrameSize,
		MachineBasicBlock &	MBB,
		MachineBasicBlock::iterator	I
	)		const

Definition at line 179 of file Mips16InstrInfo.cpp.

References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), BuildAddiuSpImm(), llvm::BuildMI(), llvm::MachineBasicBlock::end(), llvm::isInt< 16 >(), and NeverUseSaveRestore.

Referenced by llvm::Mips16FrameLowering::emitPrologue().

void Mips16InstrInfo::restoreFrame	(	unsigned	SP,
		int64_t	FrameSize,
		MachineBasicBlock &	MBB,
		MachineBasicBlock::iterator	I
	)		const

Definition at line 221 of file Mips16InstrInfo.cpp.

References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), BuildAddiuSpImm(), llvm::BuildMI(), llvm::MachineBasicBlock::end(), llvm::isInt< 16 >(), and NeverUseSaveRestore.

Referenced by llvm::Mips16FrameLowering::emitEpilogue().

void Mips16InstrInfo::storeRegToStack	(	MachineBasicBlock &	MBB,
		MachineBasicBlock::iterator	MBBI,
		unsigned	SrcReg,
		bool	isKill,
		int	FrameIndex,
		const TargetRegisterClass *	RC,
		const TargetRegisterInfo *	TRI,
		int64_t	Offset
	)		const