#include <PPCHazardRecognizers.h>

Inheritance diagram for llvm::PPCHazardRecognizer970:

Collaboration diagram for llvm::PPCHazardRecognizer970:

Public Member Functions
	PPCHazardRecognizer970 (const TargetMachine &TM)

virtual HazardType	getHazardType (SUnit *SU, int Stalls)

virtual void	EmitInstruction (SUnit *SU)

virtual void	AdvanceCycle ()

virtual void	Reset ()

Public Member Functions inherited from llvm::ScheduleHazardRecognizer
	ScheduleHazardRecognizer ()

virtual	~ScheduleHazardRecognizer ()

unsigned	getMaxLookAhead () const

bool	isEnabled () const

virtual bool	atIssueLimit () const

virtual void	RecedeCycle ()

virtual void	EmitNoop ()

Additional Inherited Members
Public Types inherited from llvm::ScheduleHazardRecognizer
enum	HazardType { NoHazard, Hazard, NoopHazard }

Protected Attributes inherited from llvm::ScheduleHazardRecognizer
unsigned	MaxLookAhead

Detailed Description

PPCHazardRecognizer970 - This class defines a finite state automata that models the dispatch logic on the PowerPC 970 (aka G5) processor. This promotes good dispatch group formation and implements noop insertion to avoid structural hazards that cause significant performance penalties (e.g. setting the CTR register then branching through it within a dispatch group), or storing then loading from the same address within a dispatch group.

Definition at line 45 of file PPCHazardRecognizers.h.

Constructor & Destructor Documentation

PPCHazardRecognizer970::PPCHazardRecognizer970 ( const TargetMachine & TM )

Definition at line 74 of file PPCHazardRecognizers.cpp.

Member Function Documentation

void PPCHazardRecognizer970::AdvanceCycle ( )

virtual

AdvanceCycle - This callback is invoked whenever the next top-down instruction to be scheduled cannot issue in the current cycle, either because of latency or resource conflicts. This should increment the internal state of the hazard recognizer so that previously "Hazard" instructions will now not be hazards.

Reimplemented from llvm::ScheduleHazardRecognizer.

Definition at line 235 of file PPCHazardRecognizers.cpp.

void PPCHazardRecognizer970::EmitInstruction ( SUnit * )

virtual

EmitInstruction - This callback is invoked when an instruction is emitted, to advance the hazard state.

Reimplemented from llvm::ScheduleHazardRecognizer.

Definition at line 197 of file PPCHazardRecognizers.cpp.

References llvm::SUnit::getInstr(), llvm::MachineMemOperand::getOffset(), llvm::MachineInstr::getOpcode(), llvm::MachineMemOperand::getSize(), llvm::MachineMemOperand::getValue(), llvm::MachineInstr::isDebugValue(), llvm::MachineInstr::memoperands_begin(), llvm::A64CC::MI, llvm::PPCISD::MTCTR, llvm::PPCII::PPC970_BRU, and llvm::PPCII::PPC970_Pseudo.

ScheduleHazardRecognizer::HazardType PPCHazardRecognizer970::getHazardType	(	SUnit *	SU,
		int	Stalls
	)

virtual

getHazardType - We return hazard for any non-branch instruction that would terminate the dispatch group. We turn NoopHazard for any instructions that wouldn't terminate the dispatch group that would cause a pipeline flush.

Reimplemented from llvm::ScheduleHazardRecognizer.

Definition at line 137 of file PPCHazardRecognizers.cpp.

void PPCHazardRecognizer970::Reset ( )

virtual

Reset - This callback is invoked when a new block of instructions is about to be schedule. The hazard state should be set to an initialized state.

Reimplemented from llvm::ScheduleHazardRecognizer.

Definition at line 242 of file PPCHazardRecognizers.cpp.

The documentation for this class was generated from the following files:

Public Member Functions

Additional Inherited Members

Detailed Description

Constructor & Destructor Documentation

Member Function Documentation