llvm::AArch64ISD Namespace Reference

Enumerations
enum	NodeType {   FIRST_NUMBER = ISD::BUILTIN_OP_END, BR_CC, Call, FPMOV,   EXTR, GOTLoad, BFI, Ret,   SBFX, SELECT_CC, SETCC, TC_RETURN,   TLSDESCCALL, THREAD_POINTER, UBFX, WrapperLarge,   WrapperSmall, NEON_BSL, NEON_MOVIMM, NEON_MVNIMM,   NEON_FMOVIMM, NEON_UZP1, NEON_UZP2, NEON_ZIP1,   NEON_ZIP2, NEON_TRN1, NEON_TRN2, NEON_REV64,   NEON_REV32, NEON_REV16, NEON_CMP, NEON_CMPZ,   NEON_TST, NEON_QSHLs, NEON_QSHLu, NEON_VDUP,   NEON_VDUPLANE, NEON_VEXTRACT, NEON_LD2DUP = ISD::FIRST_TARGET_MEMORY_OPCODE, NEON_LD3DUP,   NEON_LD4DUP, NEON_LD1_UPD, NEON_LD2_UPD, NEON_LD3_UPD,   NEON_LD4_UPD, NEON_LD1x2_UPD, NEON_LD1x3_UPD, NEON_LD1x4_UPD,   NEON_ST1_UPD, NEON_ST2_UPD, NEON_ST3_UPD, NEON_ST4_UPD,   NEON_ST1x2_UPD, NEON_ST1x3_UPD, NEON_ST1x4_UPD, NEON_LD2DUP_UPD,   NEON_LD3DUP_UPD, NEON_LD4DUP_UPD, NEON_LD2LN_UPD, NEON_LD3LN_UPD,   NEON_LD4LN_UPD, NEON_ST2LN_UPD, NEON_ST3LN_UPD, NEON_ST4LN_UPD }

Enumeration Type Documentation

enum llvm::AArch64ISD::NodeType

Enumerator
FIRST_NUMBER
BR_CC
Call
FPMOV
EXTR
GOTLoad
BFI
Ret
SBFX	Extracts a field of contiguous bits from the source and sign extends them into a single register. Arguments are: source; immr; imms. Note these are pre-encoded since DAG matching can't cope with combining LSB and Width into these values itself.
SELECT_CC	This is an A64-ification of the standard LLVM SELECT_CC operation. The main difference is that it only has the values and an A64 condition, which will be produced by a setcc instruction.
SETCC	This serves most of the functions of the LLVM SETCC instruction, for two purposes. First, it prevents optimisations from fiddling with the compare after we've moved the CondCode information onto the SELECT_CC or BR_CC instructions. Second, it gives a legal instruction for the actual comparison. It keeps a record of the condition flags asked for because certain instructions are only valid for a subset of condition codes.
TC_RETURN
TLSDESCCALL
THREAD_POINTER
UBFX	Extracts a field of contiguous bits from the source and zero extends them into a single register. Arguments are: source; immr; imms. Note these are pre-encoded since DAG matching can't cope with combining LSB and Width into these values itself.
WrapperLarge
WrapperSmall
NEON_BSL
NEON_MOVIMM
NEON_MVNIMM
NEON_FMOVIMM
NEON_UZP1
NEON_UZP2
NEON_ZIP1
NEON_ZIP2
NEON_TRN1
NEON_TRN2
NEON_REV64
NEON_REV32
NEON_REV16
NEON_CMP
NEON_CMPZ
NEON_TST
NEON_QSHLs
NEON_QSHLu
NEON_VDUP
NEON_VDUPLANE
NEON_VEXTRACT
NEON_LD2DUP
NEON_LD3DUP
NEON_LD4DUP
NEON_LD1_UPD
NEON_LD2_UPD
NEON_LD3_UPD
NEON_LD4_UPD
NEON_LD1x2_UPD
NEON_LD1x3_UPD
NEON_LD1x4_UPD
NEON_ST1_UPD
NEON_ST2_UPD
NEON_ST3_UPD
NEON_ST4_UPD
NEON_ST1x2_UPD
NEON_ST1x3_UPD
NEON_ST1x4_UPD
NEON_LD2DUP_UPD
NEON_LD3DUP_UPD
NEON_LD4DUP_UPD
NEON_LD2LN_UPD
NEON_LD3LN_UPD
NEON_LD4LN_UPD
NEON_ST2LN_UPD
NEON_ST3LN_UPD
NEON_ST4LN_UPD

Definition at line 26 of file AArch64ISelLowering.h.