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static cl::opt< int > | FMAContractLevel ("nvptx-fma-level", cl::ZeroOrMore, cl::Hidden, cl::desc("NVPTX Specific: FMA contraction (0: don't do it"" 1: do it 2: do it aggressively"), cl::init(2)) |
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static cl::opt< int > | UsePrecDivF32 ("nvptx-prec-divf32", cl::ZeroOrMore, cl::Hidden, cl::desc("NVPTX Specifies: 0 use div.approx, 1 use div.full, 2 use"" IEEE Compliant F32 div.rnd if avaiable."), cl::init(2)) |
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static cl::opt< bool > | UsePrecSqrtF32 ("nvptx-prec-sqrtf32", cl::Hidden, cl::desc("NVPTX Specific: 0 use sqrt.approx, 1 use sqrt.rn."), cl::init(true)) |
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static cl::opt< bool > | FtzEnabled ("nvptx-f32ftz", cl::ZeroOrMore, cl::Hidden, cl::desc("NVPTX Specific: Flush f32 subnormals to sign-preserving zero."), cl::init(false)) |
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#define DEBUG_TYPE "nvptx-isel" |
Definition at line 173 of file NVPTXISelDAGToDAG.cpp.
References llvm::ADDRESS_SPACE_CONST, llvm::ADDRESS_SPACE_GENERIC, llvm::ADDRESS_SPACE_GLOBAL, llvm::ADDRESS_SPACE_LOCAL, llvm::ADDRESS_SPACE_PARAM, llvm::ADDRESS_SPACE_SHARED, llvm::NVPTX::PTXLdStInstCode::CONSTANT, llvm::NVPTX::PTXLdStInstCode::GENERIC, llvm::MemSDNode::getSrcValue(), llvm::Value::getType(), llvm::NVPTX::PTXLdStInstCode::GLOBAL, llvm::NVPTX::PTXLdStInstCode::LOCAL, llvm::NVPTX::PTXLdStInstCode::PARAM, and llvm::NVPTX::PTXLdStInstCode::SHARED.
cl::opt<int> FMAContractLevel("nvptx-fma-level", cl::ZeroOrMore, cl::Hidden, cl::desc("NVPTX Specific: FMA contraction (0: don't do it"" 1: do it 2: do it aggressively"), cl::init(2)) |
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cl::opt<bool> FtzEnabled("nvptx-f32ftz", cl::ZeroOrMore, cl::Hidden, cl::desc("NVPTX Specific: Flush f32 subnormals to sign-preserving zero."), cl::init(false)) |
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cl::opt<int> UsePrecDivF32("nvptx-prec-divf32", cl::ZeroOrMore, cl::Hidden, cl::desc("NVPTX Specifies: 0 use div.approx, 1 use div.full, 2 use"" IEEE Compliant F32 div.rnd if avaiable."), cl::init(2)) |
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cl::opt<bool> UsePrecSqrtF32("nvptx-prec-sqrtf32", cl::Hidden, cl::desc("NVPTX Specific: 0 use sqrt.approx, 1 use sqrt.rn."), cl::init(true)) |
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