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X86InstComments.cpp
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1 //===-- X86InstComments.cpp - Generate verbose-asm comments for instrs ----===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This defines functionality used to emit comments about X86 instructions to
11 // an output stream for -fverbose-asm.
12 //
13 //===----------------------------------------------------------------------===//
14 
15 #include "X86InstComments.h"
16 #include "MCTargetDesc/X86MCTargetDesc.h"
17 #include "Utils/X86ShuffleDecode.h"
18 #include "llvm/MC/MCInst.h"
19 #include "llvm/Support/raw_ostream.h"
20 using namespace llvm;
21 
22 //===----------------------------------------------------------------------===//
23 // Top Level Entrypoint
24 //===----------------------------------------------------------------------===//
25 
26 /// EmitAnyX86InstComments - This function decodes x86 instructions and prints
27 /// newline terminated strings to the specified string if desired. This
28 /// information is shown in disassembly dumps when verbose assembly is enabled.
29 void llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS,
30  const char *(*getRegName)(unsigned)) {
31  // If this is a shuffle operation, the switch should fill in this state.
32  SmallVector<int, 8> ShuffleMask;
33  const char *DestName = 0, *Src1Name = 0, *Src2Name = 0;
34 
35  switch (MI->getOpcode()) {
36  case X86::INSERTPSrr:
37  case X86::VINSERTPSrr:
38  DestName = getRegName(MI->getOperand(0).getReg());
39  Src1Name = getRegName(MI->getOperand(1).getReg());
40  Src2Name = getRegName(MI->getOperand(2).getReg());
41  DecodeINSERTPSMask(MI->getOperand(3).getImm(), ShuffleMask);
42  break;
43 
44  case X86::MOVLHPSrr:
45  case X86::VMOVLHPSrr:
46  Src2Name = getRegName(MI->getOperand(2).getReg());
47  Src1Name = getRegName(MI->getOperand(1).getReg());
48  DestName = getRegName(MI->getOperand(0).getReg());
49  DecodeMOVLHPSMask(2, ShuffleMask);
50  break;
51 
52  case X86::MOVHLPSrr:
53  case X86::VMOVHLPSrr:
54  Src2Name = getRegName(MI->getOperand(2).getReg());
55  Src1Name = getRegName(MI->getOperand(1).getReg());
56  DestName = getRegName(MI->getOperand(0).getReg());
57  DecodeMOVHLPSMask(2, ShuffleMask);
58  break;
59 
60  case X86::PALIGNR128rr:
61  case X86::VPALIGNR128rr:
62  Src1Name = getRegName(MI->getOperand(2).getReg());
63  // FALL THROUGH.
64  case X86::PALIGNR128rm:
65  case X86::VPALIGNR128rm:
66  Src2Name = getRegName(MI->getOperand(1).getReg());
67  DestName = getRegName(MI->getOperand(0).getReg());
68  DecodePALIGNRMask(MVT::v16i8,
69  MI->getOperand(MI->getNumOperands()-1).getImm(),
70  ShuffleMask);
71  break;
72  case X86::VPALIGNR256rr:
73  Src1Name = getRegName(MI->getOperand(2).getReg());
74  // FALL THROUGH.
75  case X86::VPALIGNR256rm:
76  Src2Name = getRegName(MI->getOperand(1).getReg());
77  DestName = getRegName(MI->getOperand(0).getReg());
78  DecodePALIGNRMask(MVT::v32i8,
79  MI->getOperand(MI->getNumOperands()-1).getImm(),
80  ShuffleMask);
81  break;
82 
83  case X86::PSHUFDri:
84  case X86::VPSHUFDri:
85  Src1Name = getRegName(MI->getOperand(1).getReg());
86  // FALL THROUGH.
87  case X86::PSHUFDmi:
88  case X86::VPSHUFDmi:
89  DestName = getRegName(MI->getOperand(0).getReg());
90  DecodePSHUFMask(MVT::v4i32, MI->getOperand(MI->getNumOperands()-1).getImm(),
91  ShuffleMask);
92  break;
93  case X86::VPSHUFDYri:
94  Src1Name = getRegName(MI->getOperand(1).getReg());
95  // FALL THROUGH.
96  case X86::VPSHUFDYmi:
97  DestName = getRegName(MI->getOperand(0).getReg());
98  DecodePSHUFMask(MVT::v8i32, MI->getOperand(MI->getNumOperands()-1).getImm(),
99  ShuffleMask);
100  break;
101 
102 
103  case X86::PSHUFHWri:
104  case X86::VPSHUFHWri:
105  Src1Name = getRegName(MI->getOperand(1).getReg());
106  // FALL THROUGH.
107  case X86::PSHUFHWmi:
108  case X86::VPSHUFHWmi:
109  DestName = getRegName(MI->getOperand(0).getReg());
110  DecodePSHUFHWMask(MVT::v8i16,
111  MI->getOperand(MI->getNumOperands()-1).getImm(),
112  ShuffleMask);
113  break;
114  case X86::VPSHUFHWYri:
115  Src1Name = getRegName(MI->getOperand(1).getReg());
116  // FALL THROUGH.
117  case X86::VPSHUFHWYmi:
118  DestName = getRegName(MI->getOperand(0).getReg());
119  DecodePSHUFHWMask(MVT::v16i16,
120  MI->getOperand(MI->getNumOperands()-1).getImm(),
121  ShuffleMask);
122  break;
123  case X86::PSHUFLWri:
124  case X86::VPSHUFLWri:
125  Src1Name = getRegName(MI->getOperand(1).getReg());
126  // FALL THROUGH.
127  case X86::PSHUFLWmi:
128  case X86::VPSHUFLWmi:
129  DestName = getRegName(MI->getOperand(0).getReg());
130  DecodePSHUFLWMask(MVT::v8i16,
131  MI->getOperand(MI->getNumOperands()-1).getImm(),
132  ShuffleMask);
133  break;
134  case X86::VPSHUFLWYri:
135  Src1Name = getRegName(MI->getOperand(1).getReg());
136  // FALL THROUGH.
137  case X86::VPSHUFLWYmi:
138  DestName = getRegName(MI->getOperand(0).getReg());
139  DecodePSHUFLWMask(MVT::v16i16,
140  MI->getOperand(MI->getNumOperands()-1).getImm(),
141  ShuffleMask);
142  break;
143 
144  case X86::PUNPCKHBWrr:
145  case X86::VPUNPCKHBWrr:
146  Src2Name = getRegName(MI->getOperand(2).getReg());
147  // FALL THROUGH.
148  case X86::PUNPCKHBWrm:
149  case X86::VPUNPCKHBWrm:
150  Src1Name = getRegName(MI->getOperand(1).getReg());
151  DestName = getRegName(MI->getOperand(0).getReg());
152  DecodeUNPCKHMask(MVT::v16i8, ShuffleMask);
153  break;
154  case X86::VPUNPCKHBWYrr:
155  Src2Name = getRegName(MI->getOperand(2).getReg());
156  // FALL THROUGH.
157  case X86::VPUNPCKHBWYrm:
158  Src1Name = getRegName(MI->getOperand(1).getReg());
159  DestName = getRegName(MI->getOperand(0).getReg());
160  DecodeUNPCKHMask(MVT::v32i8, ShuffleMask);
161  break;
162  case X86::PUNPCKHWDrr:
163  case X86::VPUNPCKHWDrr:
164  Src2Name = getRegName(MI->getOperand(2).getReg());
165  // FALL THROUGH.
166  case X86::PUNPCKHWDrm:
167  case X86::VPUNPCKHWDrm:
168  Src1Name = getRegName(MI->getOperand(1).getReg());
169  DestName = getRegName(MI->getOperand(0).getReg());
170  DecodeUNPCKHMask(MVT::v8i16, ShuffleMask);
171  break;
172  case X86::VPUNPCKHWDYrr:
173  Src2Name = getRegName(MI->getOperand(2).getReg());
174  // FALL THROUGH.
175  case X86::VPUNPCKHWDYrm:
176  Src1Name = getRegName(MI->getOperand(1).getReg());
177  DestName = getRegName(MI->getOperand(0).getReg());
178  DecodeUNPCKHMask(MVT::v16i16, ShuffleMask);
179  break;
180  case X86::PUNPCKHDQrr:
181  case X86::VPUNPCKHDQrr:
182  Src2Name = getRegName(MI->getOperand(2).getReg());
183  // FALL THROUGH.
184  case X86::PUNPCKHDQrm:
185  case X86::VPUNPCKHDQrm:
186  Src1Name = getRegName(MI->getOperand(1).getReg());
187  DestName = getRegName(MI->getOperand(0).getReg());
188  DecodeUNPCKHMask(MVT::v4i32, ShuffleMask);
189  break;
190  case X86::VPUNPCKHDQYrr:
191  Src2Name = getRegName(MI->getOperand(2).getReg());
192  // FALL THROUGH.
193  case X86::VPUNPCKHDQYrm:
194  Src1Name = getRegName(MI->getOperand(1).getReg());
195  DestName = getRegName(MI->getOperand(0).getReg());
196  DecodeUNPCKHMask(MVT::v8i32, ShuffleMask);
197  break;
198  case X86::PUNPCKHQDQrr:
199  case X86::VPUNPCKHQDQrr:
200  Src2Name = getRegName(MI->getOperand(2).getReg());
201  // FALL THROUGH.
202  case X86::PUNPCKHQDQrm:
203  case X86::VPUNPCKHQDQrm:
204  Src1Name = getRegName(MI->getOperand(1).getReg());
205  DestName = getRegName(MI->getOperand(0).getReg());
206  DecodeUNPCKHMask(MVT::v2i64, ShuffleMask);
207  break;
208  case X86::VPUNPCKHQDQYrr:
209  Src2Name = getRegName(MI->getOperand(2).getReg());
210  // FALL THROUGH.
211  case X86::VPUNPCKHQDQYrm:
212  Src1Name = getRegName(MI->getOperand(1).getReg());
213  DestName = getRegName(MI->getOperand(0).getReg());
214  DecodeUNPCKHMask(MVT::v4i64, ShuffleMask);
215  break;
216 
217  case X86::PUNPCKLBWrr:
218  case X86::VPUNPCKLBWrr:
219  Src2Name = getRegName(MI->getOperand(2).getReg());
220  // FALL THROUGH.
221  case X86::PUNPCKLBWrm:
222  case X86::VPUNPCKLBWrm:
223  Src1Name = getRegName(MI->getOperand(1).getReg());
224  DestName = getRegName(MI->getOperand(0).getReg());
225  DecodeUNPCKLMask(MVT::v16i8, ShuffleMask);
226  break;
227  case X86::VPUNPCKLBWYrr:
228  Src2Name = getRegName(MI->getOperand(2).getReg());
229  // FALL THROUGH.
230  case X86::VPUNPCKLBWYrm:
231  Src1Name = getRegName(MI->getOperand(1).getReg());
232  DestName = getRegName(MI->getOperand(0).getReg());
233  DecodeUNPCKLMask(MVT::v32i8, ShuffleMask);
234  break;
235  case X86::PUNPCKLWDrr:
236  case X86::VPUNPCKLWDrr:
237  Src2Name = getRegName(MI->getOperand(2).getReg());
238  // FALL THROUGH.
239  case X86::PUNPCKLWDrm:
240  case X86::VPUNPCKLWDrm:
241  Src1Name = getRegName(MI->getOperand(1).getReg());
242  DestName = getRegName(MI->getOperand(0).getReg());
243  DecodeUNPCKLMask(MVT::v8i16, ShuffleMask);
244  break;
245  case X86::VPUNPCKLWDYrr:
246  Src2Name = getRegName(MI->getOperand(2).getReg());
247  // FALL THROUGH.
248  case X86::VPUNPCKLWDYrm:
249  Src1Name = getRegName(MI->getOperand(1).getReg());
250  DestName = getRegName(MI->getOperand(0).getReg());
251  DecodeUNPCKLMask(MVT::v16i16, ShuffleMask);
252  break;
253  case X86::PUNPCKLDQrr:
254  case X86::VPUNPCKLDQrr:
255  Src2Name = getRegName(MI->getOperand(2).getReg());
256  // FALL THROUGH.
257  case X86::PUNPCKLDQrm:
258  case X86::VPUNPCKLDQrm:
259  Src1Name = getRegName(MI->getOperand(1).getReg());
260  DestName = getRegName(MI->getOperand(0).getReg());
261  DecodeUNPCKLMask(MVT::v4i32, ShuffleMask);
262  break;
263  case X86::VPUNPCKLDQYrr:
264  Src2Name = getRegName(MI->getOperand(2).getReg());
265  // FALL THROUGH.
266  case X86::VPUNPCKLDQYrm:
267  Src1Name = getRegName(MI->getOperand(1).getReg());
268  DestName = getRegName(MI->getOperand(0).getReg());
269  DecodeUNPCKLMask(MVT::v8i32, ShuffleMask);
270  break;
271  case X86::PUNPCKLQDQrr:
272  case X86::VPUNPCKLQDQrr:
273  Src2Name = getRegName(MI->getOperand(2).getReg());
274  // FALL THROUGH.
275  case X86::PUNPCKLQDQrm:
276  case X86::VPUNPCKLQDQrm:
277  Src1Name = getRegName(MI->getOperand(1).getReg());
278  DestName = getRegName(MI->getOperand(0).getReg());
279  DecodeUNPCKLMask(MVT::v2i64, ShuffleMask);
280  break;
281  case X86::VPUNPCKLQDQYrr:
282  Src2Name = getRegName(MI->getOperand(2).getReg());
283  // FALL THROUGH.
284  case X86::VPUNPCKLQDQYrm:
285  Src1Name = getRegName(MI->getOperand(1).getReg());
286  DestName = getRegName(MI->getOperand(0).getReg());
287  DecodeUNPCKLMask(MVT::v4i64, ShuffleMask);
288  break;
289 
290  case X86::SHUFPDrri:
291  case X86::VSHUFPDrri:
292  Src2Name = getRegName(MI->getOperand(2).getReg());
293  // FALL THROUGH.
294  case X86::SHUFPDrmi:
295  case X86::VSHUFPDrmi:
296  DecodeSHUFPMask(MVT::v2f64, MI->getOperand(MI->getNumOperands()-1).getImm(),
297  ShuffleMask);
298  Src1Name = getRegName(MI->getOperand(1).getReg());
299  DestName = getRegName(MI->getOperand(0).getReg());
300  break;
301  case X86::VSHUFPDYrri:
302  Src2Name = getRegName(MI->getOperand(2).getReg());
303  // FALL THROUGH.
304  case X86::VSHUFPDYrmi:
305  DecodeSHUFPMask(MVT::v4f64, MI->getOperand(MI->getNumOperands()-1).getImm(),
306  ShuffleMask);
307  Src1Name = getRegName(MI->getOperand(1).getReg());
308  DestName = getRegName(MI->getOperand(0).getReg());
309  break;
310 
311  case X86::SHUFPSrri:
312  case X86::VSHUFPSrri:
313  Src2Name = getRegName(MI->getOperand(2).getReg());
314  // FALL THROUGH.
315  case X86::SHUFPSrmi:
316  case X86::VSHUFPSrmi:
317  DecodeSHUFPMask(MVT::v4f32, MI->getOperand(MI->getNumOperands()-1).getImm(),
318  ShuffleMask);
319  Src1Name = getRegName(MI->getOperand(1).getReg());
320  DestName = getRegName(MI->getOperand(0).getReg());
321  break;
322  case X86::VSHUFPSYrri:
323  Src2Name = getRegName(MI->getOperand(2).getReg());
324  // FALL THROUGH.
325  case X86::VSHUFPSYrmi:
326  DecodeSHUFPMask(MVT::v8f32, MI->getOperand(MI->getNumOperands()-1).getImm(),
327  ShuffleMask);
328  Src1Name = getRegName(MI->getOperand(1).getReg());
329  DestName = getRegName(MI->getOperand(0).getReg());
330  break;
331 
332  case X86::UNPCKLPDrr:
333  case X86::VUNPCKLPDrr:
334  Src2Name = getRegName(MI->getOperand(2).getReg());
335  // FALL THROUGH.
336  case X86::UNPCKLPDrm:
337  case X86::VUNPCKLPDrm:
338  DecodeUNPCKLMask(MVT::v2f64, ShuffleMask);
339  Src1Name = getRegName(MI->getOperand(1).getReg());
340  DestName = getRegName(MI->getOperand(0).getReg());
341  break;
342  case X86::VUNPCKLPDYrr:
343  Src2Name = getRegName(MI->getOperand(2).getReg());
344  // FALL THROUGH.
345  case X86::VUNPCKLPDYrm:
346  DecodeUNPCKLMask(MVT::v4f64, ShuffleMask);
347  Src1Name = getRegName(MI->getOperand(1).getReg());
348  DestName = getRegName(MI->getOperand(0).getReg());
349  break;
350  case X86::UNPCKLPSrr:
351  case X86::VUNPCKLPSrr:
352  Src2Name = getRegName(MI->getOperand(2).getReg());
353  // FALL THROUGH.
354  case X86::UNPCKLPSrm:
355  case X86::VUNPCKLPSrm:
356  DecodeUNPCKLMask(MVT::v4f32, ShuffleMask);
357  Src1Name = getRegName(MI->getOperand(1).getReg());
358  DestName = getRegName(MI->getOperand(0).getReg());
359  break;
360  case X86::VUNPCKLPSYrr:
361  Src2Name = getRegName(MI->getOperand(2).getReg());
362  // FALL THROUGH.
363  case X86::VUNPCKLPSYrm:
364  DecodeUNPCKLMask(MVT::v8f32, ShuffleMask);
365  Src1Name = getRegName(MI->getOperand(1).getReg());
366  DestName = getRegName(MI->getOperand(0).getReg());
367  break;
368  case X86::UNPCKHPDrr:
369  case X86::VUNPCKHPDrr:
370  Src2Name = getRegName(MI->getOperand(2).getReg());
371  // FALL THROUGH.
372  case X86::UNPCKHPDrm:
373  case X86::VUNPCKHPDrm:
374  DecodeUNPCKHMask(MVT::v2f64, ShuffleMask);
375  Src1Name = getRegName(MI->getOperand(1).getReg());
376  DestName = getRegName(MI->getOperand(0).getReg());
377  break;
378  case X86::VUNPCKHPDYrr:
379  Src2Name = getRegName(MI->getOperand(2).getReg());
380  // FALL THROUGH.
381  case X86::VUNPCKHPDYrm:
382  DecodeUNPCKHMask(MVT::v4f64, ShuffleMask);
383  Src1Name = getRegName(MI->getOperand(1).getReg());
384  DestName = getRegName(MI->getOperand(0).getReg());
385  break;
386  case X86::UNPCKHPSrr:
387  case X86::VUNPCKHPSrr:
388  Src2Name = getRegName(MI->getOperand(2).getReg());
389  // FALL THROUGH.
390  case X86::UNPCKHPSrm:
391  case X86::VUNPCKHPSrm:
392  DecodeUNPCKHMask(MVT::v4f32, ShuffleMask);
393  Src1Name = getRegName(MI->getOperand(1).getReg());
394  DestName = getRegName(MI->getOperand(0).getReg());
395  break;
396  case X86::VUNPCKHPSYrr:
397  Src2Name = getRegName(MI->getOperand(2).getReg());
398  // FALL THROUGH.
399  case X86::VUNPCKHPSYrm:
400  DecodeUNPCKHMask(MVT::v8f32, ShuffleMask);
401  Src1Name = getRegName(MI->getOperand(1).getReg());
402  DestName = getRegName(MI->getOperand(0).getReg());
403  break;
404  case X86::VPERMILPSri:
405  Src1Name = getRegName(MI->getOperand(1).getReg());
406  // FALL THROUGH.
407  case X86::VPERMILPSmi:
408  DecodePSHUFMask(MVT::v4f32, MI->getOperand(MI->getNumOperands()-1).getImm(),
409  ShuffleMask);
410  DestName = getRegName(MI->getOperand(0).getReg());
411  break;
412  case X86::VPERMILPSYri:
413  Src1Name = getRegName(MI->getOperand(1).getReg());
414  // FALL THROUGH.
415  case X86::VPERMILPSYmi:
416  DecodePSHUFMask(MVT::v8f32, MI->getOperand(MI->getNumOperands()-1).getImm(),
417  ShuffleMask);
418  DestName = getRegName(MI->getOperand(0).getReg());
419  break;
420  case X86::VPERMILPDri:
421  Src1Name = getRegName(MI->getOperand(1).getReg());
422  // FALL THROUGH.
423  case X86::VPERMILPDmi:
424  DecodePSHUFMask(MVT::v2f64, MI->getOperand(MI->getNumOperands()-1).getImm(),
425  ShuffleMask);
426  DestName = getRegName(MI->getOperand(0).getReg());
427  break;
428  case X86::VPERMILPDYri:
429  Src1Name = getRegName(MI->getOperand(1).getReg());
430  // FALL THROUGH.
431  case X86::VPERMILPDYmi:
432  DecodePSHUFMask(MVT::v4f64, MI->getOperand(MI->getNumOperands()-1).getImm(),
433  ShuffleMask);
434  DestName = getRegName(MI->getOperand(0).getReg());
435  break;
436  case X86::VPERM2F128rr:
437  case X86::VPERM2I128rr:
438  Src2Name = getRegName(MI->getOperand(2).getReg());
439  // FALL THROUGH.
440  case X86::VPERM2F128rm:
441  case X86::VPERM2I128rm:
442  // For instruction comments purpose, assume the 256-bit vector is v4i64.
443  DecodeVPERM2X128Mask(MVT::v4i64,
444  MI->getOperand(MI->getNumOperands()-1).getImm(),
445  ShuffleMask);
446  Src1Name = getRegName(MI->getOperand(1).getReg());
447  DestName = getRegName(MI->getOperand(0).getReg());
448  break;
449  case X86::VPERMQYri:
450  case X86::VPERMPDYri:
451  Src1Name = getRegName(MI->getOperand(1).getReg());
452  // FALL THROUGH.
453  case X86::VPERMQYmi:
454  case X86::VPERMPDYmi:
455  DecodeVPERMMask(MI->getOperand(MI->getNumOperands()-1).getImm(),
456  ShuffleMask);
457  DestName = getRegName(MI->getOperand(0).getReg());
458  break;
459  }
460 
461 
462  // If this was a shuffle operation, print the shuffle mask.
463  if (!ShuffleMask.empty()) {
464  if (DestName == 0) DestName = Src1Name;
465  OS << (DestName ? DestName : "mem") << " = ";
466 
467  // If the two sources are the same, canonicalize the input elements to be
468  // from the first src so that we get larger element spans.
469  if (Src1Name == Src2Name) {
470  for (unsigned i = 0, e = ShuffleMask.size(); i != e; ++i) {
471  if ((int)ShuffleMask[i] >= 0 && // Not sentinel.
472  ShuffleMask[i] >= (int)e) // From second mask.
473  ShuffleMask[i] -= e;
474  }
475  }
476 
477  // The shuffle mask specifies which elements of the src1/src2 fill in the
478  // destination, with a few sentinel values. Loop through and print them
479  // out.
480  for (unsigned i = 0, e = ShuffleMask.size(); i != e; ++i) {
481  if (i != 0)
482  OS << ',';
483  if (ShuffleMask[i] == SM_SentinelZero) {
484  OS << "zero";
485  continue;
486  }
487 
488  // Otherwise, it must come from src1 or src2. Print the span of elements
489  // that comes from this src.
490  bool isSrc1 = ShuffleMask[i] < (int)ShuffleMask.size();
491  const char *SrcName = isSrc1 ? Src1Name : Src2Name;
492  OS << (SrcName ? SrcName : "mem") << '[';
493  bool IsFirst = true;
494  while (i != e &&
495  (int)ShuffleMask[i] >= 0 &&
496  (ShuffleMask[i] < (int)ShuffleMask.size()) == isSrc1) {
497  if (!IsFirst)
498  OS << ',';
499  else
500  IsFirst = false;
501  OS << ShuffleMask[i] % ShuffleMask.size();
502  ++i;
503  }
504  OS << ']';
505  --i; // For loop increments element #.
506  }
507  //MI->print(OS, 0);
508  OS << "\n";
509  }
510 
511 }
llvm::DecodePALIGNRMask
void DecodePALIGNRMask(MVT VT, unsigned Imm, SmallVectorImpl< int > &ShuffleMask)
Definition: X86ShuffleDecode.cpp:64
llvm::DecodeUNPCKLMask
void DecodeUNPCKLMask(MVT VT, SmallVectorImpl< int > &ShuffleMask)
Definition: X86ShuffleDecode.cpp:178
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bool LLVM_ATTRIBUTE_UNUSED_RESULT empty() const
Definition: SmallVector.h:56
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unsigned getReg() const
getReg - Returns the register number.
Definition: MCInst.h:63
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void DecodeMOVLHPSMask(unsigned NElts, SmallVectorImpl< int > &ShuffleMask)
Definition: X86ShuffleDecode.cpp:56
llvm::DecodeSHUFPMask
void DecodeSHUFPMask(MVT VT, unsigned Imm, SmallVectorImpl< int > &ShuffleMask)
Definition: X86ShuffleDecode.cpp:136
llvm::DecodePSHUFLWMask
void DecodePSHUFLWMask(MVT VT, unsigned Imm, SmallVectorImpl< int > &ShuffleMask)
Definition: X86ShuffleDecode.cpp:117
llvm::DecodeINSERTPSMask
void DecodeINSERTPSMask(unsigned Imm, SmallVectorImpl< int > &ShuffleMask)
Definition: X86ShuffleDecode.cpp:23
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void DecodePSHUFMask(MVT VT, unsigned Imm, SmallVectorImpl< int > &ShuffleMask)
Definition: X86ShuffleDecode.cpp:85
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unsigned getOpcode() const
Definition: MCInst.h:158
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int64_t getImm() const
Definition: MCInst.h:74
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void DecodeUNPCKHMask(MVT VT, SmallVectorImpl< int > &ShuffleMask)
Definition: X86ShuffleDecode.cpp:158
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void DecodeVPERM2X128Mask(MVT VT, unsigned Imm, SmallVectorImpl< int > &ShuffleMask)
Definition: X86ShuffleDecode.cpp:195
llvm::DecodePSHUFHWMask
void DecodePSHUFHWMask(MVT VT, unsigned Imm, SmallVectorImpl< int > &ShuffleMask)
Definition: X86ShuffleDecode.cpp:101
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unsigned getNumOperands() const
Definition: MCInst.h:165
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void DecodeVPERMMask(unsigned Imm, SmallVectorImpl< int > &ShuffleMask)
Definition: X86ShuffleDecode.cpp:211
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Definition: raw_ostream.h:31
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void DecodeMOVHLPSMask(unsigned NElts, SmallVectorImpl< int > &ShuffleMask)
Definition: X86ShuffleDecode.cpp:47
raw_ostream.h
llvm::EmitAnyX86InstComments
void EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS, const char *(*getRegName)(unsigned))
Definition: X86InstComments.cpp:29
llvm::MCInst::getOperand
const MCOperand & getOperand(unsigned i) const
Definition: MCInst.h:163

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