LLVM API Documentation
#include "llvm/MC/MCDisassembler.h"
#include "MCTargetDesc/ARMAddressingModes.h"
#include "MCTargetDesc/ARMBaseInfo.h"
#include "MCTargetDesc/ARMMCExpr.h"
#include "llvm/MC/MCContext.h"
#include "llvm/MC/MCExpr.h"
#include "llvm/MC/MCFixedLenDisassembler.h"
#include "llvm/MC/MCInst.h"
#include "llvm/MC/MCInstrDesc.h"
#include "llvm/MC/MCSubtargetInfo.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/LEB128.h"
#include "llvm/Support/MemoryObject.h"
#include "llvm/Support/TargetRegistry.h"
#include "llvm/Support/raw_ostream.h"
#include <vector>
#include "ARMGenDisassemblerTables.inc"
Go to the source code of this file.
Namespaces | |
llvm | |
List of target independent CodeGen pass IDs. | |
Macros | |
#define | DEBUG_TYPE "arm-disassembler" |
Typedefs | |
typedef MCDisassembler::DecodeStatus | DecodeStatus |
Functions | |
static bool | Check (DecodeStatus &Out, DecodeStatus In) |
static DecodeStatus | DecodeGPRRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeGPRnopcRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeGPRwithAPSRRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodetGPRRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodetcGPRRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecoderGPRRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeGPRPairRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeSPRRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeDPRRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeDPR_8RegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeDPR_VFP2RegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeQPRRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeDPairRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeDPairSpacedRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodePredicateOperand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeCCOutOperand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeSOImmOperand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeRegListOperand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeSPRRegListOperand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeDPRRegListOperand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeBitfieldMaskOperand (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeCopMemInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeAddrMode2IdxInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeSORegMemOperand (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeAddrMode3Instruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeSORegImmOperand (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeSORegRegOperand (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeMemMultipleWritebackInstruction (MCInst &Inst, unsigned Insn, uint64_t Adddress, const void *Decoder) |
static DecodeStatus | DecodeT2MOVTWInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeArmMOVTWInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeSMLAInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeCPSInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2CPSInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeAddrModeImm12Operand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeAddrMode5Operand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeAddrMode7Operand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2BInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeBranchImmInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeAddrMode6Operand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVLDST1Instruction (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVLDST2Instruction (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVLDST3Instruction (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVLDST4Instruction (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVLDInstruction (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVSTInstruction (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVLD1DupInstruction (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVLD2DupInstruction (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVLD3DupInstruction (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVLD4DupInstruction (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeNEONModImmInstruction (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVSHLMaxInstruction (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeShiftRight8Imm (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeShiftRight16Imm (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeShiftRight32Imm (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeShiftRight64Imm (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeTBLInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodePostIdxReg (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeCoprocessor (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeMemBarrierOption (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeInstSyncBarrierOption (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeMSRMask (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeDoubleRegLoad (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeDoubleRegStore (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeLDRPreImm (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeLDRPreReg (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeSTRPreImm (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeSTRPreReg (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVLD1LN (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVLD2LN (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVLD3LN (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVLD4LN (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVST1LN (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVST2LN (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVST3LN (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVST4LN (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVMOVSRR (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVMOVRRS (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeSwap (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVCVTD (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVCVTQ (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeThumbAddSpecialReg (MCInst &Inst, uint16_t Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeThumbBROperand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2BROperand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeThumbCmpBROperand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeThumbAddrModeRR (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeThumbAddrModeIS (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeThumbAddrModePC (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeThumbAddrModeSP (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2AddrModeSOReg (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2LoadShift (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2LoadImm8 (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2LoadImm12 (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2LoadT (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2LoadLabel (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2Imm8S4 (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2AddrModeImm8s4 (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2AddrModeImm0_1020s4 (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2Imm8 (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2AddrModeImm8 (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeThumbAddSPImm (MCInst &Inst, uint16_t Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeThumbAddSPReg (MCInst &Inst, uint16_t Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeThumbCPS (MCInst &Inst, uint16_t Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeQADDInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeThumbBLXOffset (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2AddrModeImm12 (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeThumbTableBranch (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeThumb2BCCInstruction (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2SOImm (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeThumbBCCTargetOperand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeThumbBLTargetOperand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeIT (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2LDRDPreInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2STRDPreInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2Adr (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2LdStPre (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2ShifterImmOperand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeLDR (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeMRRC2 (llvm::MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static MCDisassembler * | createARMDisassembler (const Target &T, const MCSubtargetInfo &STI) |
static MCDisassembler * | createThumbDisassembler (const Target &T, const MCSubtargetInfo &STI) |
static bool | tryAddingSymbolicOperand (uint64_t Address, int32_t Value, bool isBranch, uint64_t InstSize, MCInst &MI, const void *Decoder) |
static void | tryAddingPcLoadReferenceComment (uint64_t Address, int Value, const void *Decoder) |
static void | AddThumb1SBit (MCInst &MI, bool InITBlock) |
void | LLVMInitializeARMDisassembler () |
static DecodeStatus | DecodeRFEInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2Adr (MCInst &Inst, uint32_t Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2ShifterImmOperand (MCInst &Inst, uint32_t Val, uint64_t Address, const void *Decoder) |
Variables | |
const MCInstrDesc | llvm::ARMInsts [] |
static const uint16_t | GPRDecoderTable [] |
static const uint16_t | GPRPairDecoderTable [] |
static const uint16_t | SPRDecoderTable [] |
static const uint16_t | DPRDecoderTable [] |
static const uint16_t | QPRDecoderTable [] |
static const uint16_t | DPairDecoderTable [] |
static const uint16_t | DPairSpacedDecoderTable [] |
#define DEBUG_TYPE "arm-disassembler" |
Definition at line 10 of file ARMDisassembler.cpp.
Definition at line 32 of file ARMDisassembler.cpp.
Definition at line 564 of file ARMDisassembler.cpp.
References llvm::ARMInsts, llvm::MCInst::begin(), llvm::MCOperand::CreateReg(), llvm::MCInst::end(), llvm::MCInst::getOpcode(), I, llvm::MCInst::insert(), llvm::MCInstrDesc::NumOperands, llvm::MCInstrDesc::OpInfo, and llvm::MCOperandInfo::RegClass.
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Definition at line 136 of file ARMDisassembler.cpp.
References llvm::MCDisassembler::Fail, llvm::tgtok::In, llvm_unreachable, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
Referenced by DecodeAddrMode2IdxInstruction(), DecodeAddrMode3Instruction(), DecodeAddrMode5Operand(), DecodeAddrMode6Operand(), DecodeAddrModeImm12Operand(), DecodeArmMOVTWInstruction(), DecodeBitfieldMaskOperand(), DecodeBranchImmInstruction(), DecodeCopMemInstruction(), DecodeDoubleRegLoad(), DecodeDoubleRegStore(), DecodeDPRRegListOperand(), DecodeGPRnopcRegisterClass(), DecodeGPRwithAPSRRegisterClass(), DecodeLDR(), DecodeLDRPreImm(), DecodeLDRPreReg(), DecodeMemMultipleWritebackInstruction(), DecodeMRRC2(), DecodeNEONModImmInstruction(), DecodePostIdxReg(), DecodeQADDInstruction(), DecodeRegListOperand(), DecodeRFEInstruction(), DecoderGPRRegisterClass(), DecodeSMLAInstruction(), DecodeSORegImmOperand(), DecodeSORegMemOperand(), DecodeSORegRegOperand(), DecodeSPRRegListOperand(), DecodeSTRPreImm(), DecodeSTRPreReg(), DecodeSwap(), DecodeT2AddrModeImm0_1020s4(), DecodeT2AddrModeImm12(), DecodeT2AddrModeImm8(), DecodeT2AddrModeImm8s4(), DecodeT2AddrModeSOReg(), DecodeT2LDRDPreInstruction(), DecodeT2LdStPre(), DecodeT2LoadImm12(), DecodeT2LoadImm8(), DecodeT2LoadLabel(), DecodeT2LoadShift(), DecodeT2LoadT(), DecodeT2MOVTWInstruction(), DecodeT2STRDPreInstruction(), DecodeTBLInstruction(), DecodeThumb2BCCInstruction(), DecodeThumbAddrModeIS(), DecodeThumbAddrModeRR(), DecodeThumbAddSpecialReg(), DecodeThumbAddSPReg(), DecodeThumbTableBranch(), DecodeVCVTD(), DecodeVCVTQ(), DecodeVLD1DupInstruction(), DecodeVLD1LN(), DecodeVLD2DupInstruction(), DecodeVLD2LN(), DecodeVLD3DupInstruction(), DecodeVLD3LN(), DecodeVLD4DupInstruction(), DecodeVLD4LN(), DecodeVLDInstruction(), DecodeVMOVRRS(), DecodeVMOVSRR(), DecodeVSHLMaxInstruction(), DecodeVST1LN(), DecodeVST2LN(), DecodeVST3LN(), DecodeVST4LN(), and DecodeVSTInstruction().
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Definition at line 407 of file ARMDisassembler.cpp.
Referenced by LLVMInitializeARMDisassembler().
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Definition at line 411 of file ARMDisassembler.cpp.
Referenced by LLVMInitializeARMDisassembler().
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Definition at line 1465 of file ARMDisassembler.cpp.
References llvm::ARM_AM::add, llvm::MCInst::addOperand(), llvm::ARM_AM::asr, Check(), llvm::MCOperand::CreateImm(), llvm::MCOperand::CreateReg(), DecodeGPRnopcRegisterClass(), DecodeGPRRegisterClass(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, llvm::ARM_AM::getAM2Opc(), llvm::MCInst::getOpcode(), llvm::ARMII::IndexModePost, llvm::ARMII::IndexModePre, llvm::ARM_AM::lsl, llvm::ARM_AM::lsr, P, llvm::ARM_AM::ror, llvm::ARM_AM::rrx, llvm::MCDisassembler::SoftFail, llvm::ARM_AM::sub, and llvm::MCDisassembler::Success.
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Definition at line 1614 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::CreateImm(), llvm::MCOperand::CreateReg(), DecodeGPRRegisterClass(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), llvm::ARMII::IndexModePost, llvm::ARMII::IndexModePre, P, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 2136 of file ARMDisassembler.cpp.
References llvm::ARM_AM::add, llvm::MCInst::addOperand(), Check(), llvm::MCOperand::CreateImm(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::ARM_AM::getAM5Opc(), llvm::ARM_AM::sub, and llvm::MCDisassembler::Success.
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Definition at line 2214 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::CreateImm(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
Referenced by DecodeVLDInstruction(), and DecodeVSTInstruction().
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Definition at line 2155 of file ARMDisassembler.cpp.
References DecodeGPRRegisterClass().
Referenced by DecodeLDR().
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Definition at line 2116 of file ARMDisassembler.cpp.
References add(), llvm::MCInst::addOperand(), Check(), llvm::MCOperand::CreateImm(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCDisassembler::Success, and tryAddingPcLoadReferenceComment().
Referenced by DecodeLDRPreImm(), and DecodeSTRPreImm().
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Definition at line 2061 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::CreateImm(), DecodeGPRnopcRegisterClass(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), llvm::MCDisassembler::Success, and tryAddingSymbolicOperand().
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Definition at line 1288 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::CreateImm(), llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 2188 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::CreateImm(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, llvm::MCInst::setOpcode(), llvm::MCDisassembler::Success, and tryAddingSymbolicOperand().
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Definition at line 1112 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateReg(), and llvm::MCDisassembler::Success.
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Definition at line 1315 of file ARMDisassembler.cpp.
References llvm::ARM_AM::add, llvm::MCInst::addOperand(), Check(), llvm::MCOperand::CreateImm(), DecodeGPRRegisterClass(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, llvm::ARM_AM::getAM5Opc(), llvm::MCInst::getOpcode(), llvm::ARM_AM::sub, and llvm::MCDisassembler::Success.
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Definition at line 3817 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
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Definition at line 1948 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), llvm::MCDisassembler::Fail, llvm::MCInst::setOpcode(), llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
Referenced by DecodeQADDInstruction(), DecodeSMLAInstruction(), and DecodeSwap().
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Definition at line 3978 of file ARMDisassembler.cpp.
References Check(), DecodeGPRPairRegisterClass(), DecodeGPRRegisterClass(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 3999 of file ARMDisassembler.cpp.
References Check(), DecodeGPRnopcRegisterClass(), DecodeGPRPairRegisterClass(), DecodeGPRRegisterClass(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 1065 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateReg(), DPairDecoderTable, llvm::MCDisassembler::Fail, Register, and llvm::MCDisassembler::Success.
Referenced by DecodeTBLInstruction(), DecodeVLD1DupInstruction(), DecodeVLD2DupInstruction(), DecodeVLDInstruction(), and DecodeVSTInstruction().
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Definition at line 1086 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateReg(), DPairSpacedDecoderTable, llvm::MCDisassembler::Fail, Register, and llvm::MCDisassembler::Success.
Referenced by DecodeVLD2DupInstruction(), DecodeVLDInstruction(), and DecodeVSTInstruction().
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Definition at line 1022 of file ARMDisassembler.cpp.
References DecodeDPRRegisterClass(), and llvm::MCDisassembler::Fail.
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Definition at line 1030 of file ARMDisassembler.cpp.
References DecodeDPRRegisterClass(), and llvm::MCDisassembler::Fail.
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Definition at line 1012 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateReg(), DPRDecoderTable, llvm::MCDisassembler::Fail, Register, and llvm::MCDisassembler::Success.
Referenced by DecodeDPR_8RegisterClass(), DecodeDPR_VFP2RegisterClass(), DecodeDPRRegListOperand(), DecodeNEONModImmInstruction(), DecodeTBLInstruction(), DecodeVCVTD(), DecodeVLD1DupInstruction(), DecodeVLD1LN(), DecodeVLD2DupInstruction(), DecodeVLD2LN(), DecodeVLD3DupInstruction(), DecodeVLD3LN(), DecodeVLD4DupInstruction(), DecodeVLD4LN(), DecodeVLDInstruction(), DecodeVSHLMaxInstruction(), DecodeVST1LN(), DecodeVST2LN(), DecodeVST3LN(), DecodeVST4LN(), and DecodeVSTInstruction().
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Definition at line 1263 of file ARMDisassembler.cpp.
References Check(), DecodeDPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 887 of file ARMDisassembler.cpp.
References Check(), DecodeGPRRegisterClass(), llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
Referenced by DecodeAddrMode2IdxInstruction(), DecodeArmMOVTWInstruction(), DecodeDoubleRegStore(), DecodeLDR(), DecodeMRRC2(), DecodePostIdxReg(), DecodeQADDInstruction(), DecodeSMLAInstruction(), DecodeSORegRegOperand(), DecodeSwap(), and DecodeT2AddrModeImm0_1020s4().
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Definition at line 926 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateReg(), llvm::MCDisassembler::Fail, GPRPairDecoderTable, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
Referenced by DecodeDoubleRegLoad(), and DecodeDoubleRegStore().
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Definition at line 876 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateReg(), llvm::MCDisassembler::Fail, GPRDecoderTable, Register, and llvm::MCDisassembler::Success.
Referenced by DecodeAddrMode2IdxInstruction(), DecodeAddrMode3Instruction(), DecodeAddrMode5Operand(), DecodeAddrMode6Operand(), DecodeAddrMode7Operand(), DecodeAddrModeImm12Operand(), DecodeCopMemInstruction(), DecodeDoubleRegLoad(), DecodeDoubleRegStore(), DecodeGPRnopcRegisterClass(), DecodeGPRwithAPSRRegisterClass(), DecodeLDRPreImm(), DecodeLDRPreReg(), DecodeMemMultipleWritebackInstruction(), DecodeRegListOperand(), DecodeRFEInstruction(), DecoderGPRRegisterClass(), DecodeSORegImmOperand(), DecodeSORegMemOperand(), DecodeSTRPreImm(), DecodeSTRPreReg(), DecodeT2AddrModeImm12(), DecodeT2AddrModeImm8(), DecodeT2AddrModeImm8s4(), DecodeT2AddrModeSOReg(), DecodeT2LdStPre(), DecodeT2LoadImm12(), DecodeT2LoadImm8(), DecodeT2LoadLabel(), DecodeT2LoadShift(), DecodetGPRRegisterClass(), DecodeThumbAddSPReg(), DecodeThumbTableBranch(), DecodeVLD1DupInstruction(), DecodeVLD1LN(), DecodeVLD2DupInstruction(), DecodeVLD2LN(), DecodeVLD3DupInstruction(), DecodeVLD3LN(), DecodeVLD4DupInstruction(), DecodeVLD4LN(), DecodeVLDInstruction(), DecodeVMOVRRS(), DecodeVMOVSRR(), DecodeVST1LN(), DecodeVST2LN(), DecodeVST3LN(), DecodeVST4LN(), and DecodeVSTInstruction().
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Definition at line 900 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::CreateReg(), DecodeGPRRegisterClass(), and llvm::MCDisassembler::Success.
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Definition at line 3962 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
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Definition at line 4730 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), llvm::MCDisassembler::Fail, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 4934 of file ARMDisassembler.cpp.
References Check(), DecodeAddrMode7Operand(), DecodeGPRnopcRegisterClass(), DecodePostIdxReg(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 4024 of file ARMDisassembler.cpp.
References Check(), DecodeAddrModeImm12Operand(), DecodeGPRRegisterClass(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 4049 of file ARMDisassembler.cpp.
References Check(), DecodeGPRRegisterClass(), DecodePredicateOperand(), DecodeSORegMemOperand(), llvm::MCDisassembler::Fail, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 3953 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
Referenced by DecodeThumb2BCCInstruction().
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Definition at line 1857 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::CreateImm(), DecodeGPRRegisterClass(), DecodePredicateOperand(), DecodeRegListOperand(), DecodeRFEInstruction(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), llvm::MCInst::setOpcode(), and llvm::MCDisassembler::Success.
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Definition at line 4961 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::CreateImm(), DecodeGPRnopcRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 3971 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
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Definition at line 3012 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::CreateImm(), DecodeDPRRegisterClass(), DecodeQPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), and llvm::MCDisassembler::Success.
Referenced by DecodeVCVTD(), and DecodeVCVTQ().
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Definition at line 3780 of file ARMDisassembler.cpp.
References add(), llvm::MCInst::addOperand(), Check(), llvm::MCOperand::CreateImm(), DecodeGPRnopcRegisterClass(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
Referenced by DecodeLDR().
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Definition at line 1098 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::ARMCC::AL, llvm::MCOperand::CreateImm(), llvm::MCOperand::CreateReg(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), and llvm::MCDisassembler::Success.
Referenced by DecodeAddrMode2IdxInstruction(), DecodeAddrMode3Instruction(), DecodeArmMOVTWInstruction(), DecodeBranchImmInstruction(), DecodeCopMemInstruction(), DecodeDoubleRegLoad(), DecodeDoubleRegStore(), DecodeLDR(), DecodeLDRPreImm(), DecodeLDRPreReg(), DecodeMemMultipleWritebackInstruction(), DecodeQADDInstruction(), DecodeSMLAInstruction(), DecodeSTRPreImm(), DecodeSTRPreReg(), DecodeSwap(), DecodeThumb2BCCInstruction(), DecodeVMOVRRS(), and DecodeVMOVSRR().
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Definition at line 1834 of file ARMDisassembler.cpp.
References Check(), DecodeCPSInstruction(), DecodeGPRnopcRegisterClass(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
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Definition at line 1045 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateReg(), llvm::MCDisassembler::Fail, QPRDecoderTable, Register, and llvm::MCDisassembler::Success.
Referenced by DecodeNEONModImmInstruction(), DecodeVCVTQ(), and DecodeVSHLMaxInstruction().
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Definition at line 1202 of file ARMDisassembler.cpp.
References Check(), DecodeGPRRegisterClass(), llvm::MCInst::end(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), llvm::MCInst::getOperand(), llvm::MCOperand::getReg(), llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
Referenced by DecodeMemMultipleWritebackInstruction().
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Definition at line 1805 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::CreateImm(), llvm::ARM_AM::da, llvm::ARM_AM::db, DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::ARM_AM::ia, llvm::ARM_AM::ib, and llvm::MCDisassembler::Success.
Referenced by DecodeMemMultipleWritebackInstruction().
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Definition at line 971 of file ARMDisassembler.cpp.
References Check(), DecodeGPRRegisterClass(), llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
Referenced by DecodeT2AddrModeSOReg(), DecodeT2LDRDPreInstruction(), DecodeT2LoadT(), DecodeT2MOVTWInstruction(), DecodeT2STRDPreInstruction(), and DecodeThumbTableBranch().
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Definition at line 3082 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), and llvm::MCDisassembler::Success.
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Definition at line 3088 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), and llvm::MCDisassembler::Success.
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Definition at line 3094 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), and llvm::MCDisassembler::Success.
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Definition at line 3076 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), and llvm::MCDisassembler::Success.
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Definition at line 2088 of file ARMDisassembler.cpp.
References Check(), DecodeCPSInstruction(), DecodeGPRnopcRegisterClass(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
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Definition at line 1121 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), and llvm::MCDisassembler::Success.
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Definition at line 1130 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::ARM_AM::asr, Check(), llvm::MCOperand::CreateImm(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::ARM_AM::lsl, llvm::ARM_AM::lsr, llvm::ARM_AM::ror, llvm::ARM_AM::rrx, and llvm::MCDisassembler::Success.
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Definition at line 1570 of file ARMDisassembler.cpp.
References llvm::ARM_AM::add, llvm::MCInst::addOperand(), llvm::ARM_AM::asr, Check(), llvm::MCOperand::CreateImm(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::ARM_AM::getAM2Opc(), llvm::ARM_AM::lsl, llvm::ARM_AM::lsr, llvm::ARM_AM::ror, llvm::ARM_AM::rrx, llvm::ARM_AM::sub, and llvm::MCDisassembler::Success.
Referenced by DecodeLDRPreReg(), and DecodeSTRPreReg().
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Definition at line 1167 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::ARM_AM::asr, Check(), llvm::MCOperand::CreateImm(), DecodeGPRnopcRegisterClass(), llvm::MCDisassembler::Fail, llvm::ARM_AM::lsl, llvm::ARM_AM::lsr, llvm::ARM_AM::ror, and llvm::MCDisassembler::Success.
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Definition at line 991 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateReg(), llvm::MCDisassembler::Fail, Register, SPRDecoderTable, and llvm::MCDisassembler::Success.
Referenced by DecodeSPRRegListOperand(), DecodeVMOVRRS(), and DecodeVMOVSRR().
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Definition at line 1239 of file ARMDisassembler.cpp.
References Check(), DecodeSPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 4077 of file ARMDisassembler.cpp.
References Check(), DecodeAddrModeImm12Operand(), DecodeGPRRegisterClass(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 4102 of file ARMDisassembler.cpp.
References Check(), DecodeGPRRegisterClass(), DecodePredicateOperand(), DecodeSORegMemOperand(), llvm::MCDisassembler::Fail, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 4847 of file ARMDisassembler.cpp.
References Check(), DecodeCPSInstruction(), DecodeGPRnopcRegisterClass(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 3572 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::CreateImm(), DecodeGPRnopcRegisterClass(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
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Definition at line 3707 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::CreateImm(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), and llvm::MCDisassembler::Success.
Referenced by DecodeT2LoadImm12().
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Definition at line 3600 of file ARMDisassembler.cpp.
References Check(), DecodeGPRRegisterClass(), DecodeT2Imm8(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), and llvm::MCDisassembler::Success.
Referenced by DecodeT2LdStPre(), DecodeT2LoadImm8(), and DecodeT2LoadT().
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Definition at line 3557 of file ARMDisassembler.cpp.
References Check(), DecodeGPRRegisterClass(), DecodeT2Imm8S4(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
Referenced by DecodeT2LDRDPreInstruction(), and DecodeT2STRDPreInstruction().
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Definition at line 3231 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::CreateImm(), DecodeGPRRegisterClass(), DecoderGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), and llvm::MCDisassembler::Success.
Referenced by DecodeT2LoadShift().
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Definition at line 4821 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
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Definition at line 2161 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), llvm::MCDisassembler::Success, and tryAddingSymbolicOperand().
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Definition at line 3168 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), llvm::MCDisassembler::Success, and tryAddingSymbolicOperand().
Referenced by DecodeThumb2BCCInstruction().
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Definition at line 1995 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), llvm::MCDisassembler::Fail, llvm::MCInst::setOpcode(), llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 3587 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), and llvm::MCDisassembler::Success.
Referenced by DecodeT2AddrModeImm8().
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Definition at line 3543 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), and llvm::MCDisassembler::Success.
Referenced by DecodeT2AddrModeImm8s4().
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Definition at line 4750 of file ARMDisassembler.cpp.
References Check(), DecoderGPRRegisterClass(), DecodeT2AddrModeImm8s4(), llvm::MCDisassembler::Fail, P, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 3646 of file ARMDisassembler.cpp.
References Check(), DecodeGPRRegisterClass(), DecodeT2AddrModeImm8(), DecodeT2LoadLabel(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), llvm::MCInst::setOpcode(), and llvm::MCDisassembler::Success.
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Definition at line 3394 of file ARMDisassembler.cpp.
References Check(), DecodeGPRRegisterClass(), DecodeT2AddrModeImm12(), DecodeT2LoadLabel(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), llvm::MCInst::setOpcode(), and llvm::MCDisassembler::Success.
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Definition at line 3330 of file ARMDisassembler.cpp.
References Check(), DecodeGPRRegisterClass(), DecodeT2AddrModeImm8(), DecodeT2LoadLabel(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), llvm::MCInst::setOpcode(), and llvm::MCDisassembler::Success.
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Definition at line 3498 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::CreateImm(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), llvm::MCInst::setOpcode(), and llvm::MCDisassembler::Success.
Referenced by DecodeT2LdStPre(), DecodeT2LoadImm12(), DecodeT2LoadImm8(), DecodeT2LoadShift(), and DecodeT2LoadT().
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Definition at line 3259 of file ARMDisassembler.cpp.
References Check(), DecodeGPRRegisterClass(), DecodeT2AddrModeSOReg(), DecodeT2LoadLabel(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), llvm::MCInst::setOpcode(), and llvm::MCDisassembler::Success.
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Definition at line 3459 of file ARMDisassembler.cpp.
References Check(), DecoderGPRRegisterClass(), DecodeT2AddrModeImm8(), DecodeT2LoadLabel(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), llvm::MCInst::setOpcode(), and llvm::MCDisassembler::Success.
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Definition at line 2037 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::CreateImm(), DecoderGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), llvm::MCDisassembler::Success, and tryAddingSymbolicOperand().
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Definition at line 4836 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 3890 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), and llvm::MCDisassembler::Success.
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Definition at line 4787 of file ARMDisassembler.cpp.
References Check(), DecoderGPRRegisterClass(), DecodeT2AddrModeImm8s4(), llvm::MCDisassembler::Fail, P, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 3100 of file ARMDisassembler.cpp.
References Check(), DecodeDPairRegisterClass(), DecodeDPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), llvm::MCDisassembler::Success, and llvm::ARMISD::VTBL2.
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Definition at line 941 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateReg(), llvm::MCDisassembler::Fail, R2, Register, and llvm::MCDisassembler::Success.
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Definition at line 914 of file ARMDisassembler.cpp.
References DecodeGPRRegisterClass(), and llvm::MCDisassembler::Fail.
Referenced by DecodeThumbAddrModeIS(), DecodeThumbAddrModeRR(), and DecodeThumbAddSpecialReg().
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Definition at line 3848 of file ARMDisassembler.cpp.
References Check(), DecodeMemBarrierOption(), DecodePredicateOperand(), DecodeT2BROperand(), llvm::MCDisassembler::Fail, llvm::MCInst::setOpcode(), and llvm::MCDisassembler::Success.
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Definition at line 3199 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::CreateImm(), DecodetGPRRegisterClass(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
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Definition at line 3213 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), llvm::MCDisassembler::Success, and tryAddingPcLoadReferenceComment().
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Definition at line 3184 of file ARMDisassembler.cpp.
References Check(), DecodetGPRRegisterClass(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
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Definition at line 3223 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), llvm::MCOperand::CreateReg(), and llvm::MCDisassembler::Success.
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Definition at line 3136 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::CreateImm(), llvm::MCOperand::CreateReg(), DecodetGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), and llvm::MCDisassembler::Success.
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Definition at line 3733 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), llvm::MCOperand::CreateReg(), and llvm::MCDisassembler::Success.
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Definition at line 3744 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::CreateReg(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), and llvm::MCDisassembler::Success.
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Definition at line 3922 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), llvm::MCDisassembler::Success, and tryAddingSymbolicOperand().
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Definition at line 3930 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), llvm::MCDisassembler::Success, and tryAddingSymbolicOperand().
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Definition at line 3793 of file ARMDisassembler.cpp.
References llvm::MCOperand::CreateImm(), llvm::MCDisassembler::Success, and tryAddingSymbolicOperand().
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Definition at line 3160 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), llvm::MCDisassembler::Success, and tryAddingSymbolicOperand().
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Definition at line 3176 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), llvm::MCDisassembler::Success, and tryAddingSymbolicOperand().
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Definition at line 3769 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), and llvm::MCDisassembler::Success.
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Definition at line 3832 of file ARMDisassembler.cpp.
References Check(), DecodeGPRRegisterClass(), DecoderGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 4874 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::CreateImm(), DecodeDPRRegisterClass(), DecodeNEONModImmInstruction(), llvm::MCDisassembler::Fail, llvm::MCInst::setOpcode(), and llvm::MCDisassembler::Success.
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Definition at line 4904 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::CreateImm(), DecodeNEONModImmInstruction(), DecodeQPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::setOpcode(), and llvm::MCDisassembler::Success.
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Definition at line 2827 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::CreateImm(), DecodeDPairRegisterClass(), DecodeDPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), and llvm::MCDisassembler::Success.
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Definition at line 4127 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::CreateImm(), llvm::MCOperand::CreateReg(), DecodeDPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
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Definition at line 2874 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::CreateImm(), DecodeDPairRegisterClass(), DecodeDPairSpacedRegisterClass(), DecodeDPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), and llvm::MCDisassembler::Success.
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Definition at line 4260 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::CreateImm(), llvm::MCOperand::CreateReg(), DecodeDPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
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Definition at line 2922 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::CreateImm(), llvm::MCOperand::CreateReg(), DecodeDPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
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Definition at line 4391 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::CreateImm(), llvm::MCOperand::CreateReg(), DecodeDPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
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Definition at line 2957 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::CreateImm(), llvm::MCOperand::CreateReg(), DecodeDPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
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Definition at line 4525 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::CreateImm(), llvm::MCOperand::CreateReg(), DecodeDPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
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Definition at line 2231 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::CreateImm(), llvm::MCOperand::CreateReg(), DecodeAddrMode6Operand(), DecodeDPairRegisterClass(), DecodeDPairSpacedRegisterClass(), DecodeDPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), and llvm::MCDisassembler::Success.
Referenced by DecodeVLDST1Instruction(), DecodeVLDST2Instruction(), DecodeVLDST3Instruction(), and DecodeVLDST4Instruction().
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Definition at line 2505 of file ARMDisassembler.cpp.
References DecodeVLDInstruction(), DecodeVSTInstruction(), and llvm::MCDisassembler::Fail.
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Definition at line 2518 of file ARMDisassembler.cpp.
References DecodeVLDInstruction(), DecodeVSTInstruction(), and llvm::MCDisassembler::Fail.
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Definition at line 2533 of file ARMDisassembler.cpp.
References DecodeVLDInstruction(), DecodeVSTInstruction(), and llvm::MCDisassembler::Fail.
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Definition at line 2546 of file ARMDisassembler.cpp.
References DecodeVLDInstruction(), DecodeVSTInstruction(), and llvm::MCDisassembler::Fail.
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Definition at line 4704 of file ARMDisassembler.cpp.
References Check(), DecodeGPRRegisterClass(), DecodePredicateOperand(), DecodeSPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 4678 of file ARMDisassembler.cpp.
References Check(), DecodeGPRRegisterClass(), DecodePredicateOperand(), DecodeSPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 3057 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::CreateImm(), DecodeDPRRegisterClass(), DecodeQPRRegisterClass(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
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Definition at line 4194 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::CreateImm(), llvm::MCOperand::CreateReg(), DecodeDPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
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Definition at line 4327 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::CreateImm(), llvm::MCOperand::CreateReg(), DecodeDPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
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Definition at line 4461 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::CreateImm(), llvm::MCOperand::CreateReg(), DecodeDPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
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Definition at line 4606 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::CreateImm(), llvm::MCOperand::CreateReg(), DecodeDPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
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Definition at line 2556 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::CreateImm(), llvm::MCOperand::CreateReg(), DecodeAddrMode6Operand(), DecodeDPairRegisterClass(), DecodeDPairSpacedRegisterClass(), DecodeDPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), and llvm::MCDisassembler::Success.
Referenced by DecodeVLDST1Instruction(), DecodeVLDST2Instruction(), DecodeVLDST3Instruction(), and DecodeVLDST4Instruction().
void LLVMInitializeARMDisassembler | ( | ) |
Definition at line 862 of file ARMDisassembler.cpp.
References createARMDisassembler(), createThumbDisassembler(), llvm::TargetRegistry::RegisterMCDisassembler(), llvm::TheARMTarget, and llvm::TheThumbTarget.
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tryAddingPcLoadReferenceComment - trys to add a comment as to what is being referenced by a load instruction with the base register that is the Pc. These can often be values in a literal pool near the Address of the instruction. The Address of the instruction and its immediate Value are used as a possible literal pool entry. The SymbolLookUp call back will return the name of a symbol referenced by the literal pool's entry if the referenced address is that of a symbol. Or it will return a pointer to a literal 'C' string if the referenced address of the literal pool's entry is an address into a section with 'C' string literals.
Definition at line 554 of file ARMDisassembler.cpp.
References llvm::MCDisassembler::tryAddingPcLoadReferenceComment().
Referenced by DecodeAddrModeImm12Operand(), and DecodeThumbAddrModePC().
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tryAddingSymbolicOperand - trys to add a symbolic operand in place of the immediate Value in the MCInst. The immediate Value has had any PC adjustment made by the caller. If the instruction is a branch instruction then isBranch is true, else false. If the getOpInfo() function was set as part of the setupForSymbolicDisassembly() call then that function is called to get any symbolic information at the Address for this instruction. If that returns non-zero then the symbolic information it returns is used to create an MCExpr and that is added as an operand to the MCInst. If getOpInfo() returns zero and isBranch is true then a symbol look up for Value is done and if a symbol is found an MCExpr is created with that, else an MCExpr with Value is created. This function returns true if it adds an operand to the MCInst and false otherwise.
Definition at line 536 of file ARMDisassembler.cpp.
References llvm::MCDisassembler::tryAddingSymbolicOperand().
Referenced by DecodeArmMOVTWInstruction(), DecodeBranchImmInstruction(), DecodeT2BInstruction(), DecodeT2BROperand(), DecodeT2MOVTWInstruction(), DecodeThumbBCCTargetOperand(), DecodeThumbBLTargetOperand(), DecodeThumbBLXOffset(), DecodeThumbBROperand(), and DecodeThumbCmpBROperand().
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Definition at line 1056 of file ARMDisassembler.cpp.
Referenced by DecodeDPairRegisterClass().
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Definition at line 1075 of file ARMDisassembler.cpp.
Referenced by DecodeDPairSpacedRegisterClass().
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Definition at line 1001 of file ARMDisassembler.cpp.
Referenced by DecodeDPRRegisterClass().
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Definition at line 869 of file ARMDisassembler.cpp.
Referenced by DecodeGPRRegisterClass().
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Definition at line 921 of file ARMDisassembler.cpp.
Referenced by DecodeGPRPairRegisterClass().
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Definition at line 1037 of file ARMDisassembler.cpp.
Referenced by DecodeQPRRegisterClass().
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Definition at line 980 of file ARMDisassembler.cpp.
Referenced by DecodeSPRRegisterClass().