Enumerations
enum	TOF { MO_NO_FLAG, MO_GOT_ABSOLUTE_ADDRESS, MO_PIC_BASE_OFFSET, MO_GOT, MO_GOTOFF, MO_GOTPCREL, MO_PLT, MO_TLSGD, MO_TLSLD, MO_TLSLDM, MO_GOTTPOFF, MO_INDNTPOFF, MO_TPOFF, MO_DTPOFF, MO_NTPOFF, MO_GOTNTPOFF, MO_DLLIMPORT, MO_DARWIN_STUB, MO_DARWIN_NONLAZY, MO_DARWIN_NONLAZY_PIC_BASE, MO_DARWIN_HIDDEN_NONLAZY_PIC_BASE, MO_TLVP, MO_TLVP_PIC_BASE, MO_SECREL }
	Target Operand Flag enum. More...

enum	{ Pseudo = 0, RawFrm = 1, AddRegFrm = 2, MRMDestReg = 3, MRMDestMem = 4, MRMSrcReg = 5, MRMSrcMem = 6, MRM0r = 16, MRM1r = 17, MRM2r = 18, MRM3r = 19, MRM4r = 20, MRM5r = 21, MRM6r = 22, MRM7r = 23, MRM0m = 24, MRM1m = 25, MRM2m = 26, MRM3m = 27, MRM4m = 28, MRM5m = 29, MRM6m = 30, MRM7m = 31, MRMInitReg = 32, MRM_C1 = 33, MRM_C2 = 34, MRM_C3 = 35, MRM_C4 = 36, MRM_C8 = 37, MRM_C9 = 38, MRM_CA = 39, MRM_CB = 40, MRM_E8 = 41, MRM_F0 = 42, MRM_F8 = 45, MRM_F9 = 46, MRM_D0 = 47, MRM_D1 = 48, MRM_D4 = 49, MRM_D5 = 50, MRM_D6 = 51, MRM_D8 = 52, MRM_D9 = 53, MRM_DA = 54, MRM_DB = 55, MRM_DC = 56, MRM_DD = 57, MRM_DE = 58, MRM_DF = 59, RawFrmImm8 = 43, RawFrmImm16 = 44, FormMask = 63, OpSize = 1 << 6, AdSize = 1 << 7, Op0Shift = 8, Op0Mask = 0x1F << Op0Shift, TB = 1 << Op0Shift, REP = 2 << Op0Shift, D8 = 3 << Op0Shift, D9 = 4 << Op0Shift, DA = 5 << Op0Shift, DB = 6 << Op0Shift, DC = 7 << Op0Shift, DD = 8 << Op0Shift, DE = 9 << Op0Shift, DF = 10 << Op0Shift, XD = 11 << Op0Shift, XS = 12 << Op0Shift, T8 = 13 << Op0Shift, TA = 14 << Op0Shift, A6 = 15 << Op0Shift, A7 = 16 << Op0Shift, T8XD = 17 << Op0Shift, T8XS = 18 << Op0Shift, TAXD = 19 << Op0Shift, XOP8 = 20 << Op0Shift, XOP9 = 21 << Op0Shift, XOPA = 22 << Op0Shift, REXShift = Op0Shift + 5, REX_W = 1 << REXShift, ImmShift = REXShift + 1, ImmMask = 7 << ImmShift, Imm8 = 1 << ImmShift, Imm8PCRel = 2 << ImmShift, Imm16 = 3 << ImmShift, Imm16PCRel = 4 << ImmShift, Imm32 = 5 << ImmShift, Imm32PCRel = 6 << ImmShift, Imm64 = 7 << ImmShift, FPTypeShift = ImmShift + 3, FPTypeMask = 7 << FPTypeShift, NotFP = 0 << FPTypeShift, ZeroArgFP = 1 << FPTypeShift, OneArgFP = 2 << FPTypeShift, OneArgFPRW = 3 << FPTypeShift, TwoArgFP = 4 << FPTypeShift, CompareFP = 5 << FPTypeShift, CondMovFP = 6 << FPTypeShift, SpecialFP = 7 << FPTypeShift, LOCKShift = FPTypeShift + 3, LOCK = 1 << LOCKShift, SegOvrShift = LOCKShift + 1, SegOvrMask = 3 << SegOvrShift, FS = 1 << SegOvrShift, GS = 2 << SegOvrShift, SSEDomainShift = SegOvrShift + 2, OpcodeShift = SSEDomainShift + 2, VEXShift = OpcodeShift + 8, VEX = 1U << 0, VEX_W = 1U << 1, VEX_4V = 1U << 2, VEX_4VOp3 = 1U << 3, VEX_I8IMM = 1U << 4, VEX_L = 1U << 5, VEX_LIG = 1U << 6, EVEX = 1U << 7, EVEX_K = 1U << 8, EVEX_Z = 1U << 9, EVEX_L2 = 1U << 10, EVEX_B = 1U << 11, EVEX_CD8EShift = VEXShift + 12, EVEX_CD8EMask = 3, EVEX_CD8VShift = EVEX_CD8EShift + 2, EVEX_CD8VMask = 7, Has3DNow0F0FOpcode = 1U << 17, MemOp4 = 1U << 18, XOP = 1U << 19 }

Functions
unsigned char	getBaseOpcodeFor (uint64_t TSFlags)

bool	hasImm (uint64_t TSFlags)

unsigned	getSizeOfImm (uint64_t TSFlags)

unsigned	isImmPCRel (uint64_t TSFlags)

int	getOperandBias (const MCInstrDesc &Desc)

int	getMemoryOperandNo (uint64_t TSFlags, unsigned Opcode)

bool	isX86_64ExtendedReg (unsigned RegNo)

static bool	is32ExtendedReg (unsigned RegNo)

bool	isX86_64NonExtLowByteReg (unsigned reg)

Detailed Description

X86II - This namespace holds all of the target specific flags that instruction info tracks.

Enumeration Type Documentation

anonymous enum

Enumerator
Pseudo
RawFrm	Raw - This form is for instructions that don't have any operands, so they are just a fixed opcode value, like 'leave'.
AddRegFrm	AddRegFrm - This form is used for instructions like 'push r32' that have their one register operand added to their opcode.
MRMDestReg	MRMDestReg - This form is used for instructions that use the Mod/RM byte to specify a destination, which in this case is a register.
MRMDestMem	MRMDestMem - This form is used for instructions that use the Mod/RM byte to specify a destination, which in this case is memory.
MRMSrcReg	MRMSrcReg - This form is used for instructions that use the Mod/RM byte to specify a source, which in this case is a register.
MRMSrcMem	MRMSrcMem - This form is used for instructions that use the Mod/RM byte to specify a source, which in this case is memory.
MRM0r	MRM[0-7][rm] - These forms are used to represent instructions that use a Mod/RM byte, and use the middle field to hold extended opcode information. In the intel manual these are represented as /0, /1, ...
MRM1r
MRM2r
MRM3r
MRM4r
MRM5r
MRM6r
MRM7r
MRM0m
MRM1m
MRM2m
MRM3m
MRM4m
MRM5m
MRM6m
MRM7m
MRMInitReg
MRM_C1
MRM_C2
MRM_C3
MRM_C4
MRM_C8
MRM_C9
MRM_CA
MRM_CB
MRM_E8
MRM_F0
MRM_F8
MRM_F9
MRM_D0
MRM_D1
MRM_D4
MRM_D5
MRM_D6
MRM_D8
MRM_D9
MRM_DA
MRM_DB
MRM_DC
MRM_DD
MRM_DE
MRM_DF
RawFrmImm8	RawFrmImm8 - This is used for the ENTER instruction, which has two immediates, the first of which is a 16-bit immediate (specified by the imm encoding) and the second is a 8-bit fixed value.
RawFrmImm16	RawFrmImm16 - This is used for CALL FAR instructions, which have two immediates, the first of which is a 16 or 32-bit immediate (specified by the imm encoding) and the second is a 16-bit fixed value. In the AMD manual, this operand is described as pntr16:32 and pntr16:16
FormMask
OpSize
AdSize
Op0Shift
Op0Mask
TB
REP
D8
D9
DA
DB
DC
DD
DE
DF
XD
XS
T8
TA
A6
A7
T8XD
T8XS
TAXD
XOP8
XOP9
XOPA
REXShift
REX_W
ImmShift
ImmMask
Imm8
Imm8PCRel
Imm16
Imm16PCRel
Imm32
Imm32PCRel
Imm64
FPTypeShift
FPTypeMask
NotFP
ZeroArgFP
OneArgFP
OneArgFPRW
TwoArgFP
CompareFP
CondMovFP
SpecialFP
LOCKShift
LOCK
SegOvrShift
SegOvrMask
FS
GS
SSEDomainShift
OpcodeShift
VEXShift	VEX - The opcode prefix used by AVX instructions.
VEX
VEX_W	VEX_W - Has a opcode specific functionality, but is used in the same way as REX_W is for regular SSE instructions.
VEX_4V	VEX_4V - Used to specify an additional AVX/SSE register. Several 2 address instructions in SSE are represented as 3 address ones in AVX and the additional register is encoded in VEX_VVVV prefix.
VEX_4VOp3	VEX_4VOp3 - Similar to VEX_4V, but used on instructions that encode operand 3 with VEX.vvvv.
VEX_I8IMM	VEX_I8IMM - Specifies that the last register used in a AVX instruction, must be encoded in the i8 immediate field. This usually happens in instructions with 4 operands.
VEX_L	VEX_L - Stands for a bit in the VEX opcode prefix meaning the current instruction uses 256-bit wide registers. This is usually auto detected if a VR256 register is used, but some AVX instructions also have this field marked when using a f256 memory references.
VEX_LIG
EVEX
EVEX_K
EVEX_Z
EVEX_L2
EVEX_B
EVEX_CD8EShift
EVEX_CD8EMask
EVEX_CD8VShift
EVEX_CD8VMask
Has3DNow0F0FOpcode	Has3DNow0F0FOpcode - This flag indicates that the instruction uses the wacky 0x0F 0x0F prefix for 3DNow! instructions. The manual documents this as having a 0x0F prefix with a 0x0F opcode, and each instruction storing a classifier in the imm8 field. To simplify our implementation, we handle this by storeing the classifier in the opcode field and using this flag to indicate that the encoder should do the wacky 3DNow! thing.
MemOp4	MemOp4 - Used to indicate swapping of operand 3 and 4 to be encoded in ModRM or I8IMM. This is used for FMA4 and XOP instructions.
XOP	XOP - Opcode prefix used by XOP instructions.

Definition at line 219 of file X86BaseInfo.h.

enum llvm::X86II::TOF

Target Operand Flag enum.

Enumerator
MO_NO_FLAG
MO_GOT_ABSOLUTE_ADDRESS	MO_GOT_ABSOLUTE_ADDRESS - On a symbol operand, this represents a relocation of: SYMBOL_LABEL + [. - PICBASELABEL]
MO_PIC_BASE_OFFSET	MO_PIC_BASE_OFFSET - On a symbol operand this indicates that the immediate should get the value of the symbol minus the PIC base label: SYMBOL_LABEL - PICBASELABEL
MO_GOT	MO_GOT - On a symbol operand this indicates that the immediate is the offset to the GOT entry for the symbol name from the base of the GOT. See the X86-64 ELF ABI supplement for more details. SYMBOL_LABEL
MO_GOTOFF	MO_GOTOFF - On a symbol operand this indicates that the immediate is the offset to the location of the symbol name from the base of the GOT. See the X86-64 ELF ABI supplement for more details. SYMBOL_LABEL
MO_GOTPCREL	MO_GOTPCREL - On a symbol operand this indicates that the immediate is offset to the GOT entry for the symbol name from the current code location. See the X86-64 ELF ABI supplement for more details. SYMBOL_LABEL
MO_PLT	MO_PLT - On a symbol operand this indicates that the immediate is offset to the PLT entry of symbol name from the current code location. See the X86-64 ELF ABI supplement for more details. SYMBOL_LABEL
MO_TLSGD	MO_TLSGD - On a symbol operand this indicates that the immediate is the offset of the GOT entry with the TLS index structure that contains the module number and variable offset for the symbol. Used in the general dynamic TLS access model. See 'ELF Handling for Thread-Local Storage' for more details. SYMBOL_LABEL
MO_TLSLD	MO_TLSLD - On a symbol operand this indicates that the immediate is the offset of the GOT entry with the TLS index for the module that contains the symbol. When this index is passed to a call to __tls_get_addr, the function will return the base address of the TLS block for the symbol. Used in the x86-64 local dynamic TLS access model. See 'ELF Handling for Thread-Local Storage' for more details. SYMBOL_LABEL
MO_TLSLDM	MO_TLSLDM - On a symbol operand this indicates that the immediate is the offset of the GOT entry with the TLS index for the module that contains the symbol. When this index is passed to a call to ___tls_get_addr, the function will return the base address of the TLS block for the symbol. Used in the IA32 local dynamic TLS access model. See 'ELF Handling for Thread-Local Storage' for more details. SYMBOL_LABEL
MO_GOTTPOFF	MO_GOTTPOFF - On a symbol operand this indicates that the immediate is the offset of the GOT entry with the thread-pointer offset for the symbol. Used in the x86-64 initial exec TLS access model. See 'ELF Handling for Thread-Local Storage' for more details. SYMBOL_LABEL
MO_INDNTPOFF	MO_INDNTPOFF - On a symbol operand this indicates that the immediate is the absolute address of the GOT entry with the negative thread-pointer offset for the symbol. Used in the non-PIC IA32 initial exec TLS access model. See 'ELF Handling for Thread-Local Storage' for more details. SYMBOL_LABEL
MO_TPOFF	MO_TPOFF - On a symbol operand this indicates that the immediate is the thread-pointer offset for the symbol. Used in the x86-64 local exec TLS access model. See 'ELF Handling for Thread-Local Storage' for more details. SYMBOL_LABEL
MO_DTPOFF	MO_DTPOFF - On a symbol operand this indicates that the immediate is the offset of the GOT entry with the TLS offset of the symbol. Used in the local dynamic TLS access model. See 'ELF Handling for Thread-Local Storage' for more details. SYMBOL_LABEL
MO_NTPOFF	MO_NTPOFF - On a symbol operand this indicates that the immediate is the negative thread-pointer offset for the symbol. Used in the IA32 local exec TLS access model. See 'ELF Handling for Thread-Local Storage' for more details. SYMBOL_LABEL
MO_GOTNTPOFF	MO_GOTNTPOFF - On a symbol operand this indicates that the immediate is the offset of the GOT entry with the negative thread-pointer offset for the symbol. Used in the PIC IA32 initial exec TLS access model. See 'ELF Handling for Thread-Local Storage' for more details. SYMBOL_LABEL
MO_DLLIMPORT	MO_DLLIMPORT - On a symbol operand "FOO", this indicates that the reference is actually to the "__imp_FOO" symbol. This is used for dllimport linkage on windows.
MO_DARWIN_STUB	MO_DARWIN_STUB - On a symbol operand "FOO", this indicates that the reference is actually to the "FOO$stub" symbol. This is used for calls and jumps to external functions on Tiger and earlier.
MO_DARWIN_NONLAZY	MO_DARWIN_NONLAZY - On a symbol operand "FOO", this indicates that the reference is actually to the "FOO$non_lazy_ptr" symbol, which is a non-PIC-base-relative reference to a non-hidden dyld lazy pointer stub.
MO_DARWIN_NONLAZY_PIC_BASE	MO_DARWIN_NONLAZY_PIC_BASE - On a symbol operand "FOO", this indicates that the reference is actually to "FOO$non_lazy_ptr - PICBASE", which is a PIC-base-relative reference to a non-hidden dyld lazy pointer stub.
MO_DARWIN_HIDDEN_NONLAZY_PIC_BASE	MO_DARWIN_HIDDEN_NONLAZY_PIC_BASE - On a symbol operand "FOO", this indicates that the reference is actually to "FOO$non_lazy_ptr -PICBASE", which is a PIC-base-relative reference to a hidden dyld lazy pointer stub.
MO_TLVP	MO_TLVP - On a symbol operand this indicates that the immediate is some TLS offset. This is the TLS offset for the Darwin TLS mechanism.
MO_TLVP_PIC_BASE	MO_TLVP_PIC_BASE - On a symbol operand this indicates that the immediate is some TLS offset from the picbase. This is the 32-bit TLS offset for Darwin TLS in PIC mode.
MO_SECREL	MO_SECREL - On a symbol operand this indicates that the immediate is the offset from beginning of section. This is the TLS offset for the COFF/Windows TLS mechanism.

Definition at line 51 of file X86BaseInfo.h.

Function Documentation

unsigned char llvm::X86II::getBaseOpcodeFor ( uint64_t TSFlags )

inline

Definition at line 522 of file X86BaseInfo.h.

References OpcodeShift.

int llvm::X86II::getMemoryOperandNo	(	uint64_t	TSFlags,
		unsigned	Opcode
	)

inline

getMemoryOperandNo - The function returns the MCInst operand # for the first field of the memory operand. If the instruction doesn't have a memory operand, this returns -1.

Note that this ignores tied operands. If there is a tied register which is duplicated in the MCInst (e.g. "EAX = addl EAX, [mem]") it is only counted as one operand.

Definition at line 597 of file X86BaseInfo.h.

References AddRegFrm, EVEX, EVEX_K, FormMask, llvm_unreachable, MemOp4, MRM0m, MRM0r, MRM1m, MRM1r, MRM2m, MRM2r, MRM3m, MRM3r, MRM4m, MRM4r, MRM5m, MRM5r, MRM6m, MRM6r, MRM7m, MRM7r, MRM_C1, MRM_C2, MRM_C3, MRM_C4, MRM_C8, MRM_C9, MRM_CA, MRM_CB, MRM_D0, MRM_D1, MRM_D4, MRM_D5, MRM_D6, MRM_D8, MRM_D9, MRM_DA, MRM_DB, MRM_DC, MRM_DD, MRM_DE, MRM_DF, MRM_E8, MRM_F0, MRM_F8, MRM_F9, MRMDestMem, MRMDestReg, MRMInitReg, MRMSrcMem, MRMSrcReg, Pseudo, RawFrm, RawFrmImm16, RawFrmImm8, VEX_4V, and VEXShift.

int llvm::X86II::getOperandBias ( const MCInstrDesc & Desc )

inline

getOperandBias - compute any additional adjustment needed to the offset to the start of the memory operand in this instruction. If this is a two-address instruction,skip one of the register operands. FIXME: This should be handled during MCInst lowering.

Definition at line 567 of file X86BaseInfo.h.

References llvm::MCInstrDesc::getNumOperands(), llvm::MCInstrDesc::getOperandConstraint(), and llvm::MCOI::TIED_TO.

unsigned llvm::X86II::getSizeOfImm ( uint64_t TSFlags )

inline

getSizeOfImm - Decode the "size of immediate" field from the TSFlags field of the specified instruction.

Definition at line 532 of file X86BaseInfo.h.

References Imm16, Imm16PCRel, Imm32, Imm32PCRel, Imm64, Imm8, Imm8PCRel, ImmMask, and llvm_unreachable.

Referenced by getImmFixupKind().

bool llvm::X86II::hasImm ( uint64_t TSFlags )

inline

Definition at line 526 of file X86BaseInfo.h.

References ImmMask.