26 IS = II->
beginStage(QII->get(this->getOpcode()).getSchedClass());
95 int MinValue = getMinValue();
96 int MaxValue = getMaxValue();
110 assert(MO.
isImm() &&
"Extendable operand must be Immediate type");
112 int ImmValue = MO.
getImm();
113 return (ImmValue < MinValue || ImmValue > MaxValue);
117 bool HexagonMCInst::isExtended(
void)
const {
123 bool HexagonMCInst::isExtendable(
void)
const {
124 const uint64_t F = MCID->
TSFlags;
130 const uint64_t F = MCID->
TSFlags;
136 const uint64_t F = MCID->
TSFlags;
141 bool HexagonMCInst::isOperandExtended(
const unsigned short OperandNum)
const {
142 const uint64_t F = MCID->
TSFlags;
149 int HexagonMCInst::getMinValue(
void)
const {
150 const uint64_t F = MCID->
TSFlags;
157 return -1 << (bits - 1);
164 int HexagonMCInst::getMaxValue(
void)
const {
165 const uint64_t F = MCID->
TSFlags;
172 return ~(-1 << (bits - 1));
174 return ~(-1 << bits);
const MCOperand & getNewValue() const
unsigned short getCExtOpNum(void) const
bool isConstExtended() const
const InstrStage * beginStage(unsigned ItinClassIndx) const
unsigned getUnits(const HexagonTargetMachine *TM) const
unsigned getUnits() const
getUnits - returns the choice of FUs
virtual const InstrItineraryData * getInstrItineraryData() const
bool isPseudo() const
Return true if this is a pseudo instruction that doesn't correspond to a real machine instruction...
virtual const HexagonInstrInfo * getInstrInfo() const
unsigned getBitCount(void) const
const MCOperand & getOperand(unsigned i) const