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InstCombineShifts.cpp
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1 //===- InstCombineShifts.cpp ----------------------------------------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file implements the visitShl, visitLShr, and visitAShr functions.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "InstCombine.h"
17 #include "llvm/IR/IntrinsicInst.h"
19 using namespace llvm;
20 using namespace PatternMatch;
21 
23  assert(I.getOperand(1)->getType() == I.getOperand(0)->getType());
24  Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1);
25 
26  // See if we can fold away this shift.
27  if (SimplifyDemandedInstructionBits(I))
28  return &I;
29 
30  // Try to fold constant and into select arguments.
31  if (isa<Constant>(Op0))
32  if (SelectInst *SI = dyn_cast<SelectInst>(Op1))
33  if (Instruction *R = FoldOpIntoSelect(I, SI))
34  return R;
35 
36  if (ConstantInt *CUI = dyn_cast<ConstantInt>(Op1))
37  if (Instruction *Res = FoldShiftByConstant(Op0, CUI, I))
38  return Res;
39 
40  // X shift (A srem B) -> X shift (A and B-1) iff B is a power of 2.
41  // Because shifts by negative values (which could occur if A were negative)
42  // are undefined.
43  Value *A; const APInt *B;
44  if (Op1->hasOneUse() && match(Op1, m_SRem(m_Value(A), m_Power2(B)))) {
45  // FIXME: Should this get moved into SimplifyDemandedBits by saying we don't
46  // demand the sign bit (and many others) here??
47  Value *Rem = Builder->CreateAnd(A, ConstantInt::get(I.getType(), *B-1),
48  Op1->getName());
49  I.setOperand(1, Rem);
50  return &I;
51  }
52 
53  return 0;
54 }
55 
56 /// CanEvaluateShifted - See if we can compute the specified value, but shifted
57 /// logically to the left or right by some number of bits. This should return
58 /// true if the expression can be computed for the same cost as the current
59 /// expression tree. This is used to eliminate extraneous shifting from things
60 /// like:
61 /// %C = shl i128 %A, 64
62 /// %D = shl i128 %B, 96
63 /// %E = or i128 %C, %D
64 /// %F = lshr i128 %E, 64
65 /// where the client will ask if E can be computed shifted right by 64-bits. If
66 /// this succeeds, the GetShiftedValue function will be called to produce the
67 /// value.
68 static bool CanEvaluateShifted(Value *V, unsigned NumBits, bool isLeftShift,
69  InstCombiner &IC) {
70  // We can always evaluate constants shifted.
71  if (isa<Constant>(V))
72  return true;
73 
75  if (!I) return false;
76 
77  // If this is the opposite shift, we can directly reuse the input of the shift
78  // if the needed bits are already zero in the input. This allows us to reuse
79  // the value which means that we don't care if the shift has multiple uses.
80  // TODO: Handle opposite shift by exact value.
81  ConstantInt *CI = 0;
82  if ((isLeftShift && match(I, m_LShr(m_Value(), m_ConstantInt(CI)))) ||
83  (!isLeftShift && match(I, m_Shl(m_Value(), m_ConstantInt(CI))))) {
84  if (CI->getZExtValue() == NumBits) {
85  // TODO: Check that the input bits are already zero with MaskedValueIsZero
86 #if 0
87  // If this is a truncate of a logical shr, we can truncate it to a smaller
88  // lshr iff we know that the bits we would otherwise be shifting in are
89  // already zeros.
90  uint32_t OrigBitWidth = OrigTy->getScalarSizeInBits();
91  uint32_t BitWidth = Ty->getScalarSizeInBits();
92  if (MaskedValueIsZero(I->getOperand(0),
93  APInt::getHighBitsSet(OrigBitWidth, OrigBitWidth-BitWidth)) &&
94  CI->getLimitedValue(BitWidth) < BitWidth) {
95  return CanEvaluateTruncated(I->getOperand(0), Ty);
96  }
97 #endif
98 
99  }
100  }
101 
102  // We can't mutate something that has multiple uses: doing so would
103  // require duplicating the instruction in general, which isn't profitable.
104  if (!I->hasOneUse()) return false;
105 
106  switch (I->getOpcode()) {
107  default: return false;
108  case Instruction::And:
109  case Instruction::Or:
110  case Instruction::Xor:
111  // Bitwise operators can all arbitrarily be arbitrarily evaluated shifted.
112  return CanEvaluateShifted(I->getOperand(0), NumBits, isLeftShift, IC) &&
113  CanEvaluateShifted(I->getOperand(1), NumBits, isLeftShift, IC);
114 
115  case Instruction::Shl: {
116  // We can often fold the shift into shifts-by-a-constant.
117  CI = dyn_cast<ConstantInt>(I->getOperand(1));
118  if (CI == 0) return false;
119 
120  // We can always fold shl(c1)+shl(c2) -> shl(c1+c2).
121  if (isLeftShift) return true;
122 
123  // We can always turn shl(c)+shr(c) -> and(c2).
124  if (CI->getValue() == NumBits) return true;
125 
126  unsigned TypeWidth = I->getType()->getScalarSizeInBits();
127 
128  // We can turn shl(c1)+shr(c2) -> shl(c3)+and(c4), but it isn't
129  // profitable unless we know the and'd out bits are already zero.
130  if (CI->getZExtValue() > NumBits) {
131  unsigned LowBits = TypeWidth - CI->getZExtValue();
132  if (MaskedValueIsZero(I->getOperand(0),
133  APInt::getLowBitsSet(TypeWidth, NumBits) << LowBits))
134  return true;
135  }
136 
137  return false;
138  }
139  case Instruction::LShr: {
140  // We can often fold the shift into shifts-by-a-constant.
141  CI = dyn_cast<ConstantInt>(I->getOperand(1));
142  if (CI == 0) return false;
143 
144  // We can always fold lshr(c1)+lshr(c2) -> lshr(c1+c2).
145  if (!isLeftShift) return true;
146 
147  // We can always turn lshr(c)+shl(c) -> and(c2).
148  if (CI->getValue() == NumBits) return true;
149 
150  unsigned TypeWidth = I->getType()->getScalarSizeInBits();
151 
152  // We can always turn lshr(c1)+shl(c2) -> lshr(c3)+and(c4), but it isn't
153  // profitable unless we know the and'd out bits are already zero.
154  if (CI->getValue().ult(TypeWidth) && CI->getZExtValue() > NumBits) {
155  unsigned LowBits = CI->getZExtValue() - NumBits;
156  if (MaskedValueIsZero(I->getOperand(0),
157  APInt::getLowBitsSet(TypeWidth, NumBits) << LowBits))
158  return true;
159  }
160 
161  return false;
162  }
163  case Instruction::Select: {
164  SelectInst *SI = cast<SelectInst>(I);
165  return CanEvaluateShifted(SI->getTrueValue(), NumBits, isLeftShift, IC) &&
166  CanEvaluateShifted(SI->getFalseValue(), NumBits, isLeftShift, IC);
167  }
168  case Instruction::PHI: {
169  // We can change a phi if we can change all operands. Note that we never
170  // get into trouble with cyclic PHIs here because we only consider
171  // instructions with a single use.
172  PHINode *PN = cast<PHINode>(I);
173  for (unsigned i = 0, e = PN->getNumIncomingValues(); i != e; ++i)
174  if (!CanEvaluateShifted(PN->getIncomingValue(i), NumBits, isLeftShift,IC))
175  return false;
176  return true;
177  }
178  }
179 }
180 
181 /// GetShiftedValue - When CanEvaluateShifted returned true for an expression,
182 /// this value inserts the new computation that produces the shifted value.
183 static Value *GetShiftedValue(Value *V, unsigned NumBits, bool isLeftShift,
184  InstCombiner &IC) {
185  // We can always evaluate constants shifted.
186  if (Constant *C = dyn_cast<Constant>(V)) {
187  if (isLeftShift)
188  V = IC.Builder->CreateShl(C, NumBits);
189  else
190  V = IC.Builder->CreateLShr(C, NumBits);
191  // If we got a constantexpr back, try to simplify it with TD info.
192  if (ConstantExpr *CE = dyn_cast<ConstantExpr>(V))
194  IC.getTargetLibraryInfo());
195  return V;
196  }
197 
198  Instruction *I = cast<Instruction>(V);
199  IC.Worklist.Add(I);
200 
201  switch (I->getOpcode()) {
202  default: llvm_unreachable("Inconsistency with CanEvaluateShifted");
203  case Instruction::And:
204  case Instruction::Or:
205  case Instruction::Xor:
206  // Bitwise operators can all arbitrarily be arbitrarily evaluated shifted.
207  I->setOperand(0, GetShiftedValue(I->getOperand(0), NumBits,isLeftShift,IC));
208  I->setOperand(1, GetShiftedValue(I->getOperand(1), NumBits,isLeftShift,IC));
209  return I;
210 
211  case Instruction::Shl: {
212  BinaryOperator *BO = cast<BinaryOperator>(I);
213  unsigned TypeWidth = BO->getType()->getScalarSizeInBits();
214 
215  // We only accept shifts-by-a-constant in CanEvaluateShifted.
216  ConstantInt *CI = cast<ConstantInt>(BO->getOperand(1));
217 
218  // We can always fold shl(c1)+shl(c2) -> shl(c1+c2).
219  if (isLeftShift) {
220  // If this is oversized composite shift, then unsigned shifts get 0.
221  unsigned NewShAmt = NumBits+CI->getZExtValue();
222  if (NewShAmt >= TypeWidth)
223  return Constant::getNullValue(I->getType());
224 
225  BO->setOperand(1, ConstantInt::get(BO->getType(), NewShAmt));
226  BO->setHasNoUnsignedWrap(false);
227  BO->setHasNoSignedWrap(false);
228  return I;
229  }
230 
231  // We turn shl(c)+lshr(c) -> and(c2) if the input doesn't already have
232  // zeros.
233  if (CI->getValue() == NumBits) {
234  APInt Mask(APInt::getLowBitsSet(TypeWidth, TypeWidth - NumBits));
235  V = IC.Builder->CreateAnd(BO->getOperand(0),
236  ConstantInt::get(BO->getContext(), Mask));
237  if (Instruction *VI = dyn_cast<Instruction>(V)) {
238  VI->moveBefore(BO);
239  VI->takeName(BO);
240  }
241  return V;
242  }
243 
244  // We turn shl(c1)+shr(c2) -> shl(c3)+and(c4), but only when we know that
245  // the and won't be needed.
246  assert(CI->getZExtValue() > NumBits);
247  BO->setOperand(1, ConstantInt::get(BO->getType(),
248  CI->getZExtValue() - NumBits));
249  BO->setHasNoUnsignedWrap(false);
250  BO->setHasNoSignedWrap(false);
251  return BO;
252  }
253  case Instruction::LShr: {
254  BinaryOperator *BO = cast<BinaryOperator>(I);
255  unsigned TypeWidth = BO->getType()->getScalarSizeInBits();
256  // We only accept shifts-by-a-constant in CanEvaluateShifted.
257  ConstantInt *CI = cast<ConstantInt>(BO->getOperand(1));
258 
259  // We can always fold lshr(c1)+lshr(c2) -> lshr(c1+c2).
260  if (!isLeftShift) {
261  // If this is oversized composite shift, then unsigned shifts get 0.
262  unsigned NewShAmt = NumBits+CI->getZExtValue();
263  if (NewShAmt >= TypeWidth)
264  return Constant::getNullValue(BO->getType());
265 
266  BO->setOperand(1, ConstantInt::get(BO->getType(), NewShAmt));
267  BO->setIsExact(false);
268  return I;
269  }
270 
271  // We turn lshr(c)+shl(c) -> and(c2) if the input doesn't already have
272  // zeros.
273  if (CI->getValue() == NumBits) {
274  APInt Mask(APInt::getHighBitsSet(TypeWidth, TypeWidth - NumBits));
275  V = IC.Builder->CreateAnd(I->getOperand(0),
276  ConstantInt::get(BO->getContext(), Mask));
277  if (Instruction *VI = dyn_cast<Instruction>(V)) {
278  VI->moveBefore(I);
279  VI->takeName(I);
280  }
281  return V;
282  }
283 
284  // We turn lshr(c1)+shl(c2) -> lshr(c3)+and(c4), but only when we know that
285  // the and won't be needed.
286  assert(CI->getZExtValue() > NumBits);
287  BO->setOperand(1, ConstantInt::get(BO->getType(),
288  CI->getZExtValue() - NumBits));
289  BO->setIsExact(false);
290  return BO;
291  }
292 
293  case Instruction::Select:
294  I->setOperand(1, GetShiftedValue(I->getOperand(1), NumBits,isLeftShift,IC));
295  I->setOperand(2, GetShiftedValue(I->getOperand(2), NumBits,isLeftShift,IC));
296  return I;
297  case Instruction::PHI: {
298  // We can change a phi if we can change all operands. Note that we never
299  // get into trouble with cyclic PHIs here because we only consider
300  // instructions with a single use.
301  PHINode *PN = cast<PHINode>(I);
302  for (unsigned i = 0, e = PN->getNumIncomingValues(); i != e; ++i)
304  NumBits, isLeftShift, IC));
305  return PN;
306  }
307  }
308 }
309 
310 
311 
313  BinaryOperator &I) {
314  bool isLeftShift = I.getOpcode() == Instruction::Shl;
315 
316 
317  // See if we can propagate this shift into the input, this covers the trivial
318  // cast of lshr(shl(x,c1),c2) as well as other more complex cases.
319  if (I.getOpcode() != Instruction::AShr &&
320  CanEvaluateShifted(Op0, Op1->getZExtValue(), isLeftShift, *this)) {
321  DEBUG(dbgs() << "ICE: GetShiftedValue propagating shift through expression"
322  " to eliminate shift:\n IN: " << *Op0 << "\n SH: " << I <<"\n");
323 
324  return ReplaceInstUsesWith(I,
325  GetShiftedValue(Op0, Op1->getZExtValue(), isLeftShift, *this));
326  }
327 
328 
329  // See if we can simplify any instructions used by the instruction whose sole
330  // purpose is to compute bits we don't care about.
331  uint32_t TypeBits = Op0->getType()->getScalarSizeInBits();
332 
333  // shl i32 X, 32 = 0 and srl i8 Y, 9 = 0, ... just don't eliminate
334  // a signed shift.
335  //
336  if (Op1->uge(TypeBits)) {
337  if (I.getOpcode() != Instruction::AShr)
338  return ReplaceInstUsesWith(I, Constant::getNullValue(Op0->getType()));
339  // ashr i32 X, 32 --> ashr i32 X, 31
340  I.setOperand(1, ConstantInt::get(I.getType(), TypeBits-1));
341  return &I;
342  }
343 
344  // ((X*C1) << C2) == (X * (C1 << C2))
345  if (BinaryOperator *BO = dyn_cast<BinaryOperator>(Op0))
346  if (BO->getOpcode() == Instruction::Mul && isLeftShift)
347  if (Constant *BOOp = dyn_cast<Constant>(BO->getOperand(1)))
348  return BinaryOperator::CreateMul(BO->getOperand(0),
349  ConstantExpr::getShl(BOOp, Op1));
350 
351  // Try to fold constant and into select arguments.
352  if (SelectInst *SI = dyn_cast<SelectInst>(Op0))
353  if (Instruction *R = FoldOpIntoSelect(I, SI))
354  return R;
355  if (isa<PHINode>(Op0))
356  if (Instruction *NV = FoldOpIntoPhi(I))
357  return NV;
358 
359  // Fold shift2(trunc(shift1(x,c1)), c2) -> trunc(shift2(shift1(x,c1),c2))
360  if (TruncInst *TI = dyn_cast<TruncInst>(Op0)) {
361  Instruction *TrOp = dyn_cast<Instruction>(TI->getOperand(0));
362  // If 'shift2' is an ashr, we would have to get the sign bit into a funny
363  // place. Don't try to do this transformation in this case. Also, we
364  // require that the input operand is a shift-by-constant so that we have
365  // confidence that the shifts will get folded together. We could do this
366  // xform in more cases, but it is unlikely to be profitable.
367  if (TrOp && I.isLogicalShift() && TrOp->isShift() &&
368  isa<ConstantInt>(TrOp->getOperand(1))) {
369  // Okay, we'll do this xform. Make the shift of shift.
370  Constant *ShAmt = ConstantExpr::getZExt(Op1, TrOp->getType());
371  // (shift2 (shift1 & 0x00FF), c2)
372  Value *NSh = Builder->CreateBinOp(I.getOpcode(), TrOp, ShAmt,I.getName());
373 
374  // For logical shifts, the truncation has the effect of making the high
375  // part of the register be zeros. Emulate this by inserting an AND to
376  // clear the top bits as needed. This 'and' will usually be zapped by
377  // other xforms later if dead.
378  unsigned SrcSize = TrOp->getType()->getScalarSizeInBits();
379  unsigned DstSize = TI->getType()->getScalarSizeInBits();
380  APInt MaskV(APInt::getLowBitsSet(SrcSize, DstSize));
381 
382  // The mask we constructed says what the trunc would do if occurring
383  // between the shifts. We want to know the effect *after* the second
384  // shift. We know that it is a logical shift by a constant, so adjust the
385  // mask as appropriate.
386  if (I.getOpcode() == Instruction::Shl)
387  MaskV <<= Op1->getZExtValue();
388  else {
389  assert(I.getOpcode() == Instruction::LShr && "Unknown logical shift");
390  MaskV = MaskV.lshr(Op1->getZExtValue());
391  }
392 
393  // shift1 & 0x00FF
394  Value *And = Builder->CreateAnd(NSh,
395  ConstantInt::get(I.getContext(), MaskV),
396  TI->getName());
397 
398  // Return the value truncated to the interesting size.
399  return new TruncInst(And, I.getType());
400  }
401  }
402 
403  if (Op0->hasOneUse()) {
404  if (BinaryOperator *Op0BO = dyn_cast<BinaryOperator>(Op0)) {
405  // Turn ((X >> C) + Y) << C -> (X + (Y << C)) & (~0 << C)
406  Value *V1, *V2;
407  ConstantInt *CC;
408  switch (Op0BO->getOpcode()) {
409  default: break;
410  case Instruction::Add:
411  case Instruction::And:
412  case Instruction::Or:
413  case Instruction::Xor: {
414  // These operators commute.
415  // Turn (Y + (X >> C)) << C -> (X + (Y << C)) & (~0 << C)
416  if (isLeftShift && Op0BO->getOperand(1)->hasOneUse() &&
417  match(Op0BO->getOperand(1), m_Shr(m_Value(V1),
418  m_Specific(Op1)))) {
419  Value *YS = // (Y << C)
420  Builder->CreateShl(Op0BO->getOperand(0), Op1, Op0BO->getName());
421  // (X + (Y << C))
422  Value *X = Builder->CreateBinOp(Op0BO->getOpcode(), YS, V1,
423  Op0BO->getOperand(1)->getName());
424  uint32_t Op1Val = Op1->getLimitedValue(TypeBits);
425  return BinaryOperator::CreateAnd(X, ConstantInt::get(I.getContext(),
426  APInt::getHighBitsSet(TypeBits, TypeBits-Op1Val)));
427  }
428 
429  // Turn (Y + ((X >> C) & CC)) << C -> ((X & (CC << C)) + (Y << C))
430  Value *Op0BOOp1 = Op0BO->getOperand(1);
431  if (isLeftShift && Op0BOOp1->hasOneUse() &&
432  match(Op0BOOp1,
433  m_And(m_OneUse(m_Shr(m_Value(V1), m_Specific(Op1))),
434  m_ConstantInt(CC)))) {
435  Value *YS = // (Y << C)
436  Builder->CreateShl(Op0BO->getOperand(0), Op1,
437  Op0BO->getName());
438  // X & (CC << C)
439  Value *XM = Builder->CreateAnd(V1, ConstantExpr::getShl(CC, Op1),
440  V1->getName()+".mask");
441  return BinaryOperator::Create(Op0BO->getOpcode(), YS, XM);
442  }
443  }
444 
445  // FALL THROUGH.
446  case Instruction::Sub: {
447  // Turn ((X >> C) + Y) << C -> (X + (Y << C)) & (~0 << C)
448  if (isLeftShift && Op0BO->getOperand(0)->hasOneUse() &&
449  match(Op0BO->getOperand(0), m_Shr(m_Value(V1),
450  m_Specific(Op1)))) {
451  Value *YS = // (Y << C)
452  Builder->CreateShl(Op0BO->getOperand(1), Op1, Op0BO->getName());
453  // (X + (Y << C))
454  Value *X = Builder->CreateBinOp(Op0BO->getOpcode(), V1, YS,
455  Op0BO->getOperand(0)->getName());
456  uint32_t Op1Val = Op1->getLimitedValue(TypeBits);
457  return BinaryOperator::CreateAnd(X, ConstantInt::get(I.getContext(),
458  APInt::getHighBitsSet(TypeBits, TypeBits-Op1Val)));
459  }
460 
461  // Turn (((X >> C)&CC) + Y) << C -> (X + (Y << C)) & (CC << C)
462  if (isLeftShift && Op0BO->getOperand(0)->hasOneUse() &&
463  match(Op0BO->getOperand(0),
464  m_And(m_OneUse(m_Shr(m_Value(V1), m_Value(V2))),
465  m_ConstantInt(CC))) && V2 == Op1) {
466  Value *YS = // (Y << C)
467  Builder->CreateShl(Op0BO->getOperand(1), Op1, Op0BO->getName());
468  // X & (CC << C)
469  Value *XM = Builder->CreateAnd(V1, ConstantExpr::getShl(CC, Op1),
470  V1->getName()+".mask");
471 
472  return BinaryOperator::Create(Op0BO->getOpcode(), XM, YS);
473  }
474 
475  break;
476  }
477  }
478 
479 
480  // If the operand is an bitwise operator with a constant RHS, and the
481  // shift is the only use, we can pull it out of the shift.
482  if (ConstantInt *Op0C = dyn_cast<ConstantInt>(Op0BO->getOperand(1))) {
483  bool isValid = true; // Valid only for And, Or, Xor
484  bool highBitSet = false; // Transform if high bit of constant set?
485 
486  switch (Op0BO->getOpcode()) {
487  default: isValid = false; break; // Do not perform transform!
488  case Instruction::Add:
489  isValid = isLeftShift;
490  break;
491  case Instruction::Or:
492  case Instruction::Xor:
493  highBitSet = false;
494  break;
495  case Instruction::And:
496  highBitSet = true;
497  break;
498  }
499 
500  // If this is a signed shift right, and the high bit is modified
501  // by the logical operation, do not perform the transformation.
502  // The highBitSet boolean indicates the value of the high bit of
503  // the constant which would cause it to be modified for this
504  // operation.
505  //
506  if (isValid && I.getOpcode() == Instruction::AShr)
507  isValid = Op0C->getValue()[TypeBits-1] == highBitSet;
508 
509  if (isValid) {
510  Constant *NewRHS = ConstantExpr::get(I.getOpcode(), Op0C, Op1);
511 
512  Value *NewShift =
513  Builder->CreateBinOp(I.getOpcode(), Op0BO->getOperand(0), Op1);
514  NewShift->takeName(Op0BO);
515 
516  return BinaryOperator::Create(Op0BO->getOpcode(), NewShift,
517  NewRHS);
518  }
519  }
520  }
521  }
522 
523  // Find out if this is a shift of a shift by a constant.
524  BinaryOperator *ShiftOp = dyn_cast<BinaryOperator>(Op0);
525  if (ShiftOp && !ShiftOp->isShift())
526  ShiftOp = 0;
527 
528  if (ShiftOp && isa<ConstantInt>(ShiftOp->getOperand(1))) {
529 
530  // This is a constant shift of a constant shift. Be careful about hiding
531  // shl instructions behind bit masks. They are used to represent multiplies
532  // by a constant, and it is important that simple arithmetic expressions
533  // are still recognizable by scalar evolution.
534  //
535  // The transforms applied to shl are very similar to the transforms applied
536  // to mul by constant. We can be more aggressive about optimizing right
537  // shifts.
538  //
539  // Combinations of right and left shifts will still be optimized in
540  // DAGCombine where scalar evolution no longer applies.
541 
542  ConstantInt *ShiftAmt1C = cast<ConstantInt>(ShiftOp->getOperand(1));
543  uint32_t ShiftAmt1 = ShiftAmt1C->getLimitedValue(TypeBits);
544  uint32_t ShiftAmt2 = Op1->getLimitedValue(TypeBits);
545  assert(ShiftAmt2 != 0 && "Should have been simplified earlier");
546  if (ShiftAmt1 == 0) return 0; // Will be simplified in the future.
547  Value *X = ShiftOp->getOperand(0);
548 
549  IntegerType *Ty = cast<IntegerType>(I.getType());
550 
551  // Check for (X << c1) << c2 and (X >> c1) >> c2
552  if (I.getOpcode() == ShiftOp->getOpcode()) {
553  uint32_t AmtSum = ShiftAmt1+ShiftAmt2; // Fold into one big shift.
554  // If this is oversized composite shift, then unsigned shifts get 0, ashr
555  // saturates.
556  if (AmtSum >= TypeBits) {
557  if (I.getOpcode() != Instruction::AShr)
558  return ReplaceInstUsesWith(I, Constant::getNullValue(I.getType()));
559  AmtSum = TypeBits-1; // Saturate to 31 for i32 ashr.
560  }
561 
562  return BinaryOperator::Create(I.getOpcode(), X,
563  ConstantInt::get(Ty, AmtSum));
564  }
565 
566  if (ShiftAmt1 == ShiftAmt2) {
567  // If we have ((X << C) >>u C), turn this into X & (-1 >>u C).
568  if (I.getOpcode() == Instruction::LShr &&
569  ShiftOp->getOpcode() == Instruction::Shl) {
570  APInt Mask(APInt::getLowBitsSet(TypeBits, TypeBits - ShiftAmt1));
571  return BinaryOperator::CreateAnd(X,
572  ConstantInt::get(I.getContext(), Mask));
573  }
574  } else if (ShiftAmt1 < ShiftAmt2) {
575  uint32_t ShiftDiff = ShiftAmt2-ShiftAmt1;
576 
577  // (X >>?,exact C1) << C2 --> X << (C2-C1)
578  // The inexact version is deferred to DAGCombine so we don't hide shl
579  // behind a bit mask.
580  if (I.getOpcode() == Instruction::Shl &&
581  ShiftOp->getOpcode() != Instruction::Shl &&
582  ShiftOp->isExact()) {
583  assert(ShiftOp->getOpcode() == Instruction::LShr ||
584  ShiftOp->getOpcode() == Instruction::AShr);
585  ConstantInt *ShiftDiffCst = ConstantInt::get(Ty, ShiftDiff);
586  BinaryOperator *NewShl = BinaryOperator::Create(Instruction::Shl,
587  X, ShiftDiffCst);
589  NewShl->setHasNoSignedWrap(I.hasNoSignedWrap());
590  return NewShl;
591  }
592 
593  // (X << C1) >>u C2 --> X >>u (C2-C1) & (-1 >> C2)
594  if (I.getOpcode() == Instruction::LShr &&
595  ShiftOp->getOpcode() == Instruction::Shl) {
596  ConstantInt *ShiftDiffCst = ConstantInt::get(Ty, ShiftDiff);
597  // (X <<nuw C1) >>u C2 --> X >>u (C2-C1)
598  if (ShiftOp->hasNoUnsignedWrap()) {
599  BinaryOperator *NewLShr = BinaryOperator::Create(Instruction::LShr,
600  X, ShiftDiffCst);
601  NewLShr->setIsExact(I.isExact());
602  return NewLShr;
603  }
604  Value *Shift = Builder->CreateLShr(X, ShiftDiffCst);
605 
606  APInt Mask(APInt::getLowBitsSet(TypeBits, TypeBits - ShiftAmt2));
607  return BinaryOperator::CreateAnd(Shift,
608  ConstantInt::get(I.getContext(),Mask));
609  }
610 
611  // We can't handle (X << C1) >>s C2, it shifts arbitrary bits in. However,
612  // we can handle (X <<nsw C1) >>s C2 since it only shifts in sign bits.
613  if (I.getOpcode() == Instruction::AShr &&
614  ShiftOp->getOpcode() == Instruction::Shl) {
615  if (ShiftOp->hasNoSignedWrap()) {
616  // (X <<nsw C1) >>s C2 --> X >>s (C2-C1)
617  ConstantInt *ShiftDiffCst = ConstantInt::get(Ty, ShiftDiff);
618  BinaryOperator *NewAShr = BinaryOperator::Create(Instruction::AShr,
619  X, ShiftDiffCst);
620  NewAShr->setIsExact(I.isExact());
621  return NewAShr;
622  }
623  }
624  } else {
625  assert(ShiftAmt2 < ShiftAmt1);
626  uint32_t ShiftDiff = ShiftAmt1-ShiftAmt2;
627 
628  // (X >>?exact C1) << C2 --> X >>?exact (C1-C2)
629  // The inexact version is deferred to DAGCombine so we don't hide shl
630  // behind a bit mask.
631  if (I.getOpcode() == Instruction::Shl &&
632  ShiftOp->getOpcode() != Instruction::Shl &&
633  ShiftOp->isExact()) {
634  ConstantInt *ShiftDiffCst = ConstantInt::get(Ty, ShiftDiff);
635  BinaryOperator *NewShr = BinaryOperator::Create(ShiftOp->getOpcode(),
636  X, ShiftDiffCst);
637  NewShr->setIsExact(true);
638  return NewShr;
639  }
640 
641  // (X << C1) >>u C2 --> X << (C1-C2) & (-1 >> C2)
642  if (I.getOpcode() == Instruction::LShr &&
643  ShiftOp->getOpcode() == Instruction::Shl) {
644  ConstantInt *ShiftDiffCst = ConstantInt::get(Ty, ShiftDiff);
645  if (ShiftOp->hasNoUnsignedWrap()) {
646  // (X <<nuw C1) >>u C2 --> X <<nuw (C1-C2)
647  BinaryOperator *NewShl = BinaryOperator::Create(Instruction::Shl,
648  X, ShiftDiffCst);
649  NewShl->setHasNoUnsignedWrap(true);
650  return NewShl;
651  }
652  Value *Shift = Builder->CreateShl(X, ShiftDiffCst);
653 
654  APInt Mask(APInt::getLowBitsSet(TypeBits, TypeBits - ShiftAmt2));
655  return BinaryOperator::CreateAnd(Shift,
656  ConstantInt::get(I.getContext(),Mask));
657  }
658 
659  // We can't handle (X << C1) >>s C2, it shifts arbitrary bits in. However,
660  // we can handle (X <<nsw C1) >>s C2 since it only shifts in sign bits.
661  if (I.getOpcode() == Instruction::AShr &&
662  ShiftOp->getOpcode() == Instruction::Shl) {
663  if (ShiftOp->hasNoSignedWrap()) {
664  // (X <<nsw C1) >>s C2 --> X <<nsw (C1-C2)
665  ConstantInt *ShiftDiffCst = ConstantInt::get(Ty, ShiftDiff);
666  BinaryOperator *NewShl = BinaryOperator::Create(Instruction::Shl,
667  X, ShiftDiffCst);
668  NewShl->setHasNoSignedWrap(true);
669  return NewShl;
670  }
671  }
672  }
673  }
674  return 0;
675 }
676 
678  if (Value *V = SimplifyShlInst(I.getOperand(0), I.getOperand(1),
680  TD))
681  return ReplaceInstUsesWith(I, V);
682 
683  if (Instruction *V = commonShiftTransforms(I))
684  return V;
685 
686  if (ConstantInt *Op1C = dyn_cast<ConstantInt>(I.getOperand(1))) {
687  unsigned ShAmt = Op1C->getZExtValue();
688 
689  // If the shifted-out value is known-zero, then this is a NUW shift.
690  if (!I.hasNoUnsignedWrap() &&
692  APInt::getHighBitsSet(Op1C->getBitWidth(), ShAmt))) {
694  return &I;
695  }
696 
697  // If the shifted out value is all signbits, this is a NSW shift.
698  if (!I.hasNoSignedWrap() &&
699  ComputeNumSignBits(I.getOperand(0)) > ShAmt) {
700  I.setHasNoSignedWrap();
701  return &I;
702  }
703  }
704 
705  // (C1 << A) << C2 -> (C1 << C2) << A
706  Constant *C1, *C2;
707  Value *A;
708  if (match(I.getOperand(0), m_OneUse(m_Shl(m_Constant(C1), m_Value(A)))) &&
709  match(I.getOperand(1), m_Constant(C2)))
710  return BinaryOperator::CreateShl(ConstantExpr::getShl(C1, C2), A);
711 
712  return 0;
713 }
714 
716  if (Value *V = SimplifyLShrInst(I.getOperand(0), I.getOperand(1),
717  I.isExact(), TD))
718  return ReplaceInstUsesWith(I, V);
719 
720  if (Instruction *R = commonShiftTransforms(I))
721  return R;
722 
723  Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1);
724 
725  if (ConstantInt *Op1C = dyn_cast<ConstantInt>(Op1)) {
726  unsigned ShAmt = Op1C->getZExtValue();
727 
728  if (IntrinsicInst *II = dyn_cast<IntrinsicInst>(Op0)) {
729  unsigned BitWidth = Op0->getType()->getScalarSizeInBits();
730  // ctlz.i32(x)>>5 --> zext(x == 0)
731  // cttz.i32(x)>>5 --> zext(x == 0)
732  // ctpop.i32(x)>>5 --> zext(x == -1)
733  if ((II->getIntrinsicID() == Intrinsic::ctlz ||
734  II->getIntrinsicID() == Intrinsic::cttz ||
735  II->getIntrinsicID() == Intrinsic::ctpop) &&
736  isPowerOf2_32(BitWidth) && Log2_32(BitWidth) == ShAmt) {
737  bool isCtPop = II->getIntrinsicID() == Intrinsic::ctpop;
738  Constant *RHS = ConstantInt::getSigned(Op0->getType(), isCtPop ? -1:0);
739  Value *Cmp = Builder->CreateICmpEQ(II->getArgOperand(0), RHS);
740  return new ZExtInst(Cmp, II->getType());
741  }
742  }
743 
744  // If the shifted-out value is known-zero, then this is an exact shift.
745  if (!I.isExact() &&
746  MaskedValueIsZero(Op0,APInt::getLowBitsSet(Op1C->getBitWidth(),ShAmt))){
747  I.setIsExact();
748  return &I;
749  }
750  }
751 
752  return 0;
753 }
754 
756  if (Value *V = SimplifyAShrInst(I.getOperand(0), I.getOperand(1),
757  I.isExact(), TD))
758  return ReplaceInstUsesWith(I, V);
759 
760  if (Instruction *R = commonShiftTransforms(I))
761  return R;
762 
763  Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1);
764 
765  if (ConstantInt *Op1C = dyn_cast<ConstantInt>(Op1)) {
766  unsigned ShAmt = Op1C->getZExtValue();
767 
768  // If the input is a SHL by the same constant (ashr (shl X, C), C), then we
769  // have a sign-extend idiom.
770  Value *X;
771  if (match(Op0, m_Shl(m_Value(X), m_Specific(Op1)))) {
772  // If the left shift is just shifting out partial signbits, delete the
773  // extension.
774  if (cast<OverflowingBinaryOperator>(Op0)->hasNoSignedWrap())
775  return ReplaceInstUsesWith(I, X);
776 
777  // If the input is an extension from the shifted amount value, e.g.
778  // %x = zext i8 %A to i32
779  // %y = shl i32 %x, 24
780  // %z = ashr %y, 24
781  // then turn this into "z = sext i8 A to i32".
782  if (ZExtInst *ZI = dyn_cast<ZExtInst>(X)) {
783  uint32_t SrcBits = ZI->getOperand(0)->getType()->getScalarSizeInBits();
784  uint32_t DestBits = ZI->getType()->getScalarSizeInBits();
785  if (Op1C->getZExtValue() == DestBits-SrcBits)
786  return new SExtInst(ZI->getOperand(0), ZI->getType());
787  }
788  }
789 
790  // If the shifted-out value is known-zero, then this is an exact shift.
791  if (!I.isExact() &&
792  MaskedValueIsZero(Op0,APInt::getLowBitsSet(Op1C->getBitWidth(),ShAmt))){
793  I.setIsExact();
794  return &I;
795  }
796  }
797 
798  // See if we can turn a signed shr into an unsigned shr.
799  if (MaskedValueIsZero(Op0,
801  return BinaryOperator::CreateLShr(Op0, Op1);
802 
803  // Arithmetic shifting an all-sign-bit value is a no-op.
804  unsigned NumSignBits = ComputeNumSignBits(Op0);
805  if (NumSignBits == Op0->getType()->getScalarSizeInBits())
806  return ReplaceInstUsesWith(I, Op0);
807 
808  return 0;
809 }
810 
Value * CreateLShr(Value *LHS, Value *RHS, const Twine &Name="", bool isExact=false)
Definition: IRBuilder.h:753
BinaryOp_match< LHS, RHS, Instruction::And > m_And(const LHS &L, const RHS &R)
Definition: PatternMatch.h:467
class_match< Value > m_Value()
m_Value() - Match an arbitrary value and ignore it.
Definition: PatternMatch.h:70
void setHasNoSignedWrap(bool b=true)
static APInt getSignBit(unsigned BitWidth)
Get the SignBit for a specific bit width.
Definition: APInt.h:443
unsigned getScalarSizeInBits()
Definition: Type.cpp:135
BinaryOp_match< LHS, RHS, Instruction::SRem > m_SRem(const LHS &L, const RHS &R)
Definition: PatternMatch.h:455
enable_if_c<!is_simple_type< Y >::value, typename cast_retty< X, const Y >::ret_type >::type dyn_cast(const Y &Val)
Definition: Casting.h:266
This class represents zero extension of integer types.
bool MaskedValueIsZero(Value *V, const APInt &Mask, const DataLayout *TD=0, unsigned Depth=0)
static APInt getLowBitsSet(unsigned numBits, unsigned loBitsSet)
Get a value with low bits set.
Definition: APInt.h:528
class_match< Constant > m_Constant()
Definition: PatternMatch.h:78
static bool CanEvaluateShifted(Value *V, unsigned NumBits, bool isLeftShift, InstCombiner &IC)
void Add(Instruction *I)
This class represents a sign extension of integer types.
static Constant * getNullValue(Type *Ty)
Definition: Constants.cpp:111
StringRef getName() const
Definition: Value.cpp:167
bool uge(uint64_t Num) const
Determine if the value is greater or equal to the given number.
Definition: Constants.h:209
bool match(Val *V, const Pattern &P)
Definition: PatternMatch.h:42
DataLayout * getDataLayout() const
Definition: InstCombine.h:102
Instruction * commonShiftTransforms(BinaryOperator &I)
static Constant * get(unsigned Opcode, Constant *C1, Constant *C2, unsigned Flags=0)
Definition: Constants.cpp:1679
const APInt & getValue() const
Return the constant's value.
Definition: Constants.h:105
BinOp2_match< LHS, RHS, Instruction::LShr, Instruction::AShr > m_Shr(const LHS &L, const RHS &R)
m_Shr - Matches LShr or AShr.
Definition: PatternMatch.h:528
#define llvm_unreachable(msg)
void setHasNoUnsignedWrap(bool b=true)
APInt LLVM_ATTRIBUTE_UNUSED_RESULT lshr(unsigned shiftAmt) const
Logical right-shift function.
Definition: APInt.cpp:1127
InstCombiner - The -instcombine pass.
Definition: InstCombine.h:72
uint64_t getZExtValue() const
Return the zero extended value.
Definition: Constants.h:116
Value * CreateAnd(Value *LHS, Value *RHS, const Twine &Name="")
Definition: IRBuilder.h:789
static bool CanEvaluateTruncated(Value *V, Type *Ty)
Constant * ConstantFoldConstantExpression(const ConstantExpr *CE, const DataLayout *TD=0, const TargetLibraryInfo *TLI=0)
uint64_t getLimitedValue(uint64_t Limit=~0ULL) const
Get the constant's value with a saturation limit.
Definition: Constants.h:218
bool isLogicalShift() const
Definition: Instruction.h:108
class_match< ConstantInt > m_ConstantInt()
m_ConstantInt() - Match an arbitrary ConstantInt and ignore it.
Definition: PatternMatch.h:72
cst_pred_ty< is_power2 > m_Power2()
m_Power2() - Match an integer or vector power of 2.
Definition: PatternMatch.h:281
void takeName(Value *V)
Definition: Value.cpp:239
This class represents a truncation of integer types.
bool ult(const APInt &RHS) const
Unsigned less than comparison.
Definition: APInt.cpp:515
unsigned getNumIncomingValues() const
static APInt getHighBitsSet(unsigned numBits, unsigned hiBitsSet)
Get a value with high bits set.
Definition: APInt.h:510
OneUse_match< T > m_OneUse(const T &SubPattern)
Definition: PatternMatch.h:60
BinaryOp_match< LHS, RHS, Instruction::LShr > m_LShr(const LHS &L, const RHS &R)
Definition: PatternMatch.h:491
LLVM Constant Representation.
Definition: Constant.h:41
APInt Or(const APInt &LHS, const APInt &RHS)
Bitwise OR function for APInt.
Definition: APInt.h:1845
APInt Xor(const APInt &LHS, const APInt &RHS)
Bitwise XOR function for APInt.
Definition: APInt.h:1850
specificval_ty m_Specific(const Value *V)
m_Specific - Match if we have a specific specified value.
Definition: PatternMatch.h:323
BinaryOp_match< LHS, RHS, Instruction::Shl > m_Shl(const LHS &L, const RHS &R)
Definition: PatternMatch.h:485
Value * SimplifyShlInst(Value *Op0, Value *Op1, bool isNSW, bool isNUW, const DataLayout *TD=0, const TargetLibraryInfo *TLI=0, const DominatorTree *DT=0)
Value * getOperand(unsigned i) const
Definition: User.h:88
Integer representation type.
Definition: DerivedTypes.h:37
InstCombineWorklist Worklist
Worklist - All of the instructions that need to be simplified.
Definition: InstCombine.h:82
Instruction * visitLShr(BinaryOperator &I)
BuilderTy * Builder
Definition: InstCombine.h:87
LLVMContext & getContext() const
All values hold a context through their type.
Definition: Value.cpp:517
bool hasNoSignedWrap() const
hasNoSignedWrap - Determine whether the no signed wrap flag is set.
const Value * getTrueValue() const
void setIsExact(bool b=true)
BinaryOps getOpcode() const
Definition: InstrTypes.h:326
Class for constant integers.
Definition: Constants.h:51
Value * getIncomingValue(unsigned i) const
Type * getType() const
Definition: Value.h:111
static Value * GetShiftedValue(Value *V, unsigned NumBits, bool isLeftShift, InstCombiner &IC)
Instruction * FoldShiftByConstant(Value *Op0, ConstantInt *Op1, BinaryOperator &I)
static Constant * get(Type *Ty, uint64_t V, bool isSigned=false)
Definition: Constants.cpp:492
static ConstantInt * getSigned(IntegerType *Ty, int64_t V)
Get a ConstantInt for a specific signed value.
Definition: Constants.cpp:507
bool isExact() const
isExact - Determine whether the exact flag is set.
void setOperand(unsigned i, Value *Val)
Definition: User.h:92
raw_ostream & dbgs()
dbgs - Return a circular-buffered debug stream.
Definition: Debug.cpp:101
unsigned Log2_32(uint32_t Value)
Definition: MathExtras.h:443
Class for arbitrary precision integers.
Definition: APInt.h:75
TargetLibraryInfo * getTargetLibraryInfo() const
Definition: InstCombine.h:104
APInt And(const APInt &LHS, const APInt &RHS)
Bitwise AND function for APInt.
Definition: APInt.h:1840
Value * CreateShl(Value *LHS, Value *RHS, const Twine &Name="", bool HasNUW=false, bool HasNSW=false)
Definition: IRBuilder.h:734
static Constant * getZExt(Constant *C, Type *Ty)
Definition: Constants.cpp:1555
#define I(x, y, z)
Definition: MD5.cpp:54
bool hasOneUse() const
Definition: Value.h:161
static Constant * getShl(Constant *C1, Constant *C2, bool HasNUW=false, bool HasNSW=false)
Definition: Constants.cpp:2100
static BinaryOperator * Create(BinaryOps Op, Value *S1, Value *S2, const Twine &Name=Twine(), Instruction *InsertBefore=0)
unsigned ComputeNumSignBits(Value *Op, const DataLayout *TD=0, unsigned Depth=0)
LLVM Value Representation.
Definition: Value.h:66
bool hasNoUnsignedWrap() const
hasNoUnsignedWrap - Determine whether the no unsigned wrap flag is set.
unsigned getOpcode() const
getOpcode() returns a member of one of the enums like Instruction::Add.
Definition: Instruction.h:83
Value * SimplifyLShrInst(Value *Op0, Value *Op1, bool isExact, const DataLayout *TD=0, const TargetLibraryInfo *TLI=0, const DominatorTree *DT=0)
#define DEBUG(X)
Definition: Debug.h:97
bool isPowerOf2_32(uint32_t Value)
Definition: MathExtras.h:354
const Value * getFalseValue() const
Instruction * visitAShr(BinaryOperator &I)
Value * SimplifyAShrInst(Value *Op0, Value *Op1, bool isExact, const DataLayout *TD=0, const TargetLibraryInfo *TLI=0, const DominatorTree *DT=0)
void setIncomingValue(unsigned i, Value *V)
Instruction * visitShl(BinaryOperator &I)
static RegisterPass< NVPTXAllocaHoisting > X("alloca-hoisting","Hoisting alloca instructions in non-entry ""blocks to the entry block")
INITIALIZE_PASS(GlobalMerge,"global-merge","Global Merge", false, false) bool GlobalMerge const DataLayout * TD