16 #define DEBUG_TYPE "regalloc"
38 while (SegPos.valid()) {
39 SegPos.insert(RegPos->start, RegPos->end, &VirtReg);
40 if (++RegPos == RegEnd)
42 SegPos.advanceTo(RegPos->start);
49 SegPos.insert(RegEnd->start, RegEnd->end, &VirtReg);
50 for (; RegPos != RegEnd; ++RegPos, ++SegPos)
51 SegPos.insert(RegPos->start, RegPos->end, &VirtReg);
66 assert(SegPos.value() == &VirtReg &&
"Inconsistent LiveInterval");
72 RegPos = VirtReg.
advanceTo(RegPos, SegPos.start());
76 SegPos.advanceTo(RegPos->start);
87 OS <<
" [" << SI.start() <<
' ' << SI.stop() <<
"):"
97 VisitedVRegs.
set(SI.value()->reg);
105 std::find(InterferingVRegs.begin(), InterferingVRegs.end(), VirtReg);
106 return I != InterferingVRegs.end();
121 if (SeenAllInterferences || InterferingVRegs.size() >= MaxInterferingRegs)
122 return InterferingVRegs.size();
125 if (!CheckedFirstInterference) {
126 CheckedFirstInterference =
true;
129 if (VirtReg->empty() || LiveUnion->empty()) {
130 SeenAllInterferences =
true;
135 VirtRegI = VirtReg->begin();
136 LiveUnionI.setMap(LiveUnion->getMap());
137 LiveUnionI.find(VirtRegI->start);
142 while (LiveUnionI.valid()) {
143 assert(VirtRegI != VirtRegEnd &&
"Reached end of VirtReg");
146 while (VirtRegI->start < LiveUnionI.stop() &&
147 VirtRegI->end > LiveUnionI.start()) {
150 if (VReg != RecentReg && !isSeenInterference(VReg)) {
152 InterferingVRegs.push_back(VReg);
153 if (InterferingVRegs.size() >= MaxInterferingRegs)
154 return InterferingVRegs.
size();
157 if (!(++LiveUnionI).valid()) {
158 SeenAllInterferences =
true;
159 return InterferingVRegs.size();
165 assert(VirtRegI->end <= LiveUnionI.start() &&
"Expected non-overlap");
168 VirtRegI = VirtReg->advanceTo(VirtRegI, LiveUnionI.start());
169 if (VirtRegI == VirtRegEnd)
173 if (VirtRegI->start < LiveUnionI.stop())
177 LiveUnionI.advanceTo(VirtRegI->start);
179 SeenAllInterferences =
true;
180 return InterferingVRegs.size();
192 for (
unsigned i = 0; i != Size; ++i)
199 for (
unsigned i = 0; i != Size; ++i)
const_iterator begin() const
LiveIntervalUnion(Allocator &a)
iterator advanceTo(iterator I, SlotIndex Pos)
const_iterator find(KeyT x) const
void unify(LiveInterval &VirtReg)
friend class const_iterator
void print(raw_ostream &OS, const TargetRegisterInfo *TRI) const
bool isSeenInterference(LiveInterval *VReg) const
NDEBUG.
void init(LiveIntervalUnion::Allocator &, unsigned Size)
LiveSegments::iterator SegmentIter
void extract(LiveInterval &VirtReg)
void verify(LiveVirtRegBitSet &VisitedVRegs)
void *malloc(size_t size);
unsigned collectInterferingVRegs(unsigned MaxInterferingRegs=UINT_MAX)