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SpillPlacement.h
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1 //===-- SpillPlacement.h - Optimal Spill Code Placement --------*- C++ -*--===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This analysis computes the optimal spill code placement between basic blocks.
11 //
12 // The runOnMachineFunction() method only precomputes some profiling information
13 // about the CFG. The real work is done by prepare(), addConstraints(), and
14 // finish() which are called by the register allocator.
15 //
16 // Given a variable that is live across multiple basic blocks, and given
17 // constraints on the basic blocks where the variable is live, determine which
18 // edge bundles should have the variable in a register and which edge bundles
19 // should have the variable in a stack slot.
20 //
21 // The returned bit vector can be used to place optimal spill code at basic
22 // block entries and exits. Spill code placement inside a basic block is not
23 // considered.
24 //
25 //===----------------------------------------------------------------------===//
26 
27 #ifndef LLVM_CODEGEN_SPILLPLACEMENT_H
28 #define LLVM_CODEGEN_SPILLPLACEMENT_H
29 
30 #include "llvm/ADT/ArrayRef.h"
31 #include "llvm/ADT/SmallVector.h"
34 
35 namespace llvm {
36 
37 class BitVector;
38 class EdgeBundles;
39 class MachineBasicBlock;
40 class MachineLoopInfo;
41 
43  struct Node;
44  const MachineFunction *MF;
45  const EdgeBundles *bundles;
46  const MachineLoopInfo *loops;
47  Node *nodes;
48 
49  // Nodes that are active in the current computation. Owned by the prepare()
50  // caller.
51  BitVector *ActiveNodes;
52 
53  // Nodes with active links. Populated by scanActiveBundles.
55 
56  // Nodes that went positive during the last call to scanActiveBundles or
57  // iterate.
58  SmallVector<unsigned, 8> RecentPositive;
59 
60  // Block frequencies are computed once. Indexed by block number.
61  SmallVector<BlockFrequency, 4> BlockFrequencies;
62 
63 public:
64  static char ID; // Pass identification, replacement for typeid.
65 
67  ~SpillPlacement() { releaseMemory(); }
68 
69  /// BorderConstraint - A basic block has separate constraints for entry and
70  /// exit.
72  DontCare, ///< Block doesn't care / variable not live.
73  PrefReg, ///< Block entry/exit prefers a register.
74  PrefSpill, ///< Block entry/exit prefers a stack slot.
75  PrefBoth, ///< Block entry prefers both register and stack.
76  MustSpill ///< A register is impossible, variable must be spilled.
77  };
78 
79  /// BlockConstraint - Entry and exit constraints for a basic block.
80  struct BlockConstraint {
81  unsigned Number; ///< Basic block number (from MBB::getNumber()).
82  BorderConstraint Entry : 8; ///< Constraint on block entry.
83  BorderConstraint Exit : 8; ///< Constraint on block exit.
84 
85  /// True when this block changes the value of the live range. This means
86  /// the block has a non-PHI def. When this is false, a live-in value on
87  /// the stack can be live-out on the stack without inserting a spill.
89  };
90 
91  /// prepare - Reset state and prepare for a new spill placement computation.
92  /// @param RegBundles Bit vector to receive the edge bundles where the
93  /// variable should be kept in a register. Each bit
94  /// corresponds to an edge bundle, a set bit means the
95  /// variable should be kept in a register through the
96  /// bundle. A clear bit means the variable should be
97  /// spilled. This vector is retained.
98  void prepare(BitVector &RegBundles);
99 
100  /// addConstraints - Add constraints and biases. This method may be called
101  /// more than once to accumulate constraints.
102  /// @param LiveBlocks Constraints for blocks that have the variable live in or
103  /// live out.
104  void addConstraints(ArrayRef<BlockConstraint> LiveBlocks);
105 
106  /// addPrefSpill - Add PrefSpill constraints to all blocks listed. This is
107  /// equivalent to calling addConstraint with identical BlockConstraints with
108  /// Entry = Exit = PrefSpill, and ChangesValue = false.
109  ///
110  /// @param Blocks Array of block numbers that prefer to spill in and out.
111  /// @param Strong When true, double the negative bias for these blocks.
112  void addPrefSpill(ArrayRef<unsigned> Blocks, bool Strong);
113 
114  /// addLinks - Add transparent blocks with the given numbers.
115  void addLinks(ArrayRef<unsigned> Links);
116 
117  /// scanActiveBundles - Perform an initial scan of all bundles activated by
118  /// addConstraints and addLinks, updating their state. Add all the bundles
119  /// that now prefer a register to RecentPositive.
120  /// Prepare internal data structures for iterate.
121  /// Return true is there are any positive nodes.
122  bool scanActiveBundles();
123 
124  /// iterate - Update the network iteratively until convergence, or new bundles
125  /// are found.
126  void iterate();
127 
128  /// getRecentPositive - Return an array of bundles that became positive during
129  /// the previous call to scanActiveBundles or iterate.
130  ArrayRef<unsigned> getRecentPositive() { return RecentPositive; }
131 
132  /// finish - Compute the optimal spill code placement given the
133  /// constraints. No MustSpill constraints will be violated, and the smallest
134  /// possible number of PrefX constraints will be violated, weighted by
135  /// expected execution frequencies.
136  /// The selected bundles are returned in the bitvector passed to prepare().
137  /// @return True if a perfect solution was found, allowing the variable to be
138  /// in a register through all relevant bundles.
139  bool finish();
140 
141  /// getBlockFrequency - Return the estimated block execution frequency per
142  /// function invocation.
143  BlockFrequency getBlockFrequency(unsigned Number) const {
144  return BlockFrequencies[Number];
145  }
146 
147 private:
148  virtual bool runOnMachineFunction(MachineFunction&);
149  virtual void getAnalysisUsage(AnalysisUsage&) const;
150  virtual void releaseMemory();
151 
152  void activate(unsigned);
153 };
154 
155 } // end namespace llvm
156 
157 #endif
BlockFrequency getBlockFrequency(unsigned Number) const
A register is impossible, variable must be spilled.
void addPrefSpill(ArrayRef< unsigned > Blocks, bool Strong)
addPrefSpill - Same as addConstraints(PrefSpill)
ArrayRef< unsigned > getRecentPositive()
BorderConstraint Exit
Constraint on block exit.
BlockConstraint - Entry and exit constraints for a basic block.
void addLinks(ArrayRef< unsigned > Links)
addLinks - Add transparent blocks with the given numbers.
Block doesn't care / variable not live.
unsigned Number
Basic block number (from MBB::getNumber()).
BorderConstraint Entry
Constraint on block entry.
Block entry/exit prefers a register.
void addConstraints(ArrayRef< BlockConstraint > LiveBlocks)
Block entry/exit prefers a stack slot.
Block entry prefers both register and stack.
void prepare(BitVector &RegBundles)
machine loops