30 #define DEBUG_TYPE "spillplacement"
46 "Spill Code Placement Analysis",
true,
true)
54 void SpillPlacement::getAnalysisUsage(
AnalysisUsage &AU)
const {
124 if (
I->second == b) {
156 if (nodes[
I->second].
Value == -1)
158 else if (nodes[
I->second].
Value == 1)
183 bundles = &getAnalysis<EdgeBundles>();
184 loops = &getAnalysis<MachineLoopInfo>();
186 assert(!nodes &&
"Leaking node array");
193 unsigned Num =
I->getNumber();
201 void SpillPlacement::releaseMemory() {
207 void SpillPlacement::activate(
unsigned n) {
208 if (ActiveNodes->
test(n))
222 if (bundles->
getBlocks(n).size() > 100) {
233 E = LiveBlocks.
end();
I != E; ++
I) {
245 unsigned ob = bundles->
getBundle(
I->Number, 1);
271 unsigned Number = *
I;
273 unsigned ob = bundles->
getBundle(Number, 1);
292 RecentPositive.
clear();
297 if (nodes[n].mustSpill())
299 if (!nodes[n].Links.empty())
301 if (nodes[n].preferReg())
304 return !RecentPositive.
empty();
313 while (!RecentPositive.
empty())
325 for (
unsigned iteration = 0; iteration != 10; ++iteration) {
327 bool Changed =
false;
331 if (nodes[n].update(nodes)) {
333 if (nodes[n].preferReg())
337 if (!Changed || !RecentPositive.
empty())
345 if (nodes[n].update(nodes)) {
347 if (nodes[n].preferReg())
351 if (!Changed || !RecentPositive.
empty())
358 RecentPositive.
clear();
360 ActiveNodes = &RegBundles;
361 ActiveNodes->
clear();
367 assert(ActiveNodes &&
"Call prepare() first");
372 if (!nodes[n].preferReg()) {
373 ActiveNodes->
reset(n);
void resize(unsigned N, bool t=false)
resize - Grow or shrink the bitvector.
void push_back(const T &Elt)
spill code Spill Code Placement true
INITIALIZE_PASS_BEGIN(SpillPlacement,"spill-code-placement","Spill Code Placement Analysis", true, true) INITIALIZE_PASS_END(SpillPlacement
A register is impossible, variable must be spilled.
int find_next(unsigned Prev) const
BlockFrequency BiasP
BiasP - Sum of blocks that prefer a register.
static uint64_t getEntryFrequency()
Returns the frequency of the entry block of the function.
BlockFrequency getBlockFreq(const MachineBasicBlock *MBB) const
#define INITIALIZE_PASS_DEPENDENCY(depName)
void clear()
clear - Clear all bits.
unsigned getNumBlockIDs() const
void addPrefSpill(ArrayRef< unsigned > Blocks, bool Strong)
addPrefSpill - Same as addConstraints(PrefSpill)
T LLVM_ATTRIBUTE_UNUSED_RESULT pop_back_val()
#define INITIALIZE_PASS_END(passName, arg, name, cfg, analysis)
unsigned getNumBundles() const
getNumBundles - Return the total number of bundles in the CFG.
ID
LLVM Calling Convention Representation.
bool LLVM_ATTRIBUTE_UNUSED_RESULT empty() const
BlockFrequency SumLinkWeights
SumLinkWeights - Cached sum of the weights of all links + ThresHold.
void addBias(BlockFrequency freq, BorderConstraint direction)
addBias - Bias this node.
void addLinks(ArrayRef< unsigned > Links)
addLinks - Add transparent blocks with the given numbers.
Block doesn't care / variable not live.
spill code Spill Code Placement Analysis
ItTy next(ItTy it, Dist n)
void clear()
clear - Reset per-query data, but preserve frequencies that only depend on
bool empty() const
empty - Check if the array is empty.
Block entry/exit prefers a register.
void addConstraints(ArrayRef< BlockConstraint > LiveBlocks)
block Branch Probability Basic Block Placement
Block entry/exit prefers a stack slot.
bool test(unsigned Idx) const
void prepare(BitVector &RegBundles)
ArrayRef< unsigned > getBlocks(unsigned Bundle) const
getBlocks - Return an array of blocks that are connected to Bundle.
void addLink(unsigned b, BlockFrequency w)
addLink - Add a link to bundle b with weight w.
bool update(const Node nodes[])
static uint64_t getMaxFrequency()
Returns the maximum possible frequency, the saturation value.
virtual void getAnalysisUsage(AnalysisUsage &AU) const
SmallVector< std::pair< BlockFrequency, unsigned >, 4 > LinkVector
unsigned getBundle(unsigned N, bool Out) const
reverse_iterator rbegin()
LLVM Value Representation.
BasicBlockListType::iterator iterator
bool mustSpill() const
mustSpill - Return True if this node is so biased that it must spill.
static const BlockFrequency Threshold
BlockFrequency BiasN
BiasN - Sum of blocks that prefer a spill.
bool preferReg() const
preferReg - Return true when this node prefers to be in a register.