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llvm::X86 Namespace Reference

Define some predicates that are used for node matching. More...

Enumerations

enum  {
  BX_SI = 500, BX_DI = 501, BP_SI = 502, BP_DI = 503,
  sib = 504, sib64 = 505
}
 
enum  {
  AddrBaseReg = 0, AddrScaleAmt = 1, AddrIndexReg = 2, AddrDisp = 3,
  AddrSegmentReg = 4, AddrNumOperands = 5
}
 
enum  Fixups {
  reloc_riprel_4byte = FirstTargetFixupKind, reloc_riprel_4byte_movq_load, reloc_signed_4byte, reloc_global_offset_table,
  LastTargetFixupKind, NumTargetFixupKinds = LastTargetFixupKind - FirstTargetFixupKind
}
 
enum  CondCode {
  COND_A = 0, COND_AE = 1, COND_B = 2, COND_BE = 3,
  COND_E = 4, COND_G = 5, COND_GE = 6, COND_L = 7,
  COND_LE = 8, COND_NE = 9, COND_NO = 10, COND_NP = 11,
  COND_NS = 12, COND_O = 13, COND_P = 14, COND_S = 15,
  COND_NE_OR_P, COND_NP_OR_E, COND_INVALID
}
 
enum  RelocationType {
  reloc_pcrel_word = 0, reloc_picrel_word = 1, reloc_absolute_word = 2, reloc_absolute_word_sext = 3,
  reloc_absolute_dword = 4
}
 

Functions

unsigned GetCondBranchFromCond (CondCode CC)
 
CondCode getCondFromCMovOpc (unsigned Opc)
 getCondFromCmovOpc - return condition code of a CMov opcode. More...
 
CondCode GetOppositeBranchCondition (X86::CondCode CC)
 
bool isVEXTRACT128Index (SDNode *N)
 
bool isVINSERT128Index (SDNode *N)
 
bool isVEXTRACT256Index (SDNode *N)
 
bool isVINSERT256Index (SDNode *N)
 
unsigned getExtractVEXTRACT128Immediate (SDNode *N)
 
unsigned getInsertVINSERT128Immediate (SDNode *N)
 
unsigned getExtractVEXTRACT256Immediate (SDNode *N)
 
unsigned getInsertVINSERT256Immediate (SDNode *N)
 
bool isZeroNode (SDValue Elt)
 
bool isOffsetSuitableForCodeModel (int64_t Offset, CodeModel::Model M, bool hasSymbolicDisplacement=true)
 
bool isCalleePop (CallingConv::ID CallingConv, bool is64Bit, bool IsVarArg, bool TailCallOpt)
 
FastISelcreateFastISel (FunctionLoweringInfo &funcInfo, const TargetLibraryInfo *libInfo)
 

Detailed Description

Define some predicates that are used for node matching.

Enumeration Type Documentation

anonymous enum
Enumerator
BX_SI 
BX_DI 
BP_SI 
BP_DI 
sib 
sib64 

Definition at line 57 of file X86Disassembler.cpp.

anonymous enum
Enumerator
AddrBaseReg 
AddrScaleAmt 
AddrIndexReg 
AddrDisp 
AddrSegmentReg 

AddrSegmentReg - The operand # of the segment in the memory operand.

AddrNumOperands 

AddrNumOperands - Total number of operands in a memory reference.

Definition at line 32 of file X86BaseInfo.h.

Enumerator
COND_A 
COND_AE 
COND_B 
COND_BE 
COND_E 
COND_G 
COND_GE 
COND_L 
COND_LE 
COND_NE 
COND_NO 
COND_NP 
COND_NS 
COND_O 
COND_P 
COND_S 
COND_NE_OR_P 
COND_NP_OR_E 
COND_INVALID 

Definition at line 32 of file X86InstrInfo.h.

Enumerator
reloc_riprel_4byte 
reloc_riprel_4byte_movq_load 
reloc_signed_4byte 
reloc_global_offset_table 
LastTargetFixupKind 
NumTargetFixupKinds 

Definition at line 17 of file X86FixupKinds.h.

RelocationType - An enum for the x86 relocation codes. Note that the terminology here doesn't follow x86 convention - word means 32-bit and dword means 64-bit. The relocations will be treated by JIT or ObjectCode emitters, this is transparent to the x86 code emitter but JIT and ObjectCode will treat them differently

Enumerator
reloc_pcrel_word 

reloc_pcrel_word - PC relative relocation, add the relocated value to the value already in memory, after we adjust it for where the PC is.

reloc_picrel_word 

reloc_picrel_word - PIC base relative relocation, add the relocated value to the value already in memory, after we adjust it for where the PIC base is.

reloc_absolute_word 

reloc_absolute_word - absolute relocation, just add the relocated value to the value already in memory.

reloc_absolute_word_sext 

reloc_absolute_word_sext - absolute relocation, just add the relocated value to the value already in memory. In object files, it represents a value which must be sign-extended when resolving the relocation.

reloc_absolute_dword 

reloc_absolute_dword - absolute relocation, just add the relocated value to the value already in memory.

Definition at line 26 of file X86Relocations.h.

Function Documentation

FastISel * llvm::X86::createFastISel ( FunctionLoweringInfo funcInfo,
const TargetLibraryInfo libInfo 
)

Definition at line 2553 of file X86FastISel.cpp.

Referenced by llvm::X86TargetLowering::createFastISel().

unsigned llvm::X86::GetCondBranchFromCond ( X86::CondCode  CC)
X86::CondCode llvm::X86::getCondFromCMovOpc ( unsigned  Opc)

getCondFromCmovOpc - return condition code of a CMov opcode.

Definition at line 2501 of file X86InstrInfo.cpp.

References COND_A, COND_AE, COND_B, COND_BE, COND_E, COND_G, COND_GE, COND_INVALID, COND_L, COND_LE, COND_NE, COND_NO, COND_NP, COND_NS, COND_O, COND_P, and COND_S.

Referenced by llvm::X86InstrInfo::optimizeCompareInstr().

unsigned llvm::X86::getExtractVEXTRACT128Immediate ( SDNode N)

getExtractVEXTRACT128Immediate - Return the appropriate immediate to extract the specified EXTRACT_SUBVECTOR index with VEXTRACTF128, VEXTRACTI128 instructions.

getExtractVEXTRACT128Immediate - Return the appropriate immediate to extract the specified EXTRACT_SUBVECTOR index with VEXTRACTF128 and VINSERTI128 instructions.

Definition at line 4529 of file X86ISelLowering.cpp.

References getExtractVEXTRACTImmediate().

unsigned llvm::X86::getExtractVEXTRACT256Immediate ( SDNode N)

getExtractVEXTRACT256Immediate - Return the appropriate immediate to extract the specified EXTRACT_SUBVECTOR index with VEXTRACTF64X4, VEXTRACTI64x4 instructions.

getExtractVEXTRACT256Immediate - Return the appropriate immediate to extract the specified EXTRACT_SUBVECTOR index with VEXTRACTF64x4 and VINSERTI64x4 instructions.

Definition at line 4536 of file X86ISelLowering.cpp.

References getExtractVEXTRACTImmediate().

unsigned llvm::X86::getInsertVINSERT128Immediate ( SDNode N)

getInsertVINSERT128Immediate - Return the appropriate immediate to insert at the specified INSERT_SUBVECTOR index with VINSERTF128, VINSERT128 instructions.

getInsertVINSERT128Immediate - Return the appropriate immediate to insert at the specified INSERT_SUBVECTOR index with VINSERTF128 and VINSERTI128 instructions.

Definition at line 4543 of file X86ISelLowering.cpp.

References getInsertVINSERTImmediate().

unsigned llvm::X86::getInsertVINSERT256Immediate ( SDNode N)

getInsertVINSERT256Immediate - Return the appropriate immediate to insert at the specified INSERT_SUBVECTOR index with VINSERTF64x4, VINSERTI64x4 instructions.

getInsertVINSERT256Immediate - Return the appropriate immediate to insert at the specified INSERT_SUBVECTOR index with VINSERTF46x4 and VINSERTI64x4 instructions.

Definition at line 4550 of file X86ISelLowering.cpp.

References getInsertVINSERTImmediate().

X86::CondCode llvm::X86::GetOppositeBranchCondition ( X86::CondCode  CC)

GetOppositeBranchCondition - Return the inverse of the specified cond, e.g. turning COND_E to COND_NE.

GetOppositeBranchCondition - Return the inverse of the specified condition, e.g. turning COND_E to COND_NE.

Definition at line 2579 of file X86InstrInfo.cpp.

References COND_A, COND_AE, COND_B, COND_BE, COND_E, COND_G, COND_GE, COND_L, COND_LE, COND_NE, COND_NO, COND_NP, COND_NS, COND_O, COND_P, COND_S, and llvm_unreachable.

Referenced by checkBoolTestSetCCCombine(), and PerformCMOVCombine().

bool llvm::X86::isCalleePop ( CallingConv::ID  CallingConv,
bool  is64Bit,
bool  IsVarArg,
bool  TailCallOpt 
)

isCalleePop - Determines whether the callee is required to pop its own arguments. Callee pop is necessary to support tail calls.

Definition at line 3395 of file X86ISelLowering.cpp.

References llvm::CallingConv::Fast, llvm::CallingConv::GHC, llvm::CallingConv::HiPE, llvm::CallingConv::X86_FastCall, llvm::CallingConv::X86_StdCall, and llvm::CallingConv::X86_ThisCall.

bool llvm::X86::isOffsetSuitableForCodeModel ( int64_t  Offset,
CodeModel::Model  M,
bool  hasSymbolicDisplacement = true 
)

isOffsetSuitableForCodeModel - Returns true of the given offset can be fit into displacement field of the instruction.

Definition at line 3363 of file X86ISelLowering.cpp.

References llvm::isInt< 32 >(), llvm::CodeModel::Kernel, and llvm::CodeModel::Small.

Referenced by llvm::X86TargetLowering::isLegalAddressingMode().

bool llvm::X86::isVEXTRACT128Index ( SDNode N)

isVEXTRACT128Index - Return true if the specified EXTRACT_SUBVECTOR operand specifies a vector extract that is suitable for input to VEXTRACTF128, VEXTRACTI128 instructions.

Definition at line 4384 of file X86ISelLowering.cpp.

References isVEXTRACTIndex().

bool llvm::X86::isVEXTRACT256Index ( SDNode N)

isVEXTRACT256Index - Return true if the specified EXTRACT_SUBVECTOR operand specifies a vector extract that is suitable for input to VEXTRACTF64X4, VEXTRACTI64X4 instructions.

Definition at line 4388 of file X86ISelLowering.cpp.

References isVEXTRACTIndex().

bool llvm::X86::isVINSERT128Index ( SDNode N)

isVINSERT128Index - Return true if the specified INSERT_SUBVECTOR operand specifies a subvector insert that is suitable for input to VINSERTF128, VINSERTI128 instructions.

Definition at line 4376 of file X86ISelLowering.cpp.

References isVINSERTIndex().

bool llvm::X86::isVINSERT256Index ( SDNode N)

isVINSERT256Index - Return true if the specified INSERT_SUBVECTOR operand specifies a subvector insert that is suitable for input to VINSERTF64X4, VINSERTI64X4 instructions.

Definition at line 4380 of file X86ISelLowering.cpp.

References isVINSERTIndex().

bool llvm::X86::isZeroNode ( SDValue  Elt)

isZeroNode - Returns true if Elt is a constant zero or a floating point constant +0.0.

Definition at line 4556 of file X86ISelLowering.cpp.

Referenced by getAtomicLoadArithTargetConstant(), getNumOfConsecutiveZeros(), isZeroShuffle(), OptimizeConditionalInDecrement(), and PerformADCCombine().