llvm::SDValue Class Reference

#include <SelectionDAGNodes.h>

Public Member Functions
	SDValue ()
	SDValue (SDNode *node, unsigned resno)
unsigned	getResNo () const
	get the index which selects a specific result in the SDNode More...
SDNode *	getNode () const
	get the SDNode which holds the desired result More...
void	setNode (SDNode *N)
	set the SDNode More...
SDNode *	operator-> () const
bool	operator== (const SDValue &O) const
bool	operator!= (const SDValue &O) const
bool	operator< (const SDValue &O) const
SDValue	getValue (unsigned R) const
bool	isOperandOf (SDNode *N) const
EVT	getValueType () const
MVT	getSimpleValueType () const
	Return the simple ValueType of the referenced return value. More...
unsigned	getValueSizeInBits () const
unsigned	getOpcode () const
unsigned	getNumOperands () const
const SDValue &	getOperand (unsigned i) const
uint64_t	getConstantOperandVal (unsigned i) const
bool	isTargetMemoryOpcode () const
bool	isTargetOpcode () const
bool	isMachineOpcode () const
unsigned	getMachineOpcode () const
const DebugLoc	getDebugLoc () const
void	dump () const
void	dumpr () const
bool	reachesChainWithoutSideEffects (SDValue Dest, unsigned Depth=2) const
bool	use_empty () const
bool	hasOneUse () const

Detailed Description

SDValue - Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation. Many nodes return multiple values, from loads (which define a token and a return value) to ADDC (which returns a result and a carry value), to calls (which may return an arbitrary number of values).

As such, each use of a SelectionDAG computation must indicate the node that computes it as well as which return value to use from that node. This pair of information is represented with the SDValue value type.

Definition at line 94 of file SelectionDAGNodes.h.

Constructor & Destructor Documentation

llvm::SDValue::SDValue ( )

inline

Definition at line 98 of file SelectionDAGNodes.h.

Referenced by getValue().

llvm::SDValue::SDValue ( SDNode *  node, unsigned  resno  )

inline

Definition at line 99 of file SelectionDAGNodes.h.

Member Function Documentation

void llvm::SDValue::dump ( ) const

inline

Definition at line 876 of file SelectionDAGNodes.h.

References llvm::SDNode::dump().

Referenced by llvm::AMDGPUTargetLowering::LowerCall().

void llvm::SDValue::dumpr ( ) const

inline

Definition at line 879 of file SelectionDAGNodes.h.

References llvm::SDNode::dumpr().

uint64_t llvm::SDValue::getConstantOperandVal ( unsigned  i ) const

inline

Definition at line 852 of file SelectionDAGNodes.h.

References llvm::SDNode::getConstantOperandVal().

Referenced by checkBoolTestSetCCCombine(), CMPEQCombine(), FoldMaskAndShiftToExtract(), FoldMaskAndShiftToScale(), FoldMaskedShiftToScaledMask(), getLSBForBFI(), llvm::SelectionDAG::getNode(), llvm::SelectionDAG::InferPtrAlignment(), LowerAsSplatVectorLoad(), LowerFRAMEADDR(), LowerRETURNADDR(), OptimizeConditionalInDecrement(), and PerformSELECTCombine().

const DebugLoc llvm::SDValue::getDebugLoc ( ) const

inline

Definition at line 873 of file SelectionDAGNodes.h.

References llvm::SDNode::getDebugLoc().

unsigned llvm::SDValue::getMachineOpcode ( ) const

inline

Definition at line 864 of file SelectionDAGNodes.h.

References llvm::SDNode::getMachineOpcode().

Referenced by FoldOperand().

SDNode* llvm::SDValue::getNode ( ) const

inline

get the SDNode which holds the desired result

Definition at line 105 of file SelectionDAGNodes.h.

Referenced by AddCombineTo64bitMLAL(), AddCombineToVPADDL(), llvm::DOTGraphTraits< SelectionDAG * >::addCustomGraphFeatures(), AddGlue(), llvm::AArch64TargetLowering::addTokenForArgument(), adjustForTestUnderMask(), adjustZeroCmp(), buildFromShuffleMostly(), llvm::TargetLowering::BuildSDIV(), llvm::TargetLowering::BuildUDIV(), canChangeToInt(), canFoldInAddressingMode(), CanFoldXORWithAllOnes(), checkBoolTestSetCCCombine(), llvm::checkForCycles(), CheckForMaskedLoad(), ChooseConstraint(), CombineBaseUpdate(), combineSelectAndUse(), combineSelectAndUseCommutative(), combineShlAddConstant(), CombineVLDDUP(), llvm::SelectionDAG::ComputeMaskedBits(), llvm::SelectionDAG::dump(), DumpNodes(), DumpNodesr(), EltsFromConsecutiveLoads(), ExpandPowI(), ExtendUsesToFormExtLoad(), FindCallSeqStart(), findConsecutiveLoad(), findNonImmUse(), findUser(), FoldOperand(), llvm::SelectionDAG::FoldSetCC(), llvm::PPC::get_VSPLTI_elt(), getBuildPairElt(), llvm::SelectionDAG::getCALLSEQ_END(), llvm::SelectionDAG::getCopyFromReg(), llvm::SelectionDAG::getCopyToReg(), llvm::ScheduleDAGSDNodes::getCustomGraphFeatures(), llvm::DOTGraphTraits< SelectionDAG * >::getEdgeAttributes(), getExtractVEXTRACTImmediate(), llvm::MipsDAGToDAGISel::getGlobalBaseReg(), llvm::SDNode::getGluedNode(), llvm::DenseMapInfo< SDValue >::getHashValue(), getInsertVINSERTImmediate(), llvm::SelectionDAG::getMemcpy(), getMemcpyLoadsAndStores(), llvm::SelectionDAG::getMemmove(), llvm::SelectionDAG::getMemset(), llvm::SDUse::getNode(), llvm::SelectionDAG::getNode(), getNodeRegMask(), llvm::SelectionDAGBuilder::getNonRegisterValue(), getNumOfConsecutiveZeros(), llvm::MipsTargetLowering::getOpndList(), llvm::HexagonTargetLowering::getPostIndexedAddressParts(), llvm::ARMTargetLowering::getPreIndexedAddressParts(), llvm::PPCTargetLowering::getPreIndexedAddressParts(), llvm::AArch64TargetLowering::getSelectableIntSetCC(), getShuffleScalarElt(), llvm::simplify_type< SDValue >::getSimplifiedValue(), llvm::simplify_type< const SDValue >::getSimplifiedValue(), llvm::SelectionDAGBuilder::getValue(), llvm::SelectionDAGBuilder::getValueImpl(), getVShiftImm(), getVZextMovL(), HandleMergeInputChains(), hasNormalLoadOperand(), llvm::SDNode::hasPredecessorHelper(), llvm::SelectionDAG::InferPtrAlignment(), insertDAGNode(), InsertDAGNode(), isAddSubSExt(), isAddSubZExt(), isBSwapHWordElement(), llvm::ISD::isBuildVectorAllOnes(), llvm::ISD::isBuildVectorAllZeros(), isCalleeLoad(), IsChainDependent(), llvm::SelectionDAG::isConsecutiveLoad(), isConsecutiveLS(), llvm::X86TargetLowering::IsDesirableToPromoteOp(), isExtendedBUILD_VECTOR(), isFloatingPointZero(), llvm::TargetLowering::isGAPlusOffset(), isHorizontalBinOp(), isInt32Immediate(), isIntS16Immediate(), llvm::AArch64TargetLowering::isKnownShuffleVector(), llvm::SelectionDAGISel::IsLegalToFold(), isLoadIncOrDecStore(), isNaturalMemoryOperand(), isNodeChanged(), isOneUseSetCC(), isOpcWithIntImmediate(), IsPredicateKnownToFail(), isScalarLoadToVector(), isVEXTRACTIndex(), isVINSERTIndex(), isVSplat(), isX86LogicalCmp(), isZeroShuffle(), LowerADDC_ADDE_SUBC_SUBE(), LowerANY_EXTEND(), llvm::AArch64TargetLowering::LowerAsmOperandForConstraint(), llvm::ARMTargetLowering::LowerAsmOperandForConstraint(), llvm::PPCTargetLowering::LowerAsmOperandForConstraint(), llvm::X86TargetLowering::LowerAsmOperandForConstraint(), LowerATOMIC_STORE(), llvm::AArch64TargetLowering::LowerBR_CC(), llvm::AArch64TargetLowering::LowerBUILD_VECTOR(), llvm::HexagonTargetLowering::LowerCall(), llvm::NVPTXTargetLowering::LowerCall(), llvm::AArch64TargetLowering::LowerCall(), llvm::SystemZTargetLowering::LowerCall(), llvm::SparcTargetLowering::LowerCall_32(), llvm::SparcTargetLowering::LowerCall_64(), llvm::TargetLowering::LowerCallTo(), lowerCTPOP32BitElements(), lowerDSPIntr(), LowerEXTRACT_VECTOR_ELT_SSE4(), LowerF128Load(), LowerF128Store(), llvm::AArch64TargetLowering::LowerF128ToCall(), llvm::NVPTXTargetLowering::LowerFormalArguments(), LowerFSINCOS(), llvm::HexagonTargetLowering::LowerINLINEASM(), LowerINSERT_SUBVECTOR(), LowerINTRINSIC_W_CHAIN(), LowerINTRINSIC_WO_CHAIN(), LowerLOAD_SUB(), lowerMSABinaryBitImmIntr(), LowerMUL(), llvm::AMDGPUTargetLowering::LowerOperation(), llvm::XCoreTargetLowering::LowerOperation(), llvm::ARMTargetLowering::LowerOperation(), llvm::TargetLowering::LowerOperationWrapper(), llvm::HexagonTargetLowering::LowerReturn(), llvm::AArch64TargetLowering::LowerReturn(), llvm::SystemZTargetLowering::LowerReturn(), llvm::SparcTargetLowering::LowerReturn_32(), llvm::SparcTargetLowering::LowerReturn_64(), LowerScalarImmediateShift(), LowerScalarVariableShift(), llvm::HexagonTargetLowering::LowerSELECT_CC(), llvm::AArch64TargetLowering::LowerSELECT_CC(), llvm::AArch64TargetLowering::LowerSETCC(), LowerShift(), llvm::MSP430TargetLowering::LowerShifts(), llvm::AMDGPUTargetLowering::LowerSTORE(), LowerVAARG(), llvm::AArch64TargetLowering::LowerVECTOR_SHUFFLE(), LowerVECTOR_SHUFFLE(), LowerVECTOR_SHUFFLE_256(), LowerVECTOR_SHUFFLEv16i8(), LowerVECTOR_SHUFFLEv32i8(), LowerVECTOR_SHUFFLEv8i16(), LowerVECTOR_SHUFFLEv8i8(), LowerVectorAllZeroTest(), LowerVectorBroadcast(), LowerVectorFP_TO_INT(), LowerVectorINT_TO_FP(), LowerVectorIntExtend(), LowerVectorSETCC(), LowerVSETCC(), LowerXALUO(), LowerZERO_EXTEND(), MayFoldIntoStore(), MayFoldLoad(), MoveBelowOrigChain(), NormalizeVectorShuffle(), llvm::SDNodeIterator::operator*(), PerformADDCombine(), PerformADDCombineWithOperands(), performANDCombine(), PerformANDCombine(), PerformAndCombine(), PerformARMBUILD_VECTORCombine(), PerformBUILD_VECTORCombine(), llvm::ARMTargetLowering::PerformCMOVCombine(), PerformCMOVCombine(), llvm::R600TargetLowering::PerformDAGCombine(), llvm::MipsSETargetLowering::PerformDAGCombine(), llvm::PPCTargetLowering::PerformDAGCombine(), PerformEXTRACT_VECTOR_ELTCombine(), PerformInsertEltCombine(), performIntegerAbsCombine(), performORCombine(), PerformORCombine(), PerformOrCombine(), PerformSELECTCombine(), PerformSETCCCombine(), PerformSExtCombine(), PerformShiftCombine(), performShiftToAllZeros(), PerformSHLCombine(), PerformShuffleCombine256(), PerformSIGN_EXTEND_INREGCombine(), PerformSINT_TO_FPCombine(), performSRACombine(), PerformSTORECombine(), PerformSUBCombine(), PerformVDIVCombine(), PerformVMOVDRRCombine(), PerformVMOVRRDCombine(), performXORCombine(), PerformXORCombine(), PerformXorCombine(), PerformZExtCombine(), PrepareCall(), llvm::SDNode::print(), printrWithDepthHelper(), llvm::ResourcePriorityQueue::rawRegPressureDelta(), llvm::SelectionDAG::ReplaceAllUsesOfValuesWith(), llvm::SelectionDAG::ReplaceAllUsesOfValueWith(), llvm::SelectionDAG::ReplaceAllUsesWith(), ReplaceINTRINSIC_W_CHAIN(), llvm::R600TargetLowering::ReplaceNodeResults(), llvm::ARMTargetLowering::ReplaceNodeResults(), llvm::X86TargetLowering::ReplaceNodeResults(), llvm::SelectionDAGBuilder::resolveDanglingDebugInfo(), llvm::DAGTypeLegalizer::run(), llvm::ResourcePriorityQueue::scheduledNode(), llvm::SelectionDAGISel::SelectCodeCommon(), selectMADD(), selectMSUB(), llvm::SelectionDAG::setRoot(), llvm::SelectionDAGBuilder::setUnusedArgValue(), llvm::SelectionDAGBuilder::setValue(), llvm::TargetLowering::TargetLoweringOpt::ShrinkDemandedConstant(), llvm::TargetLowering::TargetLoweringOpt::ShrinkDemandedOp(), llvm::TargetLowering::SimplifyDemandedBits(), llvm::TargetLowering::SimplifySetCC(), SkipExtensionForVMULL(), llvm::SelectionDAG::TransferDbgValues(), TranslateX86CC(), useDivRem(), useSinCos(), ValueHasExactlyOneBitSet(), WidenMaskArithmetic(), WillBeConstantPoolLoad(), and XFormVExtractWithShuffleIntoLoad().

unsigned llvm::SDValue::getNumOperands ( ) const

inline

Definition at line 846 of file SelectionDAGNodes.h.

References llvm::SDNode::getNumOperands().

Referenced by buildFromShuffleMostly(), CheckChildSame(), CheckChildType(), llvm::InstrEmitter::EmitDbgValue(), llvm::SelectionDAG::getNode(), isCalleeLoad(), isLoadIncOrDecStore(), LowerCONCAT_VECTORS(), LowerScalarImmediateShift(), LowerScalarVariableShift(), llvm::AArch64TargetLowering::LowerVECTOR_SHUFFLE(), LowerVECTOR_SHUFFLE(), MayFoldVectorLoad(), MoveBelowOrigChain(), partitionShuffleOfConcats(), PerformVECTOR_SHUFFLECombine(), reachesChainWithoutSideEffects(), llvm::SelectionDAGISel::SelectCodeCommon(), and llvm::TargetLowering::TargetLoweringOpt::ShrinkDemandedOp().

unsigned llvm::SDValue::getOpcode ( ) const

inline

Definition at line 840 of file SelectionDAGNodes.h.

References llvm::SDNode::getOpcode().

Referenced by AddCombineToVPADDL(), adjustForTestUnderMask(), adjustSubwordCmp(), llvm::ISD::allOperandsUndef(), buildFromShuffleMostly(), CanFoldXORWithAllOnes(), checkBoolTestSetCCCombine(), CMPEQCombine(), combineShlAddConstant(), CompactSwizzlableVector(), llvm::SelectionDAG::ComputeMaskedBits(), llvm::SparcTargetLowering::computeMaskedBitsForTargetNode(), llvm::AMDGPUTargetLowering::computeMaskedBitsForTargetNode(), llvm::ARMTargetLowering::computeMaskedBitsForTargetNode(), llvm::PPCTargetLowering::computeMaskedBitsForTargetNode(), llvm::X86TargetLowering::computeMaskedBitsForTargetNode(), llvm::TargetLowering::computeMaskedBitsForTargetNode(), llvm::SelectionDAG::ComputeNumSignBits(), llvm::X86TargetLowering::ComputeNumSignBitsForTargetNode(), llvm::TargetLowering::ComputeNumSignBitsForTargetNode(), llvm::SelectionDAGBuilder::CopyValueToVirtualRegister(), createFPCmp(), EltsFromConsecutiveLoads(), EmitCMP(), ExtractSubVector(), FindBaseOffset(), findEXTRHalf(), findMaskedBFI(), FoldMaskAndShiftToExtract(), FoldMaskAndShiftToScale(), FoldMaskedShiftToScaledMask(), llvm::PPC::get_VSPLTI_elt(), getARMIndexedAddressParts(), getAtomicLoadArithTargetConstant(), getBuildPairElt(), llvm::SelectionDAGBuilder::getControlRoot(), llvm::SelectionDAG::getIndexedLoad(), llvm::SelectionDAG::getIndexedStore(), llvm::SelectionDAG::getLoad(), getLSBForBFI(), getMemcpyLoadsAndStores(), getMemmoveLoadsAndStores(), getMemsetStores(), getMemsetValue(), getMGatherNode(), getMOVHighToLow(), GetNegatedExpression(), llvm::SelectionDAG::getNode(), getNumOfConsecutiveZeros(), getShuffleScalarElt(), getTruncatedArgReg(), llvm::SelectionDAG::getVectorShuffle(), getVShiftImm(), getVZextMovL(), InferPointerInfo(), InsertSubVector(), isADDADDMUL(), isAndOrOfSetCCs(), llvm::SelectionDAG::isBaseWithConstantOffset(), isBSwapHWordElement(), llvm::ISD::isBuildVectorAllOnes(), llvm::ISD::isBuildVectorAllZeros(), isCalleeLoad(), llvm::SelectionDAG::isConsecutiveLoad(), isConsecutiveLS(), llvm::BuildVectorSDNode::isConstantSplat(), llvm::X86TargetLowering::IsDesirableToPromoteOp(), isFloatingPointZero(), isHorizontalBinOp(), llvm::SelectionDAG::isKnownNeverZero(), llvm::AArch64TargetLowering::isKnownShuffleVector(), isLoadIncOrDecStore(), isMemSrcFromString(), isNegatibleForFree(), llvm::ISD::isScalarToVector(), isSetCCEquivalent(), isTruncWithZeroHighBitsInput(), isXor1OfSetCC(), isZeroShuffle(), llvm::XCoreTargetLowering::isZExtFree(), llvm::ARMTargetLowering::isZExtFree(), llvm::X86TargetLowering::isZExtFree(), LookThroughSetCC(), Lower256IntArith(), Lower256IntVSETCC(), LowerADDC_ADDE_SUBC_SUBE(), llvm::X86TargetLowering::LowerAsmOperandForConstraint(), llvm::TargetLowering::LowerAsmOperandForConstraint(), LowerAVXExtend(), llvm::AArch64TargetLowering::LowerBUILD_VECTOR(), LowerCONCAT_VECTORS(), lowerDSPIntr(), LowerF128Load(), LowerF128Store(), LowerFABS(), LowerFP_TO_INT(), lowerFP_TO_SINT_STORE(), LowerINT_TO_FP(), llvm::R600TargetLowering::LowerOperation(), llvm::MipsSETargetLowering::LowerOperation(), llvm::SparcTargetLowering::LowerOperation(), llvm::SITargetLowering::LowerOperation(), llvm::MSP430TargetLowering::LowerOperation(), llvm::NVPTXTargetLowering::LowerOperation(), llvm::AMDGPUTargetLowering::LowerOperation(), llvm::XCoreTargetLowering::LowerOperation(), llvm::HexagonTargetLowering::LowerOperation(), llvm::MipsTargetLowering::LowerOperation(), llvm::SystemZTargetLowering::LowerOperation(), llvm::ARMTargetLowering::LowerOperation(), llvm::AArch64TargetLowering::LowerOperation(), llvm::PPCTargetLowering::LowerOperation(), llvm::X86TargetLowering::LowerOperation(), LowerScalarImmediateShift(), LowerScalarVariableShift(), llvm::MSP430TargetLowering::LowerSETCC(), LowerShift(), llvm::MSP430TargetLowering::LowerShifts(), llvm::AArch64TargetLowering::LowerVECTOR_SHUFFLE(), LowerVECTOR_SHUFFLE(), LowerVECTOR_SHUFFLEv16i8(), LowerVECTOR_SHUFFLEv32i8(), LowerVECTOR_SHUFFLEv8i16(), LowerVectorAllZeroTest(), LowerVectorBroadcast(), LowerVectorFP_TO_INT(), LowerVectorINT_TO_FP(), LowerVectorIntExtend(), LowerVectorSETCC(), LowerVSETCC(), LowerXALUO(), MatchingStackOffset(), MatchRotateHalf(), MayFoldVectorLoad(), MoveBelowOrigChain(), OptimizeConditionalInDecrement(), performADDCombine(), performANDCombine(), PerformANDCombine(), PerformAndCombine(), PerformARMBUILD_VECTORCombine(), PerformBFICombine(), llvm::ARMTargetLowering::PerformCMOVCombine(), PerformCMOVCombine(), llvm::R600TargetLowering::PerformDAGCombine(), llvm::SITargetLowering::PerformDAGCombine(), llvm::PPCTargetLowering::PerformDAGCombine(), PerformExtendCombine(), PerformFMACombine(), performIntegerAbsCombine(), PerformISDSETCCCombine(), performORCombine(), PerformORCombine(), PerformOrCombine(), performSELECTCombine(), PerformSELECTCombine(), PerformShiftCombine(), PerformSHLCombine(), PerformShuffleCombine256(), PerformSIGN_EXTEND_INREGCombine(), PerformSINT_TO_FPCombine(), PerformSRACombine(), PerformSubCombine(), PerformVCVTCombine(), PerformVDIVCombine(), PerformVDUPLANECombine(), PerformVECTOR_SHUFFLECombine(), PerformVMOVDRRCombine(), PerformVMOVRRDCombine(), PerformVMULCombine(), performVSELECTCombine(), PerformVZEXT_MOVLCombine(), performVZEXTCombine(), PerformXorCombine(), PerformZExtCombine(), reachesChainWithoutSideEffects(), ReorganizeVector(), llvm::PPCTargetLowering::SelectAddressRegImm(), llvm::PPCTargetLowering::SelectAddressRegReg(), llvm::PPCTargetLowering::SelectAddressRegRegOnly(), llvm::SelectionDAGISel::SelectCodeCommon(), selectMADD(), selectMSUB(), llvm::TargetLowering::TargetLoweringOpt::ShrinkDemandedConstant(), llvm::TargetLowering::TargetLoweringOpt::ShrinkDemandedOp(), llvm::TargetLowering::SimplifyDemandedBits(), llvm::TargetLowering::SimplifySetCC(), tryCombineToBFI(), tryCombineToLargerBFI(), ValueHasExactlyOneBitSet(), WidenMaskArithmetic(), and XFormVExtractWithShuffleIntoLoad().

const SDValue & llvm::SDValue::getOperand ( unsigned  i ) const

inline

Definition at line 849 of file SelectionDAGNodes.h.

References llvm::SDNode::getOperand().

Referenced by adjustForTestUnderMask(), llvm::X86TargetLowering::BuildFILD(), buildFromShuffleMostly(), CanFoldXORWithAllOnes(), CheckAndImm(), checkBoolTestSetCCCombine(), CheckChildSame(), CheckChildType(), CheckOrImm(), combineShlAddConstant(), CompactSwizzlableVector(), llvm::SelectionDAG::ComputeMaskedBits(), llvm::SparcTargetLowering::computeMaskedBitsForTargetNode(), llvm::AMDGPUTargetLowering::computeMaskedBitsForTargetNode(), llvm::ARMTargetLowering::computeMaskedBitsForTargetNode(), llvm::PPCTargetLowering::computeMaskedBitsForTargetNode(), llvm::X86TargetLowering::computeMaskedBitsForTargetNode(), llvm::SelectionDAG::ComputeNumSignBits(), llvm::SelectionDAGBuilder::CopyValueToVirtualRegister(), createCMovFP(), createFPCmp(), FindBaseOffset(), findEXTRHalf(), findMaskedBFI(), FoldMaskAndShiftToExtract(), FoldMaskAndShiftToScale(), FoldMaskedShiftToScaledMask(), FoldOperand(), getAltivecCompareInfo(), getAtomicLoadArithTargetConstant(), getBuildPairElt(), getLSBForBFI(), getMOVHighToLow(), getMOVLowToHigh(), getMOVLP(), GetNegatedExpression(), llvm::SelectionDAG::getNode(), getShuffleScalarElt(), getTruncatedArgReg(), getVShiftImm(), getVZextMovL(), InferPointerInfo(), llvm::SelectionDAG::InferPtrAlignment(), isADDADDMUL(), isAndOrOfSetCCs(), llvm::SelectionDAG::isBaseWithConstantOffset(), isBSwapHWordElement(), isCalleeLoad(), llvm::SelectionDAG::isConsecutiveLoad(), isConsecutiveLS(), isConstVecPow2(), llvm::X86TargetLowering::IsDesirableToPromoteOp(), isFloatingPointZero(), isHorizontalBinOp(), llvm::SelectionDAG::isKnownNeverZero(), llvm::AArch64TargetLowering::isKnownShuffleVector(), isLoadIncOrDecStore(), isMemSrcFromString(), isNegatibleForFree(), isSetCCEquivalent(), isSimpleShift(), isTruncWithZeroHighBitsInput(), isXor1OfSetCC(), isZeroShuffle(), LookThroughSetCC(), Lower256IntArith(), Lower256IntVSETCC(), LowerADDC_ADDE_SUBC_SUBE(), LowerADJUST_TRAMPOLINE(), llvm::X86TargetLowering::LowerAsmOperandForConstraint(), llvm::TargetLowering::LowerAsmOperandForConstraint(), LowerAsSplatVectorLoad(), llvm::HexagonTargetLowering::LowerATOMIC_FENCE(), LowerATOMIC_FENCE(), LowerAVXCONCAT_VECTORS(), LowerBITCAST(), llvm::MSP430TargetLowering::LowerBR_CC(), llvm::AArch64TargetLowering::LowerBR_CC(), LowerBR_CC(), llvm::HexagonTargetLowering::LowerBR_JT(), llvm::AArch64TargetLowering::LowerBRCOND(), llvm::AArch64TargetLowering::LowerBUILD_VECTOR(), LowerBuildVectorv16i8(), LowerBuildVectorv8i16(), llvm::SparcTargetLowering::LowerCall_64(), LowerCMP_SWAP(), LowerCONCAT_VECTORS(), LowerCTLZ(), LowerCTLZ_ZERO_UNDEF(), LowerCTTZ(), llvm::HexagonTargetLowering::LowerDYNAMIC_STACKALLOC(), LowerDYNAMIC_STACKALLOC(), llvm::HexagonTargetLowering::LowerEH_RETURN(), LowerEXTRACT_SUBVECTOR(), LowerEXTRACT_VECTOR_ELT(), LowerEXTRACT_VECTOR_ELT_SSE4(), LowerF128_FPEXTEND(), LowerF128_FPROUND(), llvm::SparcTargetLowering::LowerF128Op(), llvm::AArch64TargetLowering::LowerF128ToCall(), LowerF64Op(), LowerFABS(), lowerFABS32(), lowerFABS64(), lowerFCOPYSIGN32(), lowerFCOPYSIGN64(), LowerFGETSIGN(), llvm::AArch64TargetLowering::LowerFP_EXTEND(), LowerFP_EXTEND(), llvm::AArch64TargetLowering::LowerFP_ROUND(), llvm::AArch64TargetLowering::LowerFP_TO_INT(), LowerFP_TO_INT(), LowerFP_TO_SINT(), lowerFP_TO_SINT_STORE(), LowerFP_TO_UINT(), llvm::MSP430TargetLowering::LowerFRAMEADDR(), llvm::HexagonTargetLowering::LowerFRAMEADDR(), llvm::AArch64TargetLowering::LowerFRAMEADDR(), LowerFSINCOS(), LowerINSERT_VECTOR_ELT(), LowerINSERT_VECTOR_ELT_SSE4(), llvm::AArch64TargetLowering::LowerINT_TO_FP(), LowerINT_TO_FP(), LowerINTRINSIC_W_CHAIN(), LowerINTRINSIC_WO_CHAIN(), llvm::AMDGPUTargetLowering::LowerIntrinsicIABS(), llvm::AMDGPUTargetLowering::LowerIntrinsicLRP(), LowerIntVSETCC_AVX512(), llvm::AMDGPUTargetLowering::LowerMinMax(), LowerMUL(), llvm::R600TargetLowering::LowerOperation(), llvm::SITargetLowering::LowerOperation(), LowerPREFETCH(), LowerREADCYCLECOUNTER(), llvm::MSP430TargetLowering::LowerRETURNADDR(), llvm::HexagonTargetLowering::LowerRETURNADDR(), llvm::AArch64TargetLowering::LowerRETURNADDR(), LowerReverse_VECTOR_SHUFFLEv16i8_v8i16(), LowerSCALAR_TO_VECTOR(), LowerScalarImmediateShift(), LowerScalarVariableShift(), LowerSDIV(), llvm::AArch64TargetLowering::LowerSELECT(), llvm::MSP430TargetLowering::LowerSELECT_CC(), llvm::HexagonTargetLowering::LowerSELECT_CC(), llvm::AArch64TargetLowering::LowerSELECT_CC(), LowerSELECT_CC(), llvm::MSP430TargetLowering::LowerSETCC(), llvm::AArch64TargetLowering::LowerSETCC(), LowerShift(), llvm::MSP430TargetLowering::LowerSIGN_EXTEND(), LowerSINT_TO_FP(), LowerUDIV(), LowerUINT_TO_FP(), llvm::AArch64TargetLowering::LowerVACOPY(), LowerVACOPY(), llvm::MSP430TargetLowering::LowerVASTART(), llvm::HexagonTargetLowering::LowerVASTART(), llvm::AArch64TargetLowering::LowerVASTART(), LowerVASTART(), llvm::AArch64TargetLowering::LowerVECTOR_SHUFFLE(), LowerVECTOR_SHUFFLE(), LowerVECTOR_SHUFFLEv8i16(), LowerVECTOR_SHUFFLEv8i8(), LowerVectorBroadcast(), LowerVectorFP_TO_INT(), LowerVectorINT_TO_FP(), LowerVectorIntExtend(), LowerVectorSETCC(), LowerVSETCC(), LowerZERO_EXTEND(), MatchingStackOffset(), matchIntegerMINMAX(), MatchRotateHalf(), MayFoldVectorLoad(), MoveBelowOrigChain(), NormalizeVectorShuffle(), OptimizeConditionalInDecrement(), partitionShuffleOfConcats(), performADDCombine(), performANDCombine(), PerformANDCombine(), PerformAndCombine(), PerformARMBUILD_VECTORCombine(), PerformBFICombine(), llvm::ARMTargetLowering::PerformCMOVCombine(), PerformCMOVCombine(), llvm::R600TargetLowering::PerformDAGCombine(), llvm::SITargetLowering::PerformDAGCombine(), llvm::PPCTargetLowering::PerformDAGCombine(), PerformExtendCombine(), PerformFMACombine(), performIntegerAbsCombine(), PerformISDSETCCCombine(), performORCombine(), PerformORCombine(), PerformOrCombine(), performSELECTCombine(), PerformSELECTCombine(), PerformShiftCombine(), PerformSHLCombine(), PerformShuffleCombine256(), PerformSIGN_EXTEND_INREGCombine(), PerformSRACombine(), PerformSTORECombine(), PerformSubCombine(), PerformVDIVCombine(), PerformVDUPLANECombine(), PerformVECTOR_SHUFFLECombine(), PerformVMOVDRRCombine(), PerformVMOVRRDCombine(), performVSELECTCombine(), PerformVZEXT_MOVLCombine(), performVZEXTCombine(), PerformXorCombine(), PerformZExtCombine(), reachesChainWithoutSideEffects(), ReorganizeVector(), llvm::PPCTargetLowering::SelectAddressRegImm(), llvm::PPCTargetLowering::SelectAddressRegReg(), llvm::PPCTargetLowering::SelectAddressRegRegOnly(), llvm::SelectionDAGISel::SelectCodeCommon(), llvm::TargetLowering::TargetLoweringOpt::ShrinkDemandedConstant(), llvm::TargetLowering::SimplifyDemandedBits(), llvm::TargetLowering::SimplifySetCC(), tryCombineToBFI(), tryCombineToLargerBFI(), llvm::SelectionDAGBuilder::visitSPDescriptorParent(), and XFormVExtractWithShuffleIntoLoad().

unsigned llvm::SDValue::getResNo ( ) const

inline

get the index which selects a specific result in the SDNode

Definition at line 102 of file SelectionDAGNodes.h.

Referenced by llvm::DOTGraphTraits< SelectionDAG * >::addCustomGraphFeatures(), checkBoolTestSetCCCombine(), CheckForPhysRegDependency(), CombineBaseUpdate(), CombineVLDDUP(), llvm::SelectionDAG::ComputeMaskedBits(), llvm::ARMTargetLowering::computeMaskedBitsForTargetNode(), llvm::X86TargetLowering::computeMaskedBitsForTargetNode(), llvm::SelectionDAG::ComputeNumSignBits(), llvm::ScheduleDAGSDNodes::computeOperandLatency(), DumpNodesr(), ExtendUsesToFormExtLoad(), getBuildPairElt(), llvm::DenseMapInfo< SDValue >::getHashValue(), llvm::SDUse::getResNo(), isLoadIncOrDecStore(), isX86LogicalCmp(), PerformEXTRACT_VECTOR_ELTCombine(), PerformVMOVDRRCombine(), llvm::ResourcePriorityQueue::rawRegPressureDelta(), llvm::SelectionDAG::ReplaceAllUsesOfValuesWith(), llvm::SelectionDAG::ReplaceAllUsesOfValueWith(), llvm::SelectionDAG::ReplaceAllUsesWith(), llvm::SelectionDAGBuilder::resolveDanglingDebugInfo(), llvm::ResourcePriorityQueue::scheduledNode(), selectMADD(), selectMSUB(), and llvm::SelectionDAG::TransferDbgValues().

MVT llvm::SDValue::getSimpleValueType ( ) const

inline

Return the simple ValueType of the referenced return value.

Definition at line 134 of file SelectionDAGNodes.h.

References llvm::EVT::getSimpleVT(), and getValueType().

Referenced by buildFromShuffleMostly(), ExtractBitFromMaskVector(), FoldMaskAndShiftToExtract(), FoldMaskAndShiftToScale(), FoldMaskedShiftToScaledMask(), getExtractVEXTRACTImmediate(), getLegalSplat(), getMOVDDup(), getMOVHighToLow(), getMOVLowToHigh(), getMOVLP(), llvm::SelectionDAG::getNode(), getShuffleScalarElt(), getShuffleVectorZeroOrUndef(), isHorizontalBinOp(), Lower256IntVSETCC(), LowerAVXCONCAT_VECTORS(), LowerAVXExtend(), LowerBITCAST(), LowerEXTRACT_SUBVECTOR(), LowerEXTRACT_VECTOR_ELT_SSE4(), LowerFGETSIGN(), LowerFP_EXTEND(), LowerINSERT_VECTOR_ELT_SSE4(), LowerIntVSETCC_AVX512(), LowerSCALAR_TO_VECTOR(), LowerSIGN_EXTEND(), LowerSIGN_EXTEND_AVX512(), LowerVectorBroadcast(), LowerVectorIntExtend(), LowerVSETCC(), LowerZERO_EXTEND(), NormalizeVectorShuffle(), llvm::R600TargetLowering::PerformDAGCombine(), PerformVCVTCombine(), PerformVDIVCombine(), PromoteSplati8i16(), and llvm::TargetLowering::SimplifySetCC().

SDValue llvm::SDValue::getValue ( unsigned  R ) const

inline

Definition at line 122 of file SelectionDAGNodes.h.

References SDValue().

Referenced by llvm::X86TargetLowering::BuildFILD(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForMemchr(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForMemcmp(), llvm::X86SelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::ARMSelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::X86SelectionDAGInfo::EmitTargetCodeForMemset(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForStrcmp(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForStrcpy(), Expand64BitShift(), ExpandBITCAST(), ExpandUnalignedLoad(), ExpandUnalignedStore(), getBoundedStrlen(), getMemCmpLoad(), getMemmoveLoadsAndStores(), llvm::MipsTargetLowering::getOpndList(), GetTLSADDR(), isCalleeLoad(), isLoadIncOrDecStore(), LowerADDC_ADDE_SUBC_SUBE(), LowerATOMIC_STORE(), llvm::HexagonTargetLowering::LowerCall(), llvm::NVPTXTargetLowering::LowerCall(), llvm::AArch64TargetLowering::LowerCall(), llvm::SystemZTargetLowering::LowerCall(), llvm::SparcTargetLowering::LowerCall_32(), llvm::SparcTargetLowering::LowerCall_64(), llvm::HexagonTargetLowering::LowerCallResult(), llvm::AArch64TargetLowering::LowerCallResult(), llvm::SelectionDAGBuilder::LowerCallTo(), LowerCMP_SWAP(), LowerCTLZ(), LowerCTTZ(), LowerDYNAMIC_STACKALLOC(), llvm::SystemZTargetLowering::LowerFormalArguments(), llvm::SparcTargetLowering::LowerGlobalTLSAddress(), llvm::MipsTargetLowering::lowerLOAD(), llvm::MipsTargetLowering::LowerOperationWrapper(), LowerREADCYCLECOUNTER(), llvm::HexagonTargetLowering::LowerReturn(), llvm::AArch64TargetLowering::LowerReturn(), llvm::SystemZTargetLowering::LowerReturn(), llvm::SparcTargetLowering::LowerReturn_32(), llvm::SparcTargetLowering::LowerReturn_64(), llvm::AArch64TargetLowering::LowerTLSDescCall(), LowerToTLSGeneralDynamicModel32(), LowerToTLSLocalDynamicModel(), LowerVAARG(), llvm::PPCTargetLowering::PerformDAGCombine(), performDivRemCombine(), PerformLOADCombine(), PerformSINT_TO_FPCombine(), PerformSTORECombine(), PerformVMOVRRDCombine(), PrepareCall(), PrepareTailCall(), ReplaceATOMIC_BINARY_64(), ReplaceATOMIC_LOAD(), ReplaceATOMIC_OP_64(), ReplaceINTRINSIC_W_CHAIN(), ReplaceLoadVector(), llvm::PPCTargetLowering::ReplaceNodeResults(), llvm::X86TargetLowering::ReplaceNodeResults(), ReplaceREADCYCLECOUNTER(), llvm::AArch64TargetLowering::SaveVarArgRegisters(), llvm::SelectionDAGISel::SelectCodeCommon(), and llvm::SelectionDAGBuilder::visitJumpTable().

unsigned llvm::SDValue::getValueSizeInBits ( ) const

inline

getValueSizeInBits - Returns the size of the value in bits.

Definition at line 140 of file SelectionDAGNodes.h.

References llvm::EVT::getSizeInBits(), and getValueType().

Referenced by llvm::SelectionDAGISel::CheckAndMask(), CheckForMaskedLoad(), llvm::SelectionDAGISel::CheckOrMask(), isTruncateOf(), isTruncWithZeroHighBitsInput(), lowerFCOPYSIGN64(), lowerFP_TO_SINT_STORE(), PerformBTCombine(), ShrinkLoadReplaceStoreWithStore(), llvm::TargetLowering::SimplifySetCC(), and VerifyNodeCommon().

EVT llvm::SDValue::getValueType ( ) const

inline

getValueType - Return the ValueType of the referenced return value.

Definition at line 843 of file SelectionDAGNodes.h.

References llvm::SDNode::getValueType().

Referenced by AddCombineTo64bitMLAL(), adjustForTestUnderMask(), adjustSubwordCmp(), adjustZeroCmp(), llvm::TargetLowering::BuildExactSDIV(), llvm::X86TargetLowering::BuildFILD(), buildFromShuffleMostly(), BuildIntrinsicOp(), llvm::TargetLowering::BuildSDIV(), llvm::TargetLowering::BuildUDIV(), CalculateTailCallArgDest(), canChangeToInt(), CheckForMaskedLoad(), CheckType(), CMPEQCombine(), CombineBaseUpdate(), combineShlAddConstant(), CompactSwizzlableVector(), llvm::SelectionDAG::ComputeMaskedBits(), llvm::SelectionDAG::ComputeNumSignBits(), llvm::X86TargetLowering::ComputeNumSignBitsForTargetNode(), countOperands(), createCMovFP(), createFPCmp(), createLoadLR(), createStoreLR(), emitCLC(), EmitCMP(), emitCmp(), emitMemMem(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForMemchr(), llvm::X86SelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::X86SelectionDAGInfo::EmitTargetCodeForMemset(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForMemset(), llvm::ARMSelectionDAGInfo::EmitTargetCodeForMemset(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForStrcmp(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForStrcpy(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForStrlen(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForStrnlen(), ExpandBITCAST(), expandExp(), expandExp2(), expandf64Toi32(), expandLog(), expandLog10(), expandLog2(), expandPow(), ExpandPowI(), ExpandUnalignedLoad(), ExpandUnalignedStore(), ExtendUsesToFormExtLoad(), Extract128BitVector(), Extract256BitVector(), ExtractSubVector(), FindCallSeqStart(), findMaskedBFI(), findNonImmUse(), FoldMaskAndShiftToScale(), llvm::SelectionDAG::FoldSetCC(), GeneratePerfectShuffle(), llvm::SelectionDAG::getAnyExtOrTrunc(), llvm::SelectionDAG::getAtomic(), getBoundedStrlen(), getCopyFromParts(), getCopyFromPartsVector(), getCopyToParts(), getCopyToPartsVector(), llvm::SelectionDAG::getCopyToReg(), llvm::DOTGraphTraits< SelectionDAG * >::getEdgeAttributes(), llvm::SelectionDAG::getExtLoad(), getGatherNode(), llvm::SelectionDAG::getIndexedLoad(), llvm::SelectionDAG::getIndexedStore(), getInputChainForNode(), llvm::SelectionDAG::getLoad(), getMemBasePlusOffset(), llvm::SelectionDAG::getMemset(), getMemsetStores(), llvm::SelectionDAG::getMergeValues(), getMGatherNode(), getMScatterNode(), GetNegatedExpression(), llvm::SelectionDAG::getNode(), getScatterNode(), llvm::SelectionDAG::getSelect(), llvm::SelectionDAG::getSelectCC(), llvm::SelectionDAG::getSetCC(), llvm::SelectionDAG::getSExtOrTrunc(), llvm::SelectionDAG::getShiftAmountOperand(), getShuffleScalarElt(), getSimpleValueType(), llvm::SelectionDAG::getStore(), getTargetVShiftNode(), llvm::SelectionDAG::getTruncStore(), getValueSizeInBits(), llvm::SDUse::getValueType(), llvm::SelectionDAG::getVectorShuffle(), getVShift(), getVZextMovL(), llvm::SelectionDAG::getZeroExtendInReg(), llvm::SelectionDAG::getZExtOrTrunc(), HandleMergeInputChains(), Insert128BitVector(), Insert256BitVector(), InsertSubVector(), IsChainDependent(), isConditionalZeroOrAllOnes(), isConstVecPow2(), llvm::X86TargetLowering::IsDesirableToPromoteOp(), llvm::AArch64TargetLowering::isKnownShuffleVector(), isNegatibleForFree(), isSimpleShift(), isTruncateOf(), llvm::XCoreTargetLowering::isZExtFree(), llvm::MSP430TargetLowering::isZExtFree(), llvm::ARMTargetLowering::isZExtFree(), llvm::X86TargetLowering::isZExtFree(), llvm::TargetLoweringBase::isZExtFree(), Lower256IntArith(), LowerADD(), LowerADDC_ADDE_SUBC_SUBE(), llvm::SystemZTargetLowering::LowerAsmOperandForConstraint(), llvm::AArch64TargetLowering::LowerAsmOperandForConstraint(), llvm::ARMTargetLowering::LowerAsmOperandForConstraint(), llvm::PPCTargetLowering::LowerAsmOperandForConstraint(), llvm::X86TargetLowering::LowerAsmOperandForConstraint(), llvm::TargetLowering::LowerAsmOperandForConstraint(), LowerAsSplatVectorLoad(), llvm::MSP430TargetLowering::LowerBR_CC(), llvm::AArch64TargetLowering::LowerBR_CC(), LowerBR_CC(), llvm::AArch64TargetLowering::LowerBRCOND(), llvm::AArch64TargetLowering::LowerBUILD_VECTOR(), llvm::HexagonTargetLowering::LowerCall(), llvm::SystemZTargetLowering::LowerCall(), llvm::TargetLowering::LowerCallTo(), LowerCMP_SWAP(), LowerCONCAT_VECTORS(), llvm::HexagonTargetLowering::LowerConstantPool(), LowerConstantPool(), LowerCTLZ(), LowerCTLZ_ZERO_UNDEF(), LowerCTTZ(), lowerDSPIntr(), LowerEXTRACT_VECTOR_ELT(), LowerF128_FPEXTEND(), LowerF128_FPROUND(), llvm::SparcTargetLowering::LowerF128_LibCallArg(), llvm::SparcTargetLowering::LowerF128Compare(), LowerF128Load(), llvm::SparcTargetLowering::LowerF128Op(), LowerF128Store(), llvm::AArch64TargetLowering::LowerF128ToCall(), LowerF64Op(), LowerFABS(), lowerFABS32(), lowerFCOPYSIGN32(), lowerFCOPYSIGN64(), LowerFNEG(), llvm::AArch64TargetLowering::LowerFP_EXTEND(), llvm::AArch64TargetLowering::LowerFP_ROUND(), llvm::AArch64TargetLowering::LowerFP_TO_INT(), LowerFP_TO_INT(), LowerFP_TO_SINT(), LowerFP_TO_UINT(), llvm::MSP430TargetLowering::LowerFRAMEADDR(), llvm::HexagonTargetLowering::LowerFRAMEADDR(), llvm::AArch64TargetLowering::LowerFRAMEADDR(), LowerFRAMEADDR(), LowerFSINCOS(), llvm::HexagonTargetLowering::LowerINLINEASM(), LowerINSERT_VECTOR_ELT_SSE4(), llvm::AArch64TargetLowering::LowerINT_TO_FP(), LowerINT_TO_FP(), LowerINTRINSIC_W_CHAIN(), LowerINTRINSIC_WO_CHAIN(), llvm::AMDGPUTargetLowering::LowerIntrinsicIABS(), llvm::AMDGPUTargetLowering::LowerIntrinsicLRP(), LowerIntVSETCC_AVX512(), LowerLabelRef(), llvm::MipsTargetLowering::lowerLOAD(), llvm::AMDGPUTargetLowering::LowerMinMax(), LowerMUL(), llvm::R600TargetLowering::LowerOperation(), llvm::SITargetLowering::LowerOperation(), llvm::NVPTXTargetLowering::LowerReturn(), llvm::HexagonTargetLowering::LowerRETURNADDR(), llvm::AArch64TargetLowering::LowerRETURNADDR(), LowerRETURNADDR(), LowerReverse_VECTOR_SHUFFLEv16i8_v8i16(), LowerSCALAR_TO_VECTOR(), LowerScalarImmediateShift(), LowerScalarVariableShift(), LowerSDIV(), llvm::AArch64TargetLowering::LowerSELECT(), llvm::MSP430TargetLowering::LowerSELECT_CC(), llvm::AArch64TargetLowering::LowerSELECT_CC(), LowerSELECT_CC(), llvm::MSP430TargetLowering::LowerSETCC(), llvm::AArch64TargetLowering::LowerSETCC(), LowerShift(), llvm::MSP430TargetLowering::LowerShifts(), llvm::MSP430TargetLowering::LowerSIGN_EXTEND(), LowerSINT_TO_FP(), llvm::AMDGPUTargetLowering::LowerSTORE(), LowerSUB(), LowerUDIV(), LowerUINT_TO_FP(), lowerUnalignedIntStore(), LowerVAARG(), llvm::AArch64TargetLowering::LowerVECTOR_SHUFFLE(), LowerVECTOR_SHUFFLE(), LowerVECTOR_SHUFFLEv16i8(), LowerVectorAllZeroTest(), LowerVectorBroadcast(), LowerVectorFP_TO_INT(), LowerVectorINT_TO_FP(), LowerVectorSETCC(), LowerVSETCC(), LowerZERO_EXTEND_AVX512(), llvm::SparcTargetLowering::makeHiLoPair(), llvm::TargetLowering::makeLibCall(), MatchingStackOffset(), OptimizeConditionalInDecrement(), partitionShuffleOfConcats(), PerformAndCombine(), PerformARMBUILD_VECTORCombine(), PerformCMOVCombine(), llvm::R600TargetLowering::PerformDAGCombine(), llvm::SITargetLowering::PerformDAGCombine(), llvm::PPCTargetLowering::PerformDAGCombine(), PerformExtendCombine(), PerformEXTRACT_VECTOR_ELTCombine(), PerformIntrinsicCombine(), PerformISDSETCCCombine(), PerformLOADCombine(), PerformOrCombine(), performSELECTCombine(), PerformSELECTCombine(), PerformSHLCombine(), PerformSIGN_EXTEND_INREGCombine(), PerformSTORECombine(), PerformSubCombine(), PerformVCVTCombine(), PerformVDIVCombine(), PerformVDUPLANECombine(), PerformVECTOR_SHUFFLECombine(), PerformVZEXT_MOVLCombine(), PrepareCall(), printrWithDepthHelper(), ReorganizeVector(), llvm::SparcTargetLowering::ReplaceNodeResults(), llvm::PPCTargetLowering::ReplaceNodeResults(), llvm::X86TargetLowering::ReplaceNodeResults(), llvm::DAGTypeLegalizer::run(), llvm::PPCTargetLowering::SelectAddressRegImm(), llvm::PPCTargetLowering::SelectAddressRegRegOnly(), llvm::SelectionDAGISel::SelectCodeCommon(), llvm::SelectionDAG::setRoot(), shouldSwapCmpOperands(), llvm::TargetLowering::TargetLoweringOpt::ShrinkDemandedConstant(), llvm::TargetLowering::TargetLoweringOpt::ShrinkDemandedOp(), ShrinkLoadReplaceStoreWithStore(), llvm::SelectionDAG::SignBitIsZero(), llvm::TargetLowering::SimplifyDemandedBits(), llvm::TargetLowering::SimplifySetCC(), llvm::TargetLowering::softenSetCCOperands(), llvm::SelectionDAG::SplitVector(), llvm::AMDGPUTargetLowering::SplitVectorLoad(), llvm::AMDGPUTargetLowering::SplitVectorStore(), TranslateX86CC(), tryCombineToLargerBFI(), llvm::SelectionDAG::UnrollVectorOp(), ValueHasExactlyOneBitSet(), VerifyNodeCommon(), llvm::SelectionDAGBuilder::visitBitTestHeader(), llvm::SelectionDAGBuilder::visitJumpTableHeader(), llvm::SelectionDAGBuilder::visitSPDescriptorParent(), llvm::SelectionDAGBuilder::visitSwitchCase(), llvm::SparcTargetLowering::withTargetFlags(), and XFormVExtractWithShuffleIntoLoad().

bool llvm::SDValue::hasOneUse ( ) const

inline

hasOneUse - Return true if there is exactly one node using value ResNo of Node.

Definition at line 870 of file SelectionDAGNodes.h.

References llvm::SDNode::hasNUsesOfValue().

Referenced by adjustSubwordCmp(), FoldMaskAndShiftToExtract(), FoldMaskAndShiftToScale(), FoldMaskedShiftToScaledMask(), getAtomicLoadArithTargetConstant(), GetNegatedExpression(), isADDADDMUL(), isAndOrOfSetCCs(), isCalleeLoad(), isLoadIncOrDecStore(), isNegatibleForFree(), llvm::SelectionDAGISel::IsProfitableToFold(), isXor1OfSetCC(), LowerEXTRACT_VECTOR_ELT_SSE4(), llvm::MSP430TargetLowering::LowerSETCC(), LowerVectorBroadcast(), LowerVectorIntExtend(), MayFoldIntoStore(), MayFoldLoad(), MayFoldVectorLoad(), OptimizeConditionalInDecrement(), PerformBTCombine(), llvm::PPCTargetLowering::PerformDAGCombine(), PerformEXTRACT_VECTOR_ELTCombine(), PerformISDSETCCCombine(), PerformORCombine(), PerformOrCombine(), PerformSINT_TO_FPCombine(), PerformSTORECombine(), PerformZExtCombine(), selectMADD(), selectMSUB(), shouldSwapCmpOperands(), llvm::TargetLowering::SimplifyDemandedBits(), llvm::TargetLowering::SimplifySetCC(), and XFormVExtractWithShuffleIntoLoad().

bool llvm::SDValue::isMachineOpcode ( ) const

inline

Definition at line 861 of file SelectionDAGNodes.h.

References llvm::SDNode::isMachineOpcode().

Referenced by FoldOperand().

bool SDValue::isOperandOf

(

SDNode *

N

)

const

isOperand - Return true if this node is an operand of N.

Definition at line 6166 of file SelectionDAG.cpp.

References llvm::SDNode::getNumOperands(), and llvm::SDNode::getOperand().

Referenced by isCalleeLoad().

bool llvm::SDValue::isTargetMemoryOpcode ( ) const

inline

Definition at line 858 of file SelectionDAGNodes.h.

References llvm::SDNode::isTargetMemoryOpcode().

bool llvm::SDValue::isTargetOpcode ( ) const

inline

Definition at line 855 of file SelectionDAGNodes.h.

References llvm::SDNode::isTargetOpcode().

bool llvm::SDValue::operator!= ( const SDValue &  O ) const

inline

Definition at line 115 of file SelectionDAGNodes.h.

References operator==().

SDNode* llvm::SDValue::operator-> ( ) const

inline

Definition at line 110 of file SelectionDAGNodes.h.

bool llvm::SDValue::operator< ( const SDValue &  O ) const

inline

Definition at line 118 of file SelectionDAGNodes.h.

bool llvm::SDValue::operator== ( const SDValue &  O ) const

inline

Definition at line 112 of file SelectionDAGNodes.h.

Referenced by operator!=().

bool SDValue::reachesChainWithoutSideEffects	(	SDValue	Dest,
		unsigned	Depth = 2
	)		const

reachesChainWithoutSideEffects - Return true if this operand (which must be a chain) reaches the specified operand without crossing any side-effecting instructions. In practice, this looks through token factors and non-volatile loads. In order to remain efficient, this only looks a couple of nodes in, it does not do an exhaustive search.

reachesChainWithoutSideEffects - Return true if this operand (which must be a chain) reaches the specified operand without crossing any side-effecting instructions on any chain path. In practice, this looks through token factors and non-volatile loads. In order to remain efficient, this only looks a couple of nodes in, it does not do an exhaustive search.

Definition at line 6185 of file SelectionDAG.cpp.

References getNumOperands(), getOpcode(), getOperand(), and llvm::ISD::TokenFactor.

void llvm::SDValue::setNode ( SDNode *  N )

inline

set the SDNode

Definition at line 108 of file SelectionDAGNodes.h.

References N.

Referenced by PrepareCall().

bool llvm::SDValue::use_empty ( ) const

inline

use_empty - Return true if there are no nodes using value ResNo of Node.

Definition at line 867 of file SelectionDAGNodes.h.

References llvm::SDNode::hasAnyUseOfValue().

Referenced by PerformADCCombine(), PerformCMOVCombine(), selectMADD(), and selectMSUB().

---

The documentation for this class was generated from the following files:

• SelectionDAGNodes.h
• SelectionDAG.cpp