27 #define GET_INSTRINFO_MC_DESC
28 #include "AMDGPUGenInstrInfo.inc"
30 #define GET_SUBTARGETINFO_MC_DESC
31 #include "AMDGPUGenSubtargetInfo.inc"
33 #define GET_REGINFO_MC_DESC
34 #include "AMDGPUGenRegisterInfo.inc"
40 InitAMDGPUMCInstrInfo(X);
46 InitAMDGPUMCRegisterInfo(X, 0);
53 InitAMDGPUMCSubtargetInfo(X, TT, CPU, FS);
66 unsigned SyntaxVariant,
MCCodeEmitter * createR600MCCodeEmitter(const MCInstrInfo &MCII, const MCRegisterInfo &MRI, const MCSubtargetInfo &STI)
static MCStreamer * createMCStreamer(const Target &T, StringRef TT, MCContext &Ctx, MCAsmBackend &MAB, raw_ostream &_OS, MCCodeEmitter *_Emitter, bool RelaxAll, bool NoExecStack)
static MCInstrInfo * createAMDGPUMCInstrInfo()
static void RegisterMCInstPrinter(Target &T, Target::MCInstPrinterCtorTy Fn)
MCStreamer * createELFStreamer(MCContext &Ctx, MCTargetStreamer *TargetStreamer, MCAsmBackend &TAB, raw_ostream &OS, MCCodeEmitter *CE, bool RelaxAll, bool NoExecStack)
Target TheAMDGPUTarget
The target for the AMDGPU backend.
static MCInstPrinter * createAMDGPUMCInstPrinter(const Target &T, unsigned SyntaxVariant, const MCAsmInfo &MAI, const MCInstrInfo &MII, const MCRegisterInfo &MRI, const MCSubtargetInfo &STI)
void InitMCCodeGenInfo(Reloc::Model RM=Reloc::Default, CodeModel::Model CM=CodeModel::Default, CodeGenOpt::Level OL=CodeGenOpt::Default)
static void RegisterMCAsmBackend(Target &T, Target::MCAsmBackendCtorTy Fn)
static MCCodeGenInfo * createAMDGPUMCCodeGenInfo(StringRef TT, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL)
static void RegisterMCObjectStreamer(Target &T, Target::MCObjectStreamerCtorTy Fn)
MCCodeEmitter - Generic instruction encoding interface.
static MCSubtargetInfo * createAMDGPUMCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS)
static void RegisterMCCodeGenInfo(Target &T, Target::MCCodeGenInfoCtorFnTy Fn)
static void RegisterMCSubtargetInfo(Target &T, Target::MCSubtargetInfoCtorFnTy Fn)
uint64_t getFeatureBits() const
static void RegisterMCCodeEmitter(Target &T, Target::MCCodeEmitterCtorTy Fn)
static void RegisterMCRegInfo(Target &T, Target::MCRegInfoCtorFnTy Fn)
Provides AMDGPU specific target descriptions.
MCCodeEmitter * createSIMCCodeEmitter(const MCInstrInfo &MCII, const MCRegisterInfo &MRI, const MCSubtargetInfo &STI, MCContext &Ctx)
static void RegisterMCInstrInfo(Target &T, Target::MCInstrInfoCtorFnTy Fn)
MCAsmBackend - Generic interface to target specific assembler backends.
static MCCodeEmitter * createAMDGPUMCCodeEmitter(const MCInstrInfo &MCII, const MCRegisterInfo &MRI, const MCSubtargetInfo &STI, MCContext &Ctx)
cl::opt< bool > RelaxAll("mc-relax-all", cl::desc("When used with filetype=obj, ""relax all fixups in the emitted object file"))
const MCRegisterInfo & MRI
void LLVMInitializeR600TargetMC()
static GCMetadataPrinterRegistry::Add< OcamlGCMetadataPrinter > Y("ocaml","ocaml 3.10-compatible collector")
static RegisterPass< NVPTXAllocaHoisting > X("alloca-hoisting","Hoisting alloca instructions in non-entry ""blocks to the entry block")
MCAsmBackend * createAMDGPUAsmBackend(const Target &T, const MCRegisterInfo &MRI, StringRef TT, StringRef CPU)
static MCRegisterInfo * createAMDGPUMCRegisterInfo(StringRef TT)