9 #define DEBUG_TYPE "hexagon_cfg"
51 const char *getPassName()
const {
52 return "Hexagon CFG Optimizer";
60 static bool IsConditionalBranch(
int Opc) {
61 return (Opc == Hexagon::JMP_t) || (Opc == Hexagon::JMP_f)
62 || (Opc == Hexagon::JMP_tnew_t) || (Opc == Hexagon::JMP_fnew_t);
66 static bool IsUnconditionalJump(
int Opc) {
67 return (Opc == Hexagon::JMP);
78 NewOpcode = Hexagon::JMP_f;
82 NewOpcode = Hexagon::JMP_t;
85 case Hexagon::JMP_tnew_t:
86 NewOpcode = Hexagon::JMP_fnew_t;
89 case Hexagon::JMP_fnew_t:
90 NewOpcode = Hexagon::JMP_tnew_t;
97 MI->
setDesc(QII->get(NewOpcode));
106 MBBb != MBBe; ++MBBb) {
111 if (MII != MBB->
end()) {
114 if (IsConditionalBranch(Opc)) {
153 LayoutSucc = FirstSucc;
154 JumpAroundTarget = SecondSucc;
156 LayoutSucc = SecondSucc;
157 JumpAroundTarget = FirstSucc;
165 if ((MI->
getOpcode() == Hexagon::JMP_t) ||
170 if (!LayoutSucc || (CondBranchTarget != JumpAroundTarget)) {
174 if ((NumSuccs == 2) && LayoutSucc && (LayoutSucc->
pred_size() == 1)) {
177 if ((LayoutSucc->
size() == 1) &&
183 bool case2 = JumpAroundTarget->
isSuccessor(UncondTarget) &&
184 JumpAroundTarget->
size() >= 1 &&
189 if (case1 || case2) {
190 InvertAndChangeJumpTarget(MI, UncondTarget);
201 if (case2 && !case1) {
206 UncondTarget->
moveAfter(JumpAroundTarget);
215 std::vector<unsigned> OrigLiveIn(LayoutSucc->
livein_begin(),
217 std::vector<unsigned> NewLiveIn(JumpAroundTarget->
livein_begin(),
219 for (
unsigned i = 0; i < OrigLiveIn.size(); ++i) {
222 for (
unsigned i = 0; i < NewLiveIn.size(); ++i) {
242 &HexagonCFGOptimizer::ID, 0,
false,
false);
251 return new HexagonCFGOptimizer(TM);
unsigned succ_size() const
instr_iterator erase(instr_iterator I)
static PassRegistry * getPassRegistry()
MachineBasicBlock * getMBB() const
iterator getFirstTerminator()
void removeLiveIn(unsigned Reg)
void addLiveIn(unsigned Reg)
void moveAfter(MachineBasicBlock *NewBefore)
livein_iterator livein_begin() const
#define llvm_unreachable(msg)
std::vector< MachineBasicBlock * >::iterator succ_iterator
ID
LLVM Calling Convention Representation.
bundle_iterator< MachineInstr, instr_iterator > iterator
livein_iterator livein_end() const
const MachineOperand & getOperand(unsigned i) const
static void initializePassOnce(PassRegistry &Registry)
void setMBB(MachineBasicBlock *MBB)
succ_iterator succ_begin()
void removeSuccessor(MachineBasicBlock *succ)
void setDesc(const MCInstrDesc &tid)
FunctionPass * createHexagonCFGOptimizer(const HexagonTargetMachine &TM)
bool isSuccessor(const MachineBasicBlock *MBB) const
#define CALL_ONCE_INITIALIZATION(function)
void initializeHexagonCFGOptimizerPass(PassRegistry &)
BasicBlockListType::iterator iterator
bool isLayoutSuccessor(const MachineBasicBlock *MBB) const
void registerPass(const PassInfo &PI, bool ShouldFree=false)
void addSuccessor(MachineBasicBlock *succ, uint32_t weight=0)
unsigned pred_size() const