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MachineOperand.h
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1 //===-- llvm/CodeGen/MachineOperand.h - MachineOperand class ----*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file contains the declaration of the MachineOperand class.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_CODEGEN_MACHINEOPERAND_H
15 #define LLVM_CODEGEN_MACHINEOPERAND_H
16 
17 #include "llvm/Support/DataTypes.h"
18 #include <cassert>
19 
20 namespace llvm {
21 
22 class BlockAddress;
23 class ConstantFP;
24 class ConstantInt;
25 class GlobalValue;
26 class MachineBasicBlock;
27 class MachineInstr;
28 class MachineRegisterInfo;
29 class MDNode;
30 class TargetMachine;
31 class TargetRegisterInfo;
32 class hash_code;
33 class raw_ostream;
34 class MCSymbol;
35 
36 /// MachineOperand class - Representation of each machine instruction operand.
37 ///
38 /// This class isn't a POD type because it has a private constructor, but its
39 /// destructor must be trivial. Functions like MachineInstr::addOperand(),
40 /// MachineRegisterInfo::moveOperands(), and MF::DeleteMachineInstr() depend on
41 /// not having to call the MachineOperand destructor.
42 ///
44 public:
46  MO_Register, ///< Register operand.
47  MO_Immediate, ///< Immediate operand
48  MO_CImmediate, ///< Immediate >64bit operand
49  MO_FPImmediate, ///< Floating-point immediate operand
50  MO_MachineBasicBlock, ///< MachineBasicBlock reference
51  MO_FrameIndex, ///< Abstract Stack Frame Index
52  MO_ConstantPoolIndex, ///< Address of indexed Constant in Constant Pool
53  MO_TargetIndex, ///< Target-dependent index+offset operand.
54  MO_JumpTableIndex, ///< Address of indexed Jump Table for switch
55  MO_ExternalSymbol, ///< Name of external global symbol
56  MO_GlobalAddress, ///< Address of a global value
57  MO_BlockAddress, ///< Address of a basic block
58  MO_RegisterMask, ///< Mask of preserved registers.
59  MO_Metadata, ///< Metadata reference (for debug info)
60  MO_MCSymbol ///< MCSymbol reference (for debug/eh info)
61  };
62 
63 private:
64  /// OpKind - Specify what kind of operand this is. This discriminates the
65  /// union.
66  unsigned char OpKind; // MachineOperandType
67 
68  /// Subregister number for MO_Register. A value of 0 indicates the
69  /// MO_Register has no subReg.
70  ///
71  /// For all other kinds of operands, this field holds target-specific flags.
72  unsigned SubReg_TargetFlags : 12;
73 
74  /// TiedTo - Non-zero when this register operand is tied to another register
75  /// operand. The encoding of this field is described in the block comment
76  /// before MachineInstr::tieOperands().
77  unsigned char TiedTo : 4;
78 
79  /// IsDef/IsImp/IsKill/IsDead flags - These are only valid for MO_Register
80  /// operands.
81 
82  /// IsDef - True if this is a def, false if this is a use of the register.
83  ///
84  bool IsDef : 1;
85 
86  /// IsImp - True if this is an implicit def or use, false if it is explicit.
87  ///
88  bool IsImp : 1;
89 
90  /// IsKill - True if this instruction is the last use of the register on this
91  /// path through the function. This is only valid on uses of registers.
92  bool IsKill : 1;
93 
94  /// IsDead - True if this register is never used by a subsequent instruction.
95  /// This is only valid on definitions of registers.
96  bool IsDead : 1;
97 
98  /// IsUndef - True if this register operand reads an "undef" value, i.e. the
99  /// read value doesn't matter. This flag can be set on both use and def
100  /// operands. On a sub-register def operand, it refers to the part of the
101  /// register that isn't written. On a full-register def operand, it is a
102  /// noop. See readsReg().
103  ///
104  /// This is only valid on registers.
105  ///
106  /// Note that an instruction may have multiple <undef> operands referring to
107  /// the same register. In that case, the instruction may depend on those
108  /// operands reading the same dont-care value. For example:
109  ///
110  /// %vreg1<def> = XOR %vreg2<undef>, %vreg2<undef>
111  ///
112  /// Any register can be used for %vreg2, and its value doesn't matter, but
113  /// the two operands must be the same register.
114  ///
115  bool IsUndef : 1;
116 
117  /// IsInternalRead - True if this operand reads a value that was defined
118  /// inside the same instruction or bundle. This flag can be set on both use
119  /// and def operands. On a sub-register def operand, it refers to the part
120  /// of the register that isn't written. On a full-register def operand, it
121  /// is a noop.
122  ///
123  /// When this flag is set, the instruction bundle must contain at least one
124  /// other def of the register. If multiple instructions in the bundle define
125  /// the register, the meaning is target-defined.
126  bool IsInternalRead : 1;
127 
128  /// IsEarlyClobber - True if this MO_Register 'def' operand is written to
129  /// by the MachineInstr before all input registers are read. This is used to
130  /// model the GCC inline asm '&' constraint modifier.
131  bool IsEarlyClobber : 1;
132 
133  /// IsDebug - True if this MO_Register 'use' operand is in a debug pseudo,
134  /// not a real instruction. Such uses should be ignored during codegen.
135  bool IsDebug : 1;
136 
137  /// SmallContents - This really should be part of the Contents union, but
138  /// lives out here so we can get a better packed struct.
139  /// MO_Register: Register number.
140  /// OffsetedInfo: Low bits of offset.
141  union {
142  unsigned RegNo; // For MO_Register.
143  unsigned OffsetLo; // Matches Contents.OffsetedInfo.OffsetHi.
144  } SmallContents;
145 
146  /// ParentMI - This is the instruction that this operand is embedded into.
147  /// This is valid for all operand types, when the operand is in an instr.
148  MachineInstr *ParentMI;
149 
150  /// Contents union - This contains the payload for the various operand types.
151  union {
152  MachineBasicBlock *MBB; // For MO_MachineBasicBlock.
153  const ConstantFP *CFP; // For MO_FPImmediate.
154  const ConstantInt *CI; // For MO_CImmediate. Integers > 64bit.
155  int64_t ImmVal; // For MO_Immediate.
156  const uint32_t *RegMask; // For MO_RegisterMask.
157  const MDNode *MD; // For MO_Metadata.
158  MCSymbol *Sym; // For MO_MCSymbol
159 
160  struct { // For MO_Register.
161  // Register number is in SmallContents.RegNo.
162  MachineOperand *Prev; // Access list for register. See MRI.
164  } Reg;
165 
166  /// OffsetedInfo - This struct contains the offset and an object identifier.
167  /// this represent the object as with an optional offset from it.
168  struct {
169  union {
170  int Index; // For MO_*Index - The index itself.
171  const char *SymbolName; // For MO_ExternalSymbol.
172  const GlobalValue *GV; // For MO_GlobalAddress.
173  const BlockAddress *BA; // For MO_BlockAddress.
174  } Val;
175  // Low bits of offset are in SmallContents.OffsetLo.
176  int OffsetHi; // An offset from the object, high 32 bits.
177  } OffsetedInfo;
178  } Contents;
179 
180  explicit MachineOperand(MachineOperandType K)
181  : OpKind(K), SubReg_TargetFlags(0), ParentMI(0) {}
182 public:
183  /// getType - Returns the MachineOperandType for this operand.
184  ///
185  MachineOperandType getType() const { return (MachineOperandType)OpKind; }
186 
187  unsigned getTargetFlags() const {
188  return isReg() ? 0 : SubReg_TargetFlags;
189  }
190  void setTargetFlags(unsigned F) {
191  assert(!isReg() && "Register operands can't have target flags");
192  SubReg_TargetFlags = F;
193  assert(SubReg_TargetFlags == F && "Target flags out of range");
194  }
195  void addTargetFlag(unsigned F) {
196  assert(!isReg() && "Register operands can't have target flags");
197  SubReg_TargetFlags |= F;
198  assert((SubReg_TargetFlags & F) && "Target flags out of range");
199  }
200 
201 
202  /// getParent - Return the instruction that this operand belongs to.
203  ///
204  MachineInstr *getParent() { return ParentMI; }
205  const MachineInstr *getParent() const { return ParentMI; }
206 
207  /// clearParent - Reset the parent pointer.
208  ///
209  /// The MachineOperand copy constructor also copies ParentMI, expecting the
210  /// original to be deleted. If a MachineOperand is ever stored outside a
211  /// MachineInstr, the parent pointer must be cleared.
212  ///
213  /// Never call clearParent() on an operand in a MachineInstr.
214  ///
215  void clearParent() { ParentMI = 0; }
216 
217  void print(raw_ostream &os, const TargetMachine *TM = 0) const;
218 
219  //===--------------------------------------------------------------------===//
220  // Accessors that tell you what kind of MachineOperand you're looking at.
221  //===--------------------------------------------------------------------===//
222 
223  /// isReg - Tests if this is a MO_Register operand.
224  bool isReg() const { return OpKind == MO_Register; }
225  /// isImm - Tests if this is a MO_Immediate operand.
226  bool isImm() const { return OpKind == MO_Immediate; }
227  /// isCImm - Test if t his is a MO_CImmediate operand.
228  bool isCImm() const { return OpKind == MO_CImmediate; }
229  /// isFPImm - Tests if this is a MO_FPImmediate operand.
230  bool isFPImm() const { return OpKind == MO_FPImmediate; }
231  /// isMBB - Tests if this is a MO_MachineBasicBlock operand.
232  bool isMBB() const { return OpKind == MO_MachineBasicBlock; }
233  /// isFI - Tests if this is a MO_FrameIndex operand.
234  bool isFI() const { return OpKind == MO_FrameIndex; }
235  /// isCPI - Tests if this is a MO_ConstantPoolIndex operand.
236  bool isCPI() const { return OpKind == MO_ConstantPoolIndex; }
237  /// isTargetIndex - Tests if this is a MO_TargetIndex operand.
238  bool isTargetIndex() const { return OpKind == MO_TargetIndex; }
239  /// isJTI - Tests if this is a MO_JumpTableIndex operand.
240  bool isJTI() const { return OpKind == MO_JumpTableIndex; }
241  /// isGlobal - Tests if this is a MO_GlobalAddress operand.
242  bool isGlobal() const { return OpKind == MO_GlobalAddress; }
243  /// isSymbol - Tests if this is a MO_ExternalSymbol operand.
244  bool isSymbol() const { return OpKind == MO_ExternalSymbol; }
245  /// isBlockAddress - Tests if this is a MO_BlockAddress operand.
246  bool isBlockAddress() const { return OpKind == MO_BlockAddress; }
247  /// isRegMask - Tests if this is a MO_RegisterMask operand.
248  bool isRegMask() const { return OpKind == MO_RegisterMask; }
249  /// isMetadata - Tests if this is a MO_Metadata operand.
250  bool isMetadata() const { return OpKind == MO_Metadata; }
251  bool isMCSymbol() const { return OpKind == MO_MCSymbol; }
252 
253 
254  //===--------------------------------------------------------------------===//
255  // Accessors for Register Operands
256  //===--------------------------------------------------------------------===//
257 
258  /// getReg - Returns the register number.
259  unsigned getReg() const {
260  assert(isReg() && "This is not a register operand!");
261  return SmallContents.RegNo;
262  }
263 
264  unsigned getSubReg() const {
265  assert(isReg() && "Wrong MachineOperand accessor");
266  return SubReg_TargetFlags;
267  }
268 
269  bool isUse() const {
270  assert(isReg() && "Wrong MachineOperand accessor");
271  return !IsDef;
272  }
273 
274  bool isDef() const {
275  assert(isReg() && "Wrong MachineOperand accessor");
276  return IsDef;
277  }
278 
279  bool isImplicit() const {
280  assert(isReg() && "Wrong MachineOperand accessor");
281  return IsImp;
282  }
283 
284  bool isDead() const {
285  assert(isReg() && "Wrong MachineOperand accessor");
286  return IsDead;
287  }
288 
289  bool isKill() const {
290  assert(isReg() && "Wrong MachineOperand accessor");
291  return IsKill;
292  }
293 
294  bool isUndef() const {
295  assert(isReg() && "Wrong MachineOperand accessor");
296  return IsUndef;
297  }
298 
299  bool isInternalRead() const {
300  assert(isReg() && "Wrong MachineOperand accessor");
301  return IsInternalRead;
302  }
303 
304  bool isEarlyClobber() const {
305  assert(isReg() && "Wrong MachineOperand accessor");
306  return IsEarlyClobber;
307  }
308 
309  bool isTied() const {
310  assert(isReg() && "Wrong MachineOperand accessor");
311  return TiedTo;
312  }
313 
314  bool isDebug() const {
315  assert(isReg() && "Wrong MachineOperand accessor");
316  return IsDebug;
317  }
318 
319  /// readsReg - Returns true if this operand reads the previous value of its
320  /// register. A use operand with the <undef> flag set doesn't read its
321  /// register. A sub-register def implicitly reads the other parts of the
322  /// register being redefined unless the <undef> flag is set.
323  ///
324  /// This refers to reading the register value from before the current
325  /// instruction or bundle. Internal bundle reads are not included.
326  bool readsReg() const {
327  assert(isReg() && "Wrong MachineOperand accessor");
328  return !isUndef() && !isInternalRead() && (isUse() || getSubReg());
329  }
330 
331  //===--------------------------------------------------------------------===//
332  // Mutators for Register Operands
333  //===--------------------------------------------------------------------===//
334 
335  /// Change the register this operand corresponds to.
336  ///
337  void setReg(unsigned Reg);
338 
339  void setSubReg(unsigned subReg) {
340  assert(isReg() && "Wrong MachineOperand accessor");
341  SubReg_TargetFlags = subReg;
342  assert(SubReg_TargetFlags == subReg && "SubReg out of range");
343  }
344 
345  /// substVirtReg - Substitute the current register with the virtual
346  /// subregister Reg:SubReg. Take any existing SubReg index into account,
347  /// using TargetRegisterInfo to compose the subreg indices if necessary.
348  /// Reg must be a virtual register, SubIdx can be 0.
349  ///
350  void substVirtReg(unsigned Reg, unsigned SubIdx, const TargetRegisterInfo&);
351 
352  /// substPhysReg - Substitute the current register with the physical register
353  /// Reg, taking any existing SubReg into account. For instance,
354  /// substPhysReg(%EAX) will change %reg1024:sub_8bit to %AL.
355  ///
356  void substPhysReg(unsigned Reg, const TargetRegisterInfo&);
357 
358  void setIsUse(bool Val = true) { setIsDef(!Val); }
359 
360  void setIsDef(bool Val = true);
361 
362  void setImplicit(bool Val = true) {
363  assert(isReg() && "Wrong MachineOperand accessor");
364  IsImp = Val;
365  }
366 
367  void setIsKill(bool Val = true) {
368  assert(isReg() && !IsDef && "Wrong MachineOperand accessor");
369  assert((!Val || !isDebug()) && "Marking a debug operation as kill");
370  IsKill = Val;
371  }
372 
373  void setIsDead(bool Val = true) {
374  assert(isReg() && IsDef && "Wrong MachineOperand accessor");
375  IsDead = Val;
376  }
377 
378  void setIsUndef(bool Val = true) {
379  assert(isReg() && "Wrong MachineOperand accessor");
380  IsUndef = Val;
381  }
382 
383  void setIsInternalRead(bool Val = true) {
384  assert(isReg() && "Wrong MachineOperand accessor");
385  IsInternalRead = Val;
386  }
387 
388  void setIsEarlyClobber(bool Val = true) {
389  assert(isReg() && IsDef && "Wrong MachineOperand accessor");
390  IsEarlyClobber = Val;
391  }
392 
393  void setIsDebug(bool Val = true) {
394  assert(isReg() && !IsDef && "Wrong MachineOperand accessor");
395  IsDebug = Val;
396  }
397 
398  //===--------------------------------------------------------------------===//
399  // Accessors for various operand types.
400  //===--------------------------------------------------------------------===//
401 
402  int64_t getImm() const {
403  assert(isImm() && "Wrong MachineOperand accessor");
404  return Contents.ImmVal;
405  }
406 
407  const ConstantInt *getCImm() const {
408  assert(isCImm() && "Wrong MachineOperand accessor");
409  return Contents.CI;
410  }
411 
412  const ConstantFP *getFPImm() const {
413  assert(isFPImm() && "Wrong MachineOperand accessor");
414  return Contents.CFP;
415  }
416 
418  assert(isMBB() && "Wrong MachineOperand accessor");
419  return Contents.MBB;
420  }
421 
422  int getIndex() const {
423  assert((isFI() || isCPI() || isTargetIndex() || isJTI()) &&
424  "Wrong MachineOperand accessor");
425  return Contents.OffsetedInfo.Val.Index;
426  }
427 
428  const GlobalValue *getGlobal() const {
429  assert(isGlobal() && "Wrong MachineOperand accessor");
430  return Contents.OffsetedInfo.Val.GV;
431  }
432 
433  const BlockAddress *getBlockAddress() const {
434  assert(isBlockAddress() && "Wrong MachineOperand accessor");
435  return Contents.OffsetedInfo.Val.BA;
436  }
437 
439  assert(isMCSymbol() && "Wrong MachineOperand accessor");
440  return Contents.Sym;
441  }
442 
443  /// getOffset - Return the offset from the symbol in this operand. This always
444  /// returns 0 for ExternalSymbol operands.
445  int64_t getOffset() const {
446  assert((isGlobal() || isSymbol() || isCPI() || isTargetIndex() ||
447  isBlockAddress()) && "Wrong MachineOperand accessor");
448  return int64_t(uint64_t(Contents.OffsetedInfo.OffsetHi) << 32) |
449  SmallContents.OffsetLo;
450  }
451 
452  const char *getSymbolName() const {
453  assert(isSymbol() && "Wrong MachineOperand accessor");
454  return Contents.OffsetedInfo.Val.SymbolName;
455  }
456 
457  /// clobbersPhysReg - Returns true if this RegMask clobbers PhysReg.
458  /// It is sometimes necessary to detach the register mask pointer from its
459  /// machine operand. This static method can be used for such detached bit
460  /// mask pointers.
461  static bool clobbersPhysReg(const uint32_t *RegMask, unsigned PhysReg) {
462  // See TargetRegisterInfo.h.
463  assert(PhysReg < (1u << 30) && "Not a physical register");
464  return !(RegMask[PhysReg / 32] & (1u << PhysReg % 32));
465  }
466 
467  /// clobbersPhysReg - Returns true if this RegMask operand clobbers PhysReg.
468  bool clobbersPhysReg(unsigned PhysReg) const {
469  return clobbersPhysReg(getRegMask(), PhysReg);
470  }
471 
472  /// getRegMask - Returns a bit mask of registers preserved by this RegMask
473  /// operand.
474  const uint32_t *getRegMask() const {
475  assert(isRegMask() && "Wrong MachineOperand accessor");
476  return Contents.RegMask;
477  }
478 
479  const MDNode *getMetadata() const {
480  assert(isMetadata() && "Wrong MachineOperand accessor");
481  return Contents.MD;
482  }
483 
484  //===--------------------------------------------------------------------===//
485  // Mutators for various operand types.
486  //===--------------------------------------------------------------------===//
487 
488  void setImm(int64_t immVal) {
489  assert(isImm() && "Wrong MachineOperand mutator");
490  Contents.ImmVal = immVal;
491  }
492 
493  void setOffset(int64_t Offset) {
494  assert((isGlobal() || isSymbol() || isCPI() || isTargetIndex() ||
495  isBlockAddress()) && "Wrong MachineOperand accessor");
496  SmallContents.OffsetLo = unsigned(Offset);
497  Contents.OffsetedInfo.OffsetHi = int(Offset >> 32);
498  }
499 
500  void setIndex(int Idx) {
501  assert((isFI() || isCPI() || isTargetIndex() || isJTI()) &&
502  "Wrong MachineOperand accessor");
503  Contents.OffsetedInfo.Val.Index = Idx;
504  }
505 
507  assert(isMBB() && "Wrong MachineOperand accessor");
508  Contents.MBB = MBB;
509  }
510 
511  //===--------------------------------------------------------------------===//
512  // Other methods.
513  //===--------------------------------------------------------------------===//
514 
515  /// isIdenticalTo - Return true if this operand is identical to the specified
516  /// operand. Note: This method ignores isKill and isDead properties.
517  bool isIdenticalTo(const MachineOperand &Other) const;
518 
519  /// \brief MachineOperand hash_value overload.
520  ///
521  /// Note that this includes the same information in the hash that
522  /// isIdenticalTo uses for comparison. It is thus suited for use in hash
523  /// tables which use that function for equality comparisons only.
524  friend hash_code hash_value(const MachineOperand &MO);
525 
526  /// ChangeToImmediate - Replace this operand with a new immediate operand of
527  /// the specified value. If an operand is known to be an immediate already,
528  /// the setImm method should be used.
529  void ChangeToImmediate(int64_t ImmVal);
530 
531  /// ChangeToRegister - Replace this operand with a new register operand of
532  /// the specified value. If an operand is known to be an register already,
533  /// the setReg method should be used.
534  void ChangeToRegister(unsigned Reg, bool isDef, bool isImp = false,
535  bool isKill = false, bool isDead = false,
536  bool isUndef = false, bool isDebug = false);
537 
538  //===--------------------------------------------------------------------===//
539  // Construction methods.
540  //===--------------------------------------------------------------------===//
541 
542  static MachineOperand CreateImm(int64_t Val) {
544  Op.setImm(Val);
545  return Op;
546  }
547 
550  Op.Contents.CI = CI;
551  return Op;
552  }
553 
556  Op.Contents.CFP = CFP;
557  return Op;
558  }
559 
560  static MachineOperand CreateReg(unsigned Reg, bool isDef, bool isImp = false,
561  bool isKill = false, bool isDead = false,
562  bool isUndef = false,
563  bool isEarlyClobber = false,
564  unsigned SubReg = 0,
565  bool isDebug = false,
566  bool isInternalRead = false) {
568  Op.IsDef = isDef;
569  Op.IsImp = isImp;
570  Op.IsKill = isKill;
571  Op.IsDead = isDead;
572  Op.IsUndef = isUndef;
573  Op.IsInternalRead = isInternalRead;
574  Op.IsEarlyClobber = isEarlyClobber;
575  Op.TiedTo = 0;
576  Op.IsDebug = isDebug;
577  Op.SmallContents.RegNo = Reg;
578  Op.Contents.Reg.Prev = 0;
579  Op.Contents.Reg.Next = 0;
580  Op.setSubReg(SubReg);
581  return Op;
582  }
584  unsigned char TargetFlags = 0) {
586  Op.setMBB(MBB);
587  Op.setTargetFlags(TargetFlags);
588  return Op;
589  }
590  static MachineOperand CreateFI(int Idx) {
592  Op.setIndex(Idx);
593  return Op;
594  }
595  static MachineOperand CreateCPI(unsigned Idx, int Offset,
596  unsigned char TargetFlags = 0) {
598  Op.setIndex(Idx);
599  Op.setOffset(Offset);
600  Op.setTargetFlags(TargetFlags);
601  return Op;
602  }
603  static MachineOperand CreateTargetIndex(unsigned Idx, int64_t Offset,
604  unsigned char TargetFlags = 0) {
606  Op.setIndex(Idx);
607  Op.setOffset(Offset);
608  Op.setTargetFlags(TargetFlags);
609  return Op;
610  }
611  static MachineOperand CreateJTI(unsigned Idx,
612  unsigned char TargetFlags = 0) {
614  Op.setIndex(Idx);
615  Op.setTargetFlags(TargetFlags);
616  return Op;
617  }
618  static MachineOperand CreateGA(const GlobalValue *GV, int64_t Offset,
619  unsigned char TargetFlags = 0) {
621  Op.Contents.OffsetedInfo.Val.GV = GV;
622  Op.setOffset(Offset);
623  Op.setTargetFlags(TargetFlags);
624  return Op;
625  }
626  static MachineOperand CreateES(const char *SymName,
627  unsigned char TargetFlags = 0) {
629  Op.Contents.OffsetedInfo.Val.SymbolName = SymName;
630  Op.setOffset(0); // Offset is always 0.
631  Op.setTargetFlags(TargetFlags);
632  return Op;
633  }
634  static MachineOperand CreateBA(const BlockAddress *BA, int64_t Offset,
635  unsigned char TargetFlags = 0) {
637  Op.Contents.OffsetedInfo.Val.BA = BA;
638  Op.setOffset(Offset);
639  Op.setTargetFlags(TargetFlags);
640  return Op;
641  }
642  /// CreateRegMask - Creates a register mask operand referencing Mask. The
643  /// operand does not take ownership of the memory referenced by Mask, it must
644  /// remain valid for the lifetime of the operand.
645  ///
646  /// A RegMask operand represents a set of non-clobbered physical registers on
647  /// an instruction that clobbers many registers, typically a call. The bit
648  /// mask has a bit set for each physreg that is preserved by this
649  /// instruction, as described in the documentation for
650  /// TargetRegisterInfo::getCallPreservedMask().
651  ///
652  /// Any physreg with a 0 bit in the mask is clobbered by the instruction.
653  ///
654  static MachineOperand CreateRegMask(const uint32_t *Mask) {
655  assert(Mask && "Missing register mask");
657  Op.Contents.RegMask = Mask;
658  return Op;
659  }
660  static MachineOperand CreateMetadata(const MDNode *Meta) {
662  Op.Contents.MD = Meta;
663  return Op;
664  }
665 
668  Op.Contents.Sym = Sym;
669  return Op;
670  }
671 
672  friend class MachineInstr;
673  friend class MachineRegisterInfo;
674 private:
675  //===--------------------------------------------------------------------===//
676  // Methods for handling register use/def lists.
677  //===--------------------------------------------------------------------===//
678 
679  /// isOnRegUseList - Return true if this operand is on a register use/def list
680  /// or false if not. This can only be called for register operands that are
681  /// part of a machine instruction.
682  bool isOnRegUseList() const {
683  assert(isReg() && "Can only add reg operand to use lists");
684  return Contents.Reg.Prev != 0;
685  }
686 };
687 
689  MO.print(OS, 0);
690  return OS;
691 }
692 
693  // See friend declaration above. This additional declaration is required in
694  // order to compile LLVM with IBM xlC compiler.
695  hash_code hash_value(const MachineOperand &MO);
696 } // End llvm namespace
697 
698 #endif
bool isImplicit() const
static MachineOperand CreateMCSymbol(MCSymbol *Sym)
MachineInstr * getParent()
const GlobalValue * getGlobal() const
static MachineOperand CreateCImm(const ConstantInt *CI)
struct llvm::MachineOperand::@32::@33 Reg
void setTargetFlags(unsigned F)
void ChangeToRegister(unsigned Reg, bool isDef, bool isImp=false, bool isKill=false, bool isDead=false, bool isUndef=false, bool isDebug=false)
const ConstantFP * getFPImm() const
MachineBasicBlock * getMBB() const
bool isTargetIndex() const
isTargetIndex - Tests if this is a MO_TargetIndex operand.
const uint32_t * RegMask
static MachineOperand CreateJTI(unsigned Idx, unsigned char TargetFlags=0)
void setIsDef(bool Val=true)
Change a def to a use, or a use to a def.
void setIsUndef(bool Val=true)
bool isDead() const
bool isTied() const
bool isBlockAddress() const
isBlockAddress - Tests if this is a MO_BlockAddress operand.
const char * getSymbolName() const
MDNode - a tuple of other values.
Definition: Metadata.h:69
void setIsDead(bool Val=true)
F(f)
const MDNode * getMetadata() const
void substVirtReg(unsigned Reg, unsigned SubIdx, const TargetRegisterInfo &)
const ConstantFP * CFP
bool isMetadata() const
isMetadata - Tests if this is a MO_Metadata operand.
Target-dependent index+offset operand.
bool isMCSymbol() const
Address of indexed Jump Table for switch.
bool isJTI() const
isJTI - Tests if this is a MO_JumpTableIndex operand.
static MachineOperand CreateReg(unsigned Reg, bool isDef, bool isImp=false, bool isKill=false, bool isDead=false, bool isUndef=false, bool isEarlyClobber=false, unsigned SubReg=0, bool isDebug=false, bool isInternalRead=false)
bool isImm() const
isImm - Tests if this is a MO_Immediate operand.
bool isReg() const
isReg - Tests if this is a MO_Register operand.
void setImplicit(bool Val=true)
void setIndex(int Idx)
bool isUndef() const
static MachineOperand CreateRegMask(const uint32_t *Mask)
bool isCPI() const
isCPI - Tests if this is a MO_ConstantPoolIndex operand.
bool isGlobal() const
isGlobal - Tests if this is a MO_GlobalAddress operand.
void setIsEarlyClobber(bool Val=true)
bool isKill() const
bool isFI() const
isFI - Tests if this is a MO_FrameIndex operand.
hash_code hash_value(const APFloat &Arg)
Definition: APFloat.cpp:2814
int64_t getImm() const
Address of indexed Constant in Constant Pool.
const GlobalValue * GV
void ChangeToImmediate(int64_t ImmVal)
MCSymbol reference (for debug/eh info)
bool isEarlyClobber() const
unsigned getTargetFlags() const
static MachineOperand CreateCPI(unsigned Idx, int Offset, unsigned char TargetFlags=0)
Metadata reference (for debug info)
static MachineOperand CreateFPImm(const ConstantFP *CFP)
Abstract Stack Frame Index.
union llvm::MachineOperand::@32::@34::@35 Val
bool isCImm() const
isCImm - Test if t his is a MO_CImmediate operand.
void setMBB(MachineBasicBlock *MBB)
static MachineOperand CreateBA(const BlockAddress *BA, int64_t Offset, unsigned char TargetFlags=0)
bool isSymbol() const
isSymbol - Tests if this is a MO_ExternalSymbol operand.
Immediate >64bit operand.
void substPhysReg(unsigned Reg, const TargetRegisterInfo &)
void setImm(int64_t immVal)
static MachineOperand CreateGA(const GlobalValue *GV, int64_t Offset, unsigned char TargetFlags=0)
void setIsInternalRead(bool Val=true)
static MachineOperand CreateTargetIndex(unsigned Idx, int64_t Offset, unsigned char TargetFlags=0)
int64_t getOffset() const
Floating-point immediate operand.
void setOffset(int64_t Offset)
unsigned getSubReg() const
bool clobbersPhysReg(unsigned PhysReg) const
clobbersPhysReg - Returns true if this RegMask operand clobbers PhysReg.
void setIsKill(bool Val=true)
bool isRegMask() const
isRegMask - Tests if this is a MO_RegisterMask operand.
const ConstantInt * CI
static MachineOperand CreateMetadata(const MDNode *Meta)
Class for constant integers.
Definition: Constants.h:51
const uint32_t * getRegMask() const
MachineBasicBlock * MBB
bool isMBB() const
isMBB - Tests if this is a MO_MachineBasicBlock operand.
const MachineInstr * getParent() const
friend hash_code hash_value(const MachineOperand &MO)
MachineOperand hash_value overload.
static bool clobbersPhysReg(const uint32_t *RegMask, unsigned PhysReg)
bool isFPImm() const
isFPImm - Tests if this is a MO_FPImmediate operand.
const ConstantInt * getCImm() const
static MachineOperand CreateES(const char *SymName, unsigned char TargetFlags=0)
An opaque object representing a hash code.
Definition: Hashing.h:79
MachineOperandType getType() const
void addTargetFlag(unsigned F)
static MachineOperand CreateMBB(MachineBasicBlock *MBB, unsigned char TargetFlags=0)
MachineOperand * Prev
void print(raw_ostream &os, const TargetMachine *TM=0) const
void setReg(unsigned Reg)
static MachineOperand CreateImm(int64_t Val)
void setIsUse(bool Val=true)
void setSubReg(unsigned subReg)
MCSymbol * getMCSymbol() const
Mask of preserved registers.
const BlockAddress * BA
raw_ostream & operator<<(raw_ostream &OS, const APInt &I)
Definition: APInt.h:1688
unsigned getReg() const
getReg - Returns the register number.
const char * SymbolName
Address of a basic block.
bool isDebug() const
MachineOperand * Next
const BlockAddress * getBlockAddress() const
struct llvm::MachineOperand::@32::@34 OffsetedInfo
bool readsReg() const
bool isIdenticalTo(const MachineOperand &Other) const
void setIsDebug(bool Val=true)
static MachineOperand CreateFI(int Idx)
MachineBasicBlock reference.
bool isInternalRead() const
Address of a global value.
Name of external global symbol.