40 : BB(bb), Number(-1), xParent(&mf), Alignment(0), IsLandingPad(
false),
41 AddressTaken(
false), CachedMCSymbol(NULL) {
45 MachineBasicBlock::~MachineBasicBlock() {
52 if (!CachedMCSymbol) {
61 return CachedMCSymbol;
85 I->AddRegOperandsToUseLists(RegInfo);
101 assert(N->
getParent() == 0 &&
"machine instruction already in a basic block");
102 N->setParent(Parent);
107 N->AddRegOperandsToUseLists(MF->
getRegInfo());
116 assert(N->
getParent() != 0 &&
"machine instruction not in a basic block");
120 N->RemoveRegOperandsFromUseLists(MF->
getRegInfo());
134 assert(Parent->getParent() == fromList.Parent->
getParent() &&
135 "MachineInstr parent mismatch!");
138 if (Parent == fromList.Parent)
return;
142 for (; first != last; ++first)
143 first->setParent(Parent);
147 assert(!MI->
getParent() &&
"MI is still in a block!");
148 Parent->getParent()->DeleteMachineInstr(MI);
153 while (I != E && I->isPHI())
155 assert((I == E || !I->isInsideBundle()) &&
156 "First non-phi MI cannot be inside a bundle!");
163 while (I != E && (I->isPHI() || I->isLabel() || I->isDebugValue()))
167 assert((I == E || !I->isInsideBundle()) &&
168 "First non-phi / non-label instruction is inside a bundle!");
174 while (
I != B && ((--
I)->isTerminator() ||
I->isDebugValue()))
176 while (
I != E && !
I->isTerminator())
184 while (
I != B && ((--
I)->isTerminator() ||
I->isDebugValue()))
186 while (
I != E && !
I->isTerminator())
193 while (
I != B && ((--
I)->isTerminator() ||
I->isDebugValue()))
195 while (
I != E && !
I->isTerminator())
206 if (
I->isDebugValue() ||
I->isInsideBundle())
221 if (
I->isDebugValue() ||
I->isInsideBundle())
234 if ((*I)->isLandingPad())
239 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
247 return LBB->getName();
267 OS <<
"Can't print out MachineBasicBlock because parent MachineFunction"
277 const char *Comma =
"";
279 OS << Comma <<
"derived from LLVM BB ";
283 if (
isLandingPad()) { OS << Comma <<
"EH LANDING PAD"; Comma =
", "; }
284 if (
hasAddressTaken()) { OS << Comma <<
"ADDRESS TAKEN"; Comma =
", "; }
286 OS << Comma <<
"Align " << Alignment <<
" (" << (1u << Alignment)
293 if (Indexes) OS <<
'\t';
301 if (Indexes) OS <<
'\t';
302 OS <<
" Predecessors according to CFG:";
304 OS <<
" BB#" << (*PI)->getNumber();
315 if (
I->isInsideBundle())
322 if (Indexes) OS <<
'\t';
323 OS <<
" Successors according to CFG:";
325 OS <<
" BB#" << (*SI)->getNumber();
326 if (!Weights.empty())
327 OS <<
'(' << *getWeightIterator(SI) <<
')';
334 std::vector<unsigned>::iterator
I =
335 std::find(LiveIns.begin(), LiveIns.end(),
Reg);
336 if (I != LiveIns.end())
347 assert(
getParent() &&
"MBB must be inserted in function");
349 assert(RC &&
"Register class is required");
351 "Only the entry block and landing pads can have physreg live ins");
360 for (;I != E && I->isCopy(); ++
I)
361 if (I->getOperand(1).getReg() == PhysReg) {
362 unsigned VirtReg = I->getOperand(0).getReg();
396 assert(!B &&
"UpdateTerminators requires analyzable predecessors!");
408 if ((*SI)->isLandingPad())
410 assert(!TBB &&
"Found more than one non-landing-pad successor!");
444 if ((*SI)->isLandingPad() || *SI == TBB)
446 assert(!FallthroughBB &&
"Found more than one fallthrough successor.");
486 if (weight != 0 && Weights.empty())
487 Weights.resize(Successors.size());
489 if (weight != 0 || !Weights.empty())
490 Weights.push_back(weight);
492 Successors.push_back(succ);
493 succ->addPredecessor(
this);
497 succ->removePredecessor(
this);
498 succ_iterator I = std::find(Successors.begin(), Successors.end(), succ);
499 assert(I != Successors.end() &&
"Not a current successor!");
502 if (!Weights.empty()) {
503 weight_iterator WI = getWeightIterator(I);
512 assert(I != Successors.end() &&
"Not a current successor!");
515 if (!Weights.empty()) {
516 weight_iterator WI = getWeightIterator(I);
520 (*I)->removePredecessor(
this);
521 return Successors.erase(I);
544 assert(OldI != E &&
"Old is not a successor of this block");
545 Old->removePredecessor(
this);
549 New->addPredecessor(
this);
556 if (!Weights.empty()) {
557 weight_iterator OldWI = getWeightIterator(OldI);
558 *getWeightIterator(NewI) += *OldWI;
559 Weights.erase(OldWI);
561 Successors.erase(OldI);
565 Predecessors.push_back(pred);
569 pred_iterator I = std::find(Predecessors.begin(), Predecessors.end(), pred);
570 assert(I != Predecessors.end() &&
"Pred is not a predecessor of this block!");
571 Predecessors.erase(I);
583 if (!fromMBB->Weights.empty())
584 Weight = *fromMBB->Weights.begin();
599 if (!fromMBB->Weights.empty())
600 Weight = *fromMBB->Weights.begin();
607 for (
unsigned i = 2, e = MI->
getNumOperands()+1; i != e; i += 2) {
609 if (MO.
getMBB() == fromMBB)
653 if (TBB == 0)
return true;
663 if (Cond.
empty())
return false;
692 if (TBB && TBB == FBB) {
693 DEBUG(
dbgs() <<
"Won't split critical edge after degenerate BB#"
700 DEBUG(
dbgs() <<
"Splitting critical edge:"
703 <<
" -- BB#" << Succ->
getNumber() <<
'\n');
710 Indexes->insertMBBInMaps(NMBB);
725 if (!OI->isReg() || OI->getReg() == 0 ||
726 !OI->isUse() || !OI->isKill() || OI->isUndef())
728 unsigned Reg = OI->getReg();
731 KilledRegs.push_back(Reg);
732 DEBUG(
dbgs() <<
"Removing terminator kill: " << *MI);
733 OI->setIsKill(
false);
746 if (!OI->isReg() || OI->getReg() == 0)
749 unsigned Reg = OI->getReg();
750 if (std::find(UsedRegs.
begin(), UsedRegs.
end(),
Reg) == UsedRegs.
end())
776 E = Terminators.
end(); I != E; ++
I) {
777 if (std::find(NewTerminators.
begin(), NewTerminators.
end(), *
I) ==
778 NewTerminators.
end())
779 Indexes->removeMachineInstrFromMaps(*I);
794 if (Indexes->hasIndex(I))
795 Indexes->removeMachineInstrFromMaps(I);
796 Indexes->insertMachineInstrInMaps(I);
804 i != e && i->isPHI(); ++i)
805 for (
unsigned ni = 1, ne = i->getNumOperands(); ni != ne; ni += 2)
806 if (i->getOperand(ni+1).getMBB() ==
this)
807 i->getOperand(ni+1).setMBB(NMBB);
818 while (!KilledRegs.empty()) {
819 unsigned Reg = KilledRegs.pop_back_val();
821 if (!(--I)->addRegisterKilled(Reg, TRI,
false))
825 DEBUG(
dbgs() <<
"Restored terminator kill: " << *I);
844 SlotIndex StartIndex = Indexes->getMBBEndIdx(
this);
846 SlotIndex EndIndex = Indexes->getMBBEndIdx(NMBB);
852 I != E && I->isPHI(); ++
I) {
853 for (
unsigned ni = 1, ne = I->getNumOperands(); ni != ne; ni += 2) {
854 if (I->getOperand(ni+1).getMBB() == NMBB) {
863 assert(VNI &&
"PHI sources should be live out of their predecessors.");
872 if (PHISrcRegs.
count(Reg) || !LIS->hasInterval(Reg))
876 if (!LI.
liveAt(PrevIndex))
879 bool isLiveOut = LI.
liveAt(LIS->getMBBStartIdx(Succ));
880 if (isLiveOut && isLastMBB) {
882 assert(VNI &&
"LiveInterval should have VNInfo where it is live.");
884 }
else if (!isLiveOut && !isLastMBB) {
899 bool IsNewIDom =
true;
905 if (!MDT->dominates(SucccDTNode, MDT->getNode(PredBB))) {
918 MDT->changeImmediateDominator(SucccDTNode, NewDTNode);
925 if (
MachineLoop *DestLoop = MLI->getLoopFor(Succ)) {
926 if (TIL == DestLoop) {
928 DestLoop->addBasicBlockToLoop(NMBB, MLI->getBase());
929 }
else if (TIL->contains(DestLoop)) {
931 TIL->addBasicBlockToLoop(NMBB, MLI->getBase());
932 }
else if (DestLoop->contains(TIL)) {
934 DestLoop->addBasicBlockToLoop(NMBB, MLI->getBase());
940 assert(DestLoop->getHeader() == Succ &&
941 "Should not create irreducible loops!");
943 P->addBasicBlockToLoop(NMBB, MLI->getBase());
967 return Insts.
erase(I);
980 "Cannot insert instruction with bundle flags");
982 if (I !=
instr_end() && I->isBundledWithPred()) {
986 return Insts.
insert(I, MI);
992 assert(
getParent() &&
"Not embedded in a function!");
1001 assert(
getParent() &&
"Not embedded in a function!");
1010 assert(Old != New &&
"Cannot replace self with self!");
1015 if (!I->isTerminator())
break;
1019 for (
unsigned i = 0, e = I->getNumOperands(); i != e; ++i)
1020 if (I->getOperand(i).isMBB() &&
1021 I->getOperand(i).getMBB() == Old)
1022 I->getOperand(i).setMBB(New);
1054 bool Changed =
false;
1059 if (DestA == 0 && DestB == 0) {
1063 }
else if (DestA != 0 && DestB == 0) {
1068 assert(DestA && DestB && isCond &&
1069 "CFG in a bad state. Cannot correct CFG edges");
1078 if (!SeenMBBs.
insert(MBB) ||
1079 (MBB != DestA && MBB != DestB && !MBB->
isLandingPad())) {
1101 while (MBBI != E && MBBI->isDebugValue())
1104 DL = MBBI->getDebugLoc();
1110 uint32_t MachineBasicBlock::getSuccWeight(const_succ_iterator Succ)
const {
1111 if (Weights.empty())
1114 return *getWeightIterator(Succ);
1119 MachineBasicBlock::weight_iterator MachineBasicBlock::
1121 assert(Weights.size() == Successors.size() &&
"Async weight list!");
1122 size_t index = std::distance(Successors.begin(),
I);
1123 assert(index < Weights.size() &&
"Not a current successor!");
1124 return Weights.begin() + index;
1129 MachineBasicBlock::const_weight_iterator MachineBasicBlock::
1131 assert(Weights.size() == Successors.size() &&
"Async weight list!");
1132 const size_t index = std::distance(Successors.begin(),
I);
1133 assert(index < Weights.size() &&
"Not a current successor!");
1134 return Weights.begin() + index;
1146 unsigned Neighborhood) {
1147 unsigned N = Neighborhood;
1154 if (I != MBB->
begin()) {
1174 }
while (I != MBB->
begin() && --N > 0);
1178 if (I == MBB->
begin()) {
1194 if (I != MBB->
end()) {
1195 for (++I; I != MBB->
end() && N > 0; ++
I, --
N) {
1201 return (Analysis.
Reads) ?
unsigned succ_size() const
void push_back(const T &Elt)
const MachineFunction * getParent() const
mop_iterator operands_end()
instr_iterator erase(instr_iterator I)
const MCAsmInfo * getAsmInfo() const
instr_iterator instr_begin()
void transferNodesFromList(ilist_node_traits &, ilist_iterator< NodeTy >, ilist_iterator< NodeTy >)
void removeNodeFromList(NodeTy *)
instr_iterator instr_end()
bool removeKill(MachineInstr *MI)
MachineBasicBlock * getMBB() const
static unsigned index2VirtReg(unsigned Index)
unsigned createVirtualRegister(const TargetRegisterClass *RegClass)
instr_iterator getFirstInstrTerminator()
std::vector< unsigned >::const_iterator livein_iterator
iterator getFirstTerminator()
static bool isVirtualRegister(unsigned Reg)
const char * getPrivateGlobalPrefix() const
void removeLiveIn(unsigned Reg)
virtual bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify=false) const
void addLiveIn(unsigned Reg)
LivenessQueryResult computeRegisterLiveness(const TargetRegisterInfo *TRI, unsigned Reg, MachineInstr *MI, unsigned Neighborhood=10)
void moveAfter(MachineBasicBlock *NewBefore)
void transferSuccessorsAndUpdatePHIs(MachineBasicBlock *fromMBB)
virtual unsigned RemoveBranch(MachineBasicBlock &MBB) const
unsigned getFunctionNumber() const
Instructions::iterator instr_iterator
MachineBasicBlock * removeFromParent()
VNInfo * getVNInfoAt(SlotIndex Idx) const
getVNInfoAt - Return the VNInfo that is live at Idx, or NULL.
LoopInfoBase< BlockT, LoopT > * LI
StringRef getName() const
bool DefinesDead
DefinesDead - All defs of a Reg or a super-register are dead.
void WriteAsOperand(raw_ostream &, const Value *, bool PrintTy=true, const Module *Context=0)
livein_iterator livein_begin() const
unsigned getNumVirtRegs() const
void ReplaceUsesOfBlockWith(MachineBasicBlock *Old, MachineBasicBlock *New)
static void removeGarbageObject(void *Object)
MCSymbol * GetOrCreateSymbol(StringRef Name)
const HexagonInstrInfo * TII
AnalysisType * getAnalysisIfAvailable() const
#define llvm_unreachable(msg)
std::vector< MachineBasicBlock * >::iterator succ_iterator
MachineBasicBlock * SplitCriticalEdge(MachineBasicBlock *Succ, Pass *P)
static void unbundleSingleMI(MachineInstr *MI)
void print(raw_ostream &OS, SlotIndexes *=0) const
MachineInstr * remove_instr(MachineInstr *I)
PhysRegInfo analyzePhysReg(unsigned Reg, const TargetRegisterInfo *TRI)
unsigned getNumOperands() const
bool isBundledWithSucc() const
void unbundleFromPred()
Break bundle above this instruction.
void transferSuccessors(MachineBasicBlock *fromMBB)
bool LLVM_ATTRIBUTE_UNUSED_RESULT empty() const
iterator addSegment(Segment S)
bool livein_empty() const
iterator getLastNonDebugInstr()
virtual bool ReverseBranchCondition(SmallVectorImpl< MachineOperand > &Cond) const
MCContext & getContext() const
const TargetRegisterClass * constrainRegClass(unsigned Reg, const TargetRegisterClass *RC, unsigned MinNumRegs=0)
const BasicBlock * getBasicBlock() const
SlotIndex getPrevSlot() const
const MachineBasicBlock * getParent() const
bundle_iterator< MachineInstr, instr_iterator > iterator
bool Kills
There is a kill of Reg or a super-register.
iterator SkipPHIsAndLabels(iterator I)
MachineBasicBlock * CreateMachineBasicBlock(const BasicBlock *bb=0)
void insertMBBInMaps(MachineBasicBlock *mbb)
Add the given MachineBasicBlock into the maps.
LLVM Basic Block Representation.
bool ReadsOverlap
ReadsOverlap - Reg or an overlapping register is read.
livein_iterator livein_end() const
const MachineOperand & getOperand(unsigned i) const
void setMBB(MachineBasicBlock *MBB)
iterator insert(iterator where, const NodeTy &val)
Register is known to be dead.
void setFlag(MIFlag Flag)
setFlag - Set a MI flag.
void clearFlag(MIFlag Flag)
clearFlag - Clear a MI flag.
ItTy next(ItTy it, Dist n)
const MachineBasicBlock * getLandingPadSuccessor() const
void remove(iterator MBBI)
bool isBundledWithPred() const
LivenessQueryResult
Possible outcome of a register liveness query to computeRegisterLiveness()
MachineInstrBuilder BuildMI(MachineFunction &MF, DebugLoc DL, const MCInstrDesc &MCID)
Register is known to be live.
succ_iterator succ_begin()
void removeSuccessor(MachineBasicBlock *succ)
void moveBefore(MachineBasicBlock *NewAfter)
VarInfo & getVarInfo(unsigned RegIdx)
getVarInfo - Get (possibly creating) a VarInfo object for the given vreg.
pred_iterator pred_begin()
bool liveAt(SlotIndex index) const
MCSymbol * getSymbol() const
SlotIndex getInstructionIndex(const MachineInstr *MI) const
Returns the base index for the given instruction.
iterator erase(iterator where)
const MCInstrDesc & get(unsigned Opcode) const
std::vector< MachineBasicBlock * >::const_iterator const_pred_iterator
DebugLoc findDebugLoc(instr_iterator MBBI)
void addNewBlock(MachineBasicBlock *BB, MachineBasicBlock *DomBB, MachineBasicBlock *SuccBB)
std::string getFullName() const
Return a hopefully unique identifier for this block.
std::vector< MachineInstr * > Kills
void removeSegment(SlotIndex Start, SlotIndex End, bool RemoveDeadValNo=false)
virtual const TargetInstrInfo * getInstrInfo() const
BasicBlockListType::const_iterator const_iterator
void splice(iterator InsertPt, iterator MBBI)
bool hasIndex(const MachineInstr *instr) const
bool isSuccessor(const MachineBasicBlock *MBB) const
bool Reads
Reads - Read or a super-register is read.
virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, const SmallVectorImpl< MachineOperand > &Cond, DebugLoc DL) const
raw_ostream & dbgs()
dbgs - Return a circular-buffered debug stream.
static void deleteNode(NodeTy *V)
StringRef getName() const
static void addGarbageObject(void *Object)
void replaceSuccessor(MachineBasicBlock *Old, MachineBasicBlock *New)
bool count(const T &V) const
count - Return true if the element is in the set.
bundle_iterator< const MachineInstr, const_instr_iterator > const_iterator
static bool isPhysicalRegister(unsigned Reg)
bool hasAddressTaken() const
bool isLandingPad() const
block Block Frequency Analysis
void addNodeToList(NodeTy *)
bool isLiveIn(unsigned Reg) const
MachineRegisterInfo & getRegInfo()
bool Defines
Defines - Reg or a super-register is defined.
const TargetMachine & getTarget() const
instr_iterator insert(instr_iterator I, MachineInstr *M)
virtual const TargetRegisterInfo * getRegisterInfo() const
iterator getFirstNonPHI()
void removeFromMBBNumbering(unsigned N)
SlotIndex getMBBStartIdx(unsigned Num) const
Returns the first index in the given basic block number.
raw_ostream & operator<<(raw_ostream &OS, const APInt &I)
unsigned getReg() const
getReg - Returns the register number.
void erase(iterator MBBI)
void insert(iterator MBBI, MachineBasicBlock *MBB)
void unbundleFromSucc()
Break bundle below this instruction.
std::vector< MachineBasicBlock * >::const_iterator const_succ_iterator
unsigned addToMBBNumbering(MachineBasicBlock *MBB)
Adds the MBB to the internal numbering. Returns the unique number assigned to the MBB...
mop_iterator operands_begin()
BasicBlockListType::iterator iterator
virtual bool isPredicated(const MachineInstr *MI) const
bool isPredecessor(const MachineBasicBlock *MBB) const
const MCRegisterInfo & MRI
StringRef getName() const
bool isLayoutSuccessor(const MachineBasicBlock *MBB) const
SlotIndex - An opaque wrapper around machine indexes.
NodeTy * remove(iterator &IT)
void addSuccessor(MachineBasicBlock *succ, uint32_t weight=0)
bool CorrectExtraCFGEdges(MachineBasicBlock *DestA, MachineBasicBlock *DestB, bool isCond)
bool isBarrier(QueryType Type=AnyInBundle) const