16 #define DEBUG_TYPE "livestacks"
29 "Live Stack Slot Analysis",
false,
false)
45 VNInfoAllocator.
Reset();
59 assert(Slot >= 0 &&
"Spill slot indice must be >= 0");
60 SS2IntervalMap::iterator
I = S2IMap.find(Slot);
61 if (I == S2IMap.end()) {
62 I = S2IMap.insert(I, std::make_pair(Slot,
64 S2RCMap.insert(std::make_pair(Slot, RC));
76 OS <<
"********** INTERVALS **********\n";
82 OS <<
" [" << RC->
getName() <<
"]\n";
The main container class for the LLVM Intermediate Representation.
virtual bool runOnMachineFunction(MachineFunction &)
runOnMachineFunction - pass entry point
INITIALIZE_PASS_BEGIN(LiveStacks,"livestacks","Live Stack Slot Analysis", false, false) INITIALIZE_PASS_END(LiveStacks
const TargetRegisterClass * getCommonSubClass(const TargetRegisterClass *A, const TargetRegisterClass *B) const
const_iterator end() const
#define INITIALIZE_PASS_DEPENDENCY(depName)
const TargetRegisterClass * getIntervalRegClass(int Slot) const
const char * getName() const
#define INITIALIZE_PASS_END(passName, arg, name, cfg, analysis)
virtual void releaseMemory()
ID
LLVM Calling Convention Representation.
LiveInterval & getOrCreateInterval(int Slot, const TargetRegisterClass *RC)
SS2IntervalMap::const_iterator const_iterator
char & LiveStacksID
LiveStacks pass. An analysis keeping track of the liveness of stack slots.
virtual void print(raw_ostream &O, const Module *=0) const
print - Implement the dump method.
virtual void getAnalysisUsage(AnalysisUsage &AU) const
const TargetMachine & getTarget() const
virtual const TargetRegisterInfo * getRegisterInfo() const
const_iterator begin() const
static unsigned index2StackSlot(int FI)