16 #ifndef LLVM_CODEGEN_LIVESTACKANALYSIS_H
17 #define LLVM_CODEGEN_LIVESTACKANALYSIS_H
36 typedef std::map<int, LiveInterval> SS2IntervalMap;
37 SS2IntervalMap S2IMap;
40 std::map<int, const TargetRegisterClass*> S2RCMap;
60 assert(Slot >= 0 &&
"Spill slot indice must be >= 0");
61 SS2IntervalMap::iterator
I = S2IMap.find(Slot);
62 assert(I != S2IMap.end() &&
"Interval does not exist for stack slot");
67 assert(Slot >= 0 &&
"Spill slot indice must be >= 0");
68 SS2IntervalMap::const_iterator
I = S2IMap.find(Slot);
69 assert(I != S2IMap.end() &&
"Interval does not exist for stack slot");
74 return S2IMap.count(Slot);
78 assert(Slot >= 0 &&
"Spill slot indice must be >= 0");
79 std::map<int, const TargetRegisterClass*>::const_iterator
80 I = S2RCMap.find(Slot);
81 assert(I != S2RCMap.end() &&
82 "Register class info does not exist for stack slot");
static PassRegistry * getPassRegistry()
const LiveInterval & getInterval(int Slot) const
The main container class for the LLVM Intermediate Representation.
virtual bool runOnMachineFunction(MachineFunction &)
runOnMachineFunction - pass entry point
LiveInterval & getInterval(int Slot)
virtual void getAnalysisUsage(AnalysisUsage &AU) const
VNInfo::Allocator & getVNInfoAllocator()
const_iterator end() const
const TargetRegisterClass * getIntervalRegClass(int Slot) const
virtual void releaseMemory()
LiveInterval & getOrCreateInterval(int Slot, const TargetRegisterClass *RC)
SS2IntervalMap::const_iterator const_iterator
void initializeLiveStacksPass(PassRegistry &)
virtual void print(raw_ostream &O, const Module *=0) const
print - Implement the dump method.
bool hasInterval(int Slot) const
unsigned getNumIntervals() const
const_iterator begin() const
SS2IntervalMap::iterator iterator