29 Subtarget(TT, CPU, FS),
33 DL(
"E-p:64:64:64-i1:8:16-i8:8:16-i16:16-i32:32-i64:64"
34 "-f32:32-f64:64-f128:64-a0:8:16-n32:64"),
35 InstrInfo(*this), TLInfo(*this), TSInfo(*this),
36 FrameLowering(*this, Subtarget) {
48 return getTM<SystemZTargetMachine>();
53 virtual
bool addPreSched2() LLVM_OVERRIDE;
54 virtual
bool addPreEmitPass() LLVM_OVERRIDE;
58 void SystemZPassConfig::addIRPasses() {
63 bool SystemZPassConfig::addInstSelector() {
68 bool SystemZPassConfig::addPreSched2() {
69 if (getSystemZTargetMachine().getSubtargetImpl()->hasLoadStoreOnCond())
74 bool SystemZPassConfig::addPreEmitPass() {
107 return new SystemZPassConfig(
this, PM);
virtual void addIRPasses()
FunctionPass * createSystemZISelDag(SystemZTargetMachine &TM, CodeGenOpt::Level OptLevel)
FunctionPass * createSystemZShortenInstPass(SystemZTargetMachine &TM)
SystemZTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL)
FunctionPass * createSystemZLongBranchPass(SystemZTargetMachine &TM)
void LLVMInitializeSystemZTarget()
FunctionPass * createPartiallyInlineLibCallsPass()
char & IfConverterID
IfConverter - This pass performs machine code if conversion.
virtual TargetPassConfig * createPassConfig(PassManagerBase &PM) LLVM_OVERRIDE
FunctionPass * createSystemZElimComparePass(SystemZTargetMachine &TM)
static RegisterPass< NVPTXAllocaHoisting > X("alloca-hoisting","Hoisting alloca instructions in non-entry ""blocks to the entry block")