#include <HexagonMachineScheduler.h>

Public Member Functions
	VLIWResourceModel (const TargetMachine &TM, const TargetSchedModel *SM)

	~VLIWResourceModel ()

void	resetPacketState ()

void	resetDFA ()

void	reset ()

bool	isResourceAvailable (SUnit *SU)

bool	reserveResources (SUnit *SU)
	Keep track of available resources. More...

unsigned	getTotalPackets () const

Detailed Description

Definition at line 42 of file HexagonMachineScheduler.h.

Constructor & Destructor Documentation

llvm::VLIWResourceModel::VLIWResourceModel	(	const TargetMachine &	TM,
		const TargetSchedModel *	SM
	)

inline

Definition at line 58 of file HexagonMachineScheduler.h.

References llvm::DFAPacketizer::clearResources(), llvm::TargetInstrInfo::CreateTargetScheduleState(), llvm::TargetMachine::getInstrInfo(), and llvm::TargetSchedModel::getIssueWidth().

llvm::VLIWResourceModel::~VLIWResourceModel ( )

inline

Definition at line 71 of file HexagonMachineScheduler.h.

Member Function Documentation

unsigned llvm::VLIWResourceModel::getTotalPackets ( ) const

inline

Definition at line 90 of file HexagonMachineScheduler.h.

bool VLIWResourceModel::isResourceAvailable ( SUnit * SU )

Check if scheduling of this SU is possible in the current packet. It is not precise (statefull), it is more like another heuristic. Many corner cases are figured empirically.

Definition at line 43 of file HexagonMachineScheduler.cpp.

References llvm::DFAPacketizer::canReserveResources(), llvm::TargetOpcode::COPY, llvm::TargetOpcode::EXTRACT_SUBREG, llvm::SUnit::getInstr(), llvm::MachineInstr::getOpcode(), I, llvm::TargetOpcode::IMPLICIT_DEF, llvm::TargetOpcode::INLINEASM, llvm::TargetOpcode::INSERT_SUBREG, llvm::TargetOpcode::REG_SEQUENCE, and llvm::TargetOpcode::SUBREG_TO_REG.