llvm::PPC Namespace Reference

Define some predicates that are used for node matching. More...

Enumerations
enum	Fixups {   fixup_ppc_br24 = FirstTargetFixupKind, fixup_ppc_brcond14, fixup_ppc_br24abs, fixup_ppc_brcond14abs,   fixup_ppc_half16, fixup_ppc_half16ds, fixup_ppc_nofixup, LastTargetFixupKind,   NumTargetFixupKinds = LastTargetFixupKind - FirstTargetFixupKind }
enum	Predicate {   PRED_LT = (0 << 5) | 12, PRED_LE = (1 << 5) | 4, PRED_EQ = (2 << 5) | 12, PRED_GE = (0 << 5) | 4,   PRED_GT = (1 << 5) | 12, PRED_NE = (2 << 5) | 4, PRED_UN = (3 << 5) | 12, PRED_NU = (3 << 5) | 4,   PRED_LT_MINUS = (0 << 5) | 14, PRED_LE_MINUS = (1 << 5) | 6, PRED_EQ_MINUS = (2 << 5) | 14, PRED_GE_MINUS = (0 << 5) | 6,   PRED_GT_MINUS = (1 << 5) | 14, PRED_NE_MINUS = (2 << 5) | 6, PRED_UN_MINUS = (3 << 5) | 14, PRED_NU_MINUS = (3 << 5) | 6,   PRED_LT_PLUS = (0 << 5) | 15, PRED_LE_PLUS = (1 << 5) | 7, PRED_EQ_PLUS = (2 << 5) | 15, PRED_GE_PLUS = (0 << 5) | 7,   PRED_GT_PLUS = (1 << 5) | 15, PRED_NE_PLUS = (2 << 5) | 7, PRED_UN_PLUS = (3 << 5) | 15, PRED_NU_PLUS = (3 << 5) | 7 }
	Predicate - These are "(BI << 5) | BO" for various predicates. More...
enum	RelocationType {   reloc_vanilla, reloc_pcrel_bx, reloc_pcrel_bcx, reloc_absolute_high,   reloc_absolute_low, reloc_absolute_low_ix }
enum	{   DIR_NONE, DIR_32, DIR_440, DIR_601,   DIR_602, DIR_603, DIR_7400, DIR_750,   DIR_970, DIR_A2, DIR_E500mc, DIR_E5500,   DIR_PWR3, DIR_PWR4, DIR_PWR5, DIR_PWR5X,   DIR_PWR6, DIR_PWR6X, DIR_PWR7, DIR_64 }

Functions
Predicate	InvertPredicate (Predicate Opcode)
	Invert the specified predicate. != -> ==, < -> >=. More...
Predicate	getSwappedPredicate (Predicate Opcode)
bool	isVPKUHUMShuffleMask (ShuffleVectorSDNode *N, bool isUnary)
bool	isVPKUWUMShuffleMask (ShuffleVectorSDNode *N, bool isUnary)
bool	isVMRGLShuffleMask (ShuffleVectorSDNode *N, unsigned UnitSize, bool isUnary)
bool	isVMRGHShuffleMask (ShuffleVectorSDNode *N, unsigned UnitSize, bool isUnary)
int	isVSLDOIShuffleMask (SDNode *N, bool isUnary)
bool	isSplatShuffleMask (ShuffleVectorSDNode *N, unsigned EltSize)
bool	isAllNegativeZeroVector (SDNode *N)
unsigned	getVSPLTImmediate (SDNode *N, unsigned EltSize)
SDValue	get_VSPLTI_elt (SDNode *N, unsigned ByteSize, SelectionDAG &DAG)
FastISel *	createFastISel (FunctionLoweringInfo &FuncInfo, const TargetLibraryInfo *LibInfo)

Detailed Description

Define some predicates that are used for node matching.

Enumeration Type Documentation

anonymous enum

Enumerator
DIR_NONE
DIR_32
DIR_440
DIR_601
DIR_602
DIR_603
DIR_7400
DIR_750
DIR_970
DIR_A2
DIR_E500mc
DIR_E5500
DIR_PWR3
DIR_PWR4
DIR_PWR5
DIR_PWR5X
DIR_PWR6
DIR_PWR6X
DIR_PWR7
DIR_64

Definition at line 33 of file PPCSubtarget.h.

enum llvm::PPC::Fixups

Enumerator
fixup_ppc_br24
fixup_ppc_brcond14	fixup_ppc_brcond14 - 14-bit PC relative relocation for conditional branches.
fixup_ppc_br24abs	fixup_ppc_br24abs - 24-bit absolute relocation for direct branches like 'ba' and 'bla'.
fixup_ppc_brcond14abs	fixup_ppc_brcond14abs - 14-bit absolute relocation for conditional branches.
fixup_ppc_half16	fixup_ppc_half16 - A 16-bit fixup corresponding to lo16(_foo) or ha16(_foo) for instrs like 'li' or 'addis'.
fixup_ppc_half16ds	fixup_ppc_half16ds - A 14-bit fixup corresponding to lo16(_foo) with implied 2 zero bits for instrs like 'std'.
fixup_ppc_nofixup	fixup_ppc_nofixup - Not a true fixup, but ties a symbol to a call to __tls_get_addr for the TLS general and local dynamic models, or inserts the thread-pointer register number.
LastTargetFixupKind
NumTargetFixupKinds

Definition at line 19 of file PPCFixupKinds.h.

enum llvm::PPC::Predicate

Predicate - These are "(BI << 5) | BO" for various predicates.

Enumerator
PRED_LT
PRED_LE
PRED_EQ
PRED_GE
PRED_GT
PRED_NE
PRED_UN
PRED_NU
PRED_LT_MINUS
PRED_LE_MINUS
PRED_EQ_MINUS
PRED_GE_MINUS
PRED_GT_MINUS
PRED_NE_MINUS
PRED_UN_MINUS
PRED_NU_MINUS
PRED_LT_PLUS
PRED_LE_PLUS
PRED_EQ_PLUS
PRED_GE_PLUS
PRED_GT_PLUS
PRED_NE_PLUS
PRED_UN_PLUS
PRED_NU_PLUS

Definition at line 27 of file PPCPredicates.h.

enum llvm::PPC::RelocationType

Enumerator
reloc_vanilla
reloc_pcrel_bx
reloc_pcrel_bcx
reloc_absolute_high
reloc_absolute_low
reloc_absolute_low_ix

Definition at line 27 of file PPCRelocations.h.

Function Documentation

FastISel * llvm::PPC::createFastISel	(	FunctionLoweringInfo &	FuncInfo,
		const TargetLibraryInfo *	LibInfo
	)

Definition at line 2225 of file PPCFastISel.cpp.

References llvm::TargetMachine::getSubtarget(), llvm::MachineFunction::getTarget(), llvm::PPCSubtarget::isPPC64(), llvm::PPCSubtarget::isSVR4ABI(), llvm::FunctionLoweringInfo::MF, and llvm::SystemZISD::TM.

Referenced by llvm::PPCTargetLowering::createFastISel().

SDValue llvm::PPC::get_VSPLTI_elt	(	SDNode *	N,
		unsigned	ByteSize,
		SelectionDAG &	DAG
	)

get_VSPLTI_elt - If this is a build_vector of constants which can be formed by using a vspltis[bhw] instruction of the specified element size, return the constant being splatted. The ByteSize field indicates the number of bytes of each element [124] -> [bhw].

Definition at line 885 of file PPCISelLowering.cpp.

References llvm::MVT::f32, llvm::FloatToBits(), llvm::SDValue::getNode(), llvm::SDNode::getNumOperands(), llvm::SDValue::getOpcode(), llvm::SDNode::getOperand(), llvm::SelectionDAG::getTargetConstant(), llvm::MVT::i32, llvm::SignExtend32(), and llvm::ISD::UNDEF.

Predicate llvm::PPC::getSwappedPredicate

(

Predicate

Opcode

)

Assume the condition register is set by MI(a,b), return the predicate if we modify the instructions such that condition register is set by MI(b,a).

Referenced by llvm::PPCInstrInfo::optimizeCompareInstr(), and llvm::ICmpInst::swapOperands().

unsigned llvm::PPC::getVSPLTImmediate	(	SDNode *	N,
		unsigned	EltSize
	)

getVSPLTImmediate - Return the appropriate VSPLT* immediate to splat the specified isSplatShuffleMask VECTOR_SHUFFLE mask.

Definition at line 875 of file PPCISelLowering.cpp.

References llvm::ShuffleVectorSDNode::getMaskElt(), isSplatShuffleMask(), and N.

Predicate llvm::PPC::InvertPredicate

(

Predicate

Opcode

)

Invert the specified predicate. != -> ==, < -> >=.

Referenced by llvm::PPCInstrInfo::ReverseBranchCondition().

bool llvm::PPC::isAllNegativeZeroVector

(

SDNode *

N

)

isAllNegativeZeroVector - Returns true if all elements of build_vector are -0.0.

Definition at line 859 of file PPCISelLowering.cpp.

References llvm::SDNode::getOperand(), llvm::BuildVectorSDNode::isConstantSplat(), and N.

bool llvm::PPC::isSplatShuffleMask	(	ShuffleVectorSDNode *	N,
		unsigned	EltSize
	)

isSplatShuffleMask - Return true if the specified VECTOR_SHUFFLE operand specifies a splat of a single element that is suitable for input to VSPLTB/VSPLTH/VSPLTW.

Definition at line 830 of file PPCISelLowering.cpp.

References llvm::ShuffleVectorSDNode::getMaskElt(), llvm::SDNode::getValueType(), and llvm::MVT::v16i8.

Referenced by getVSPLTImmediate().

bool llvm::PPC::isVMRGHShuffleMask	(	ShuffleVectorSDNode *	N,
		unsigned	UnitSize,
		bool	isUnary
	)

isVMRGHShuffleMask - Return true if this is a shuffle mask suitable for a VRGH* instruction with the specified unit size (1,2 or 4 bytes).

Definition at line 784 of file PPCISelLowering.cpp.

References isVMerge().

bool llvm::PPC::isVMRGLShuffleMask	(	ShuffleVectorSDNode *	N,
		unsigned	UnitSize,
		bool	isUnary
	)

isVMRGLShuffleMask - Return true if this is a shuffle mask suitable for a VRGL* instruction with the specified unit size (1,2 or 4 bytes).

Definition at line 775 of file PPCISelLowering.cpp.

References isVMerge().

bool llvm::PPC::isVPKUHUMShuffleMask	(	ShuffleVectorSDNode *	N,
		bool	isUnary
	)

isVPKUHUMShuffleMask - Return true if this is the shuffle mask for a VPKUHUM instruction.

Definition at line 720 of file PPCISelLowering.cpp.

References llvm::ShuffleVectorSDNode::getMaskElt(), and isConstantOrUndef().

bool llvm::PPC::isVPKUWUMShuffleMask	(	ShuffleVectorSDNode *	N,
		bool	isUnary
	)

isVPKUWUMShuffleMask - Return true if this is the shuffle mask for a VPKUWUM instruction.

Definition at line 736 of file PPCISelLowering.cpp.

References llvm::ShuffleVectorSDNode::getMaskElt(), and isConstantOrUndef().

int llvm::PPC::isVSLDOIShuffleMask	(	SDNode *	N,
		bool	isUnary
	)

isVSLDOIShuffleMask - If this is a vsldoi shuffle mask, return the shift amount, otherwise return -1.

Definition at line 794 of file PPCISelLowering.cpp.

References llvm::ShuffleVectorSDNode::getMaskElt(), llvm::SDNode::getValueType(), isConstantOrUndef(), N, and llvm::MVT::v16i8.