29 : CallingConv(CC), IsVarArg(isVarArg), MF(mf),
TM(tm),
30 TRI(*
TM.getRegisterInfo()), Locs(locs), Context(C),
48 if (MinSize > (
int)Size)
50 if (MinAlign > (
int)Align)
59 void CCState::MarkAllocated(
unsigned Reg) {
61 UsedRegs[*AI/32] |= 1 << (*AI&31);
69 unsigned NumArgs = Ins.
size();
71 for (
unsigned i = 0; i != NumArgs; ++i) {
72 MVT ArgVT = Ins[i].VT;
76 dbgs() <<
"Formal argument #" << i <<
" has unhandled type "
89 for (
unsigned i = 0, e = Outs.
size(); i != e; ++i) {
103 for (
unsigned i = 0, e = Outs.
size(); i != e; ++i) {
108 dbgs() <<
"Return operand #" << i <<
" has unhandled type "
120 unsigned NumOps = Outs.
size();
121 for (
unsigned i = 0; i != NumOps; ++i) {
122 MVT ArgVT = Outs[i].VT;
126 dbgs() <<
"Call operand #" << i <<
" has unhandled type "
139 unsigned NumOps = ArgVTs.
size();
140 for (
unsigned i = 0; i != NumOps; ++i) {
141 MVT ArgVT = ArgVTs[i];
145 dbgs() <<
"Call operand #" << i <<
" has unhandled type "
157 for (
unsigned i = 0, e = Ins.
size(); i != e; ++i) {
162 dbgs() <<
"Call result #" << i <<
" has unhandled type "
175 dbgs() <<
"Call result has unhandled type "
void AnalyzeCallResult(const SmallVectorImpl< ISD::InputArg > &Ins, CCAssignFn Fn)
virtual const TargetLowering * getTargetLowering() const
void AnalyzeFormalArguments(const SmallVectorImpl< ISD::InputArg > &Ins, CCAssignFn Fn)
bool CCAssignFn(unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, CCState &State)
unsigned getByValSize() const
bool CheckReturn(const SmallVectorImpl< ISD::OutputArg > &ArgsFlags, CCAssignFn Fn)
virtual void HandleByVal(CCState *, unsigned &, unsigned) const
Target-specific cleanup for formal ByVal parameters.
std::string getEVTString() const
getEVTString - This function returns value type as a string, e.g. "i32".
#define llvm_unreachable(msg)
void addLoc(const CCValAssign &V)
ID
LLVM Calling Convention Representation.
unsigned getNumRegs() const
Return the number of registers this target has (useful for sizing arrays holding per register informa...
CCState(CallingConv::ID CC, bool isVarArg, MachineFunction &MF, const TargetMachine &TM, SmallVectorImpl< CCValAssign > &locs, LLVMContext &C)
void HandleByVal(unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, int MinSize, int MinAlign, ISD::ArgFlagsTy ArgFlags)
unsigned getByValAlign() const
MachineFrameInfo * getFrameInfo()
raw_ostream & dbgs()
dbgs - Return a circular-buffered debug stream.
void AnalyzeCallOperands(const SmallVectorImpl< ISD::OutputArg > &Outs, CCAssignFn Fn)
static cl::opt< AlignMode > Align(cl::desc("Load/store alignment support"), cl::Hidden, cl::init(DefaultAlign), cl::values(clEnumValN(DefaultAlign,"arm-default-align","Generate unaligned accesses only on hardware/OS ""combinations that are known to support them"), clEnumValN(StrictAlign,"arm-strict-align","Disallow all unaligned memory accesses"), clEnumValN(NoStrictAlign,"arm-no-strict-align","Allow unaligned memory accesses"), clEnumValEnd))
uint64_t MinAlign(uint64_t A, uint64_t B)
void ensureMaxAlignment(unsigned Align)
void AnalyzeReturn(const SmallVectorImpl< ISD::OutputArg > &Outs, CCAssignFn Fn)
static CCValAssign getMem(unsigned ValNo, MVT ValVT, unsigned Offset, MVT LocVT, LocInfo HTP)
void clearByValRegsInfo()
unsigned AllocateStack(unsigned Size, unsigned Align)