ARMSubtarget.cpp File Reference

#include "ARMSubtarget.h"
#include "ARMBaseInstrInfo.h"
#include "ARMBaseRegisterInfo.h"
#include "llvm/IR/Attributes.h"
#include "llvm/IR/GlobalValue.h"
#include "llvm/IR/Function.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetOptions.h"
#include "ARMGenSubtargetInfo.inc"

Include dependency graph for ARMSubtarget.cpp:

Go to the source code of this file.

Macros
#define	GET_SUBTARGETINFO_TARGET_DESC
#define	GET_SUBTARGETINFO_CTOR

Enumerations
enum	AlignMode { DefaultAlign, StrictAlign, NoStrictAlign }
enum	ITMode { DefaultIT, RestrictedIT, NoRestrictedIT }

Functions
static cl::opt< AlignMode >	Align (cl::desc("Load/store alignment support"), cl::Hidden, cl::init(DefaultAlign), cl::values(clEnumValN(DefaultAlign,"arm-default-align","Generate unaligned accesses only on hardware/OS ""combinations that are known to support them"), clEnumValN(StrictAlign,"arm-strict-align","Disallow all unaligned memory accesses"), clEnumValN(NoStrictAlign,"arm-no-strict-align","Allow unaligned memory accesses"), clEnumValEnd))
static cl::opt< ITMode >	IT (cl::desc("IT block support"), cl::Hidden, cl::init(DefaultIT), cl::ZeroOrMore, cl::values(clEnumValN(DefaultIT,"arm-default-it","Generate IT block based on arch"), clEnumValN(RestrictedIT,"arm-restrict-it","Disallow deprecated IT based on ARMv8"), clEnumValN(NoRestrictedIT,"arm-no-restrict-it","Allow IT blocks based on ARMv7"), clEnumValEnd))

Variables
static cl::opt< bool >	ReserveR9 ("arm-reserve-r9", cl::Hidden, cl::desc("Reserve R9, making it unavailable as GPR"))
static cl::opt< bool >	ArmUseMOVT ("arm-use-movt", cl::init(true), cl::Hidden)
static cl::opt< bool >	UseFusedMulOps ("arm-use-mulops", cl::init(true), cl::Hidden)

Macro Definition Documentation

#define GET_SUBTARGETINFO_CTOR

Definition at line 25 of file ARMSubtarget.cpp.

#define GET_SUBTARGETINFO_TARGET_DESC

Definition at line 24 of file ARMSubtarget.cpp.

Enumeration Type Documentation

enum AlignMode

Enumerator
DefaultAlign
StrictAlign
NoStrictAlign

Definition at line 41 of file ARMSubtarget.cpp.

enum ITMode

Enumerator
DefaultIT
RestrictedIT
NoRestrictedIT

Definition at line 60 of file ARMSubtarget.cpp.

Function Documentation

static cl::opt<AlignMode> Align ( cl::  desc"Load/store alignment support", cl::Hidden  , cl::  initDefaultAlign, cl::  valuesclEnumValN(DefaultAlign,"arm-default-align","Generate unaligned accesses only on hardware/OS ""combinations that are known to support them"), clEnumValN(StrictAlign,"arm-strict-align","Disallow all unaligned memory accesses"), clEnumValN(NoStrictAlign,"arm-no-strict-align","Allow unaligned memory accesses"), clEnumValEnd  )

static

Referenced by llvm::AttrBuilder::addAlignmentAttr(), llvm::AttrBuilder::addStackAlignmentAttr(), AdjustStackOffset(), llvm::Recycler< llvm::MachineInstr >::Allocate(), llvm::ArrayRecycler< llvm::MachineOperand >::allocate(), llvm::MCContext::Allocate(), clampStackAlignment(), llvm::ComputeMaskedBits(), llvm::SelectionDAG::ComputeMaskedBits(), llvm::MachineFrameInfo::CreateFixedObject(), llvm::SelectionDAG::CreateStackTemporary(), llvm::XCoreFrameLowering::eliminateCallFramePseudoInstr(), llvm::Thumb1FrameLowering::eliminateCallFramePseudoInstr(), llvm::AArch64FrameLowering::eliminateCallFramePseudoInstr(), llvm::RuntimeDyldImpl::emitCommonSymbols(), llvm::AsmPrinter::EmitConstantPool(), llvm::Thumb1FrameLowering::emitEpilogue(), llvm::ARMFrameLowering::emitEpilogue(), llvm::AsmPrinter::EmitGlobalVariable(), llvm::Thumb1FrameLowering::emitPrologue(), llvm::ARMFrameLowering::emitPrologue(), llvm::X86SelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::X86SelectionDAGInfo::EmitTargetCodeForMemset(), enforceKnownAlignment(), llvm::MachineFrameInfo::ensureMaxAlignment(), llvm::MachineFrameInfo::estimateStackSize(), FindMemType(), fixupFuncForFI(), llvm::ARMFunctionInfo::getArgRegsSaveSize(), llvm::PPCTargetLowering::getByValTypeAlignment(), llvm::X86TargetLowering::getByValTypeAlignment(), llvm::SelectionDAG::getMemcpy(), getMemcpyLoadsAndStores(), llvm::SelectionDAG::getMemIntrinsicNode(), llvm::SelectionDAG::getMemmove(), getMemmoveLoadsAndStores(), llvm::MipsInstrInfo::GetMemOperand(), llvm::SelectionDAG::getMemset(), getMemsetStores(), llvm::getOrEnforceKnownAlignment(), llvm::object::MachOObjectFile::getSectionAlignment(), llvm::SelectionDAG::getTargetConstantPool(), llvm::Attribute::getWithAlignment(), llvm::Attribute::getWithStackAlignment(), llvm::Hexagon_CCState::HandleByVal(), llvm::CCState::HandleByVal(), HandleByValArgument(), llvm::SelectionDAG::InferPtrAlignment(), llvm::isSafeToLoadUnconditionally(), llvm::RuntimeDyldImpl::loadObject(), llvm::AArch64InstrInfo::loadRegFromStackSlot(), llvm::HexagonInstrInfo::loadRegFromStackSlot(), llvm::ARMBaseInstrInfo::loadRegFromStackSlot(), llvm::SparcTargetLowering::LowerCall_32(), llvm::SelectionDAGBuilder::LowerCallTo(), memsetStore(), llvm::Recycler< llvm::MachineInstr >::PrintStats(), llvm::RoundUpToAlignment(), llvm::TargetLoweringObjectFileELF::SelectSectionForGlobal(), llvm::FunctionLoweringInfo::set(), llvm::MachineBasicBlock::setAlignment(), llvm::MCSymbolData::setCommon(), llvm::TargetLoweringBase::setJumpBufAlignment(), llvm::MachineFrameInfo::setLocalFrameMaxAlign(), llvm::TargetLoweringBase::setMinFunctionAlignment(), llvm::TargetLoweringBase::setMinStackArgumentAlignment(), llvm::MachineFrameInfo::setObjectAlignment(), llvm::TargetLoweringBase::setPrefFunctionAlignment(), llvm::TargetLoweringBase::setPrefLoopAlignment(), speculatePHINodeLoads(), llvm::AArch64InstrInfo::storeRegToStackSlot(), llvm::HexagonInstrInfo::storeRegToStackSlot(), llvm::ARMBaseInstrInfo::storeRegToStackSlot(), tryToMakeAllocaBePromotable(), llvm::InstCombiner::visitLoadInst(), llvm::SelectionDAGBuilder::visitSPDescriptorParent(), and llvm::MachObjectWriter::WriteNlist().

static cl::opt<ITMode> IT ( cl::  desc"IT block support", cl::Hidden  , cl::  initDefaultIT, cl::ZeroOrMore  , cl::  valuesclEnumValN(DefaultIT,"arm-default-it","Generate IT block based on arch"), clEnumValN(RestrictedIT,"arm-restrict-it","Disallow deprecated IT based on ARMv8"), clEnumValN(NoRestrictedIT,"arm-no-restrict-it","Allow IT blocks based on ARMv7"), clEnumValEnd  )

static

Referenced by FindInitTrampoline(), FoldBitCast(), llvm::ConstantDataSequential::isElementTypeCompatible(), LLVMGetTargetFromName(), llvm::iplist< Argument >::remove(), llvm::InstCombiner::visitAdd(), and llvm::InstCombiner::visitCallInst().

Variable Documentation

cl::opt<bool> ArmUseMOVT("arm-use-movt", cl::init(true), cl::Hidden)

static

cl::opt<bool> ReserveR9("arm-reserve-r9", cl::Hidden, cl::desc("Reserve R9, making it unavailable as GPR"))

static

cl::opt<bool> UseFusedMulOps("arm-use-mulops", cl::init(true), cl::Hidden)

static