15 #ifndef LLVM_CODEGEN_CALLINGCONVLOWER_H
16 #define LLVM_CODEGEN_CALLINGCONVLOWER_H
26 class TargetRegisterInfo;
56 unsigned isCustom : 1;
69 unsigned RegNo,
MVT LocVT,
83 unsigned RegNo,
MVT LocVT,
86 Ret =
getReg(ValNo, ValVT, RegNo, LocVT, HTP);
92 unsigned Offset,
MVT LocVT,
106 unsigned Offset,
MVT LocVT,
109 Ret =
getMem(ValNo, ValVT, Offset, LocVT, HTP);
164 unsigned StackOffset;
197 ByValInfo(
unsigned B,
unsigned E,
bool IsWaste =
false) :
198 Begin(B), End(E), Waste(IsWaste) {}
215 unsigned InRegsParamsProceed;
240 return UsedRegs[Reg/32] & (1 << (Reg&31));
282 for (
unsigned i = 0; i != NumRegs; ++i)
301 MarkAllocated(ShadowReg);
310 if (FirstUnalloc == NumRegs)
314 unsigned Reg = Regs[FirstUnalloc];
320 unsigned AllocateReg(
const uint16_t *Regs,
const uint16_t *ShadowRegs,
323 if (FirstUnalloc == NumRegs)
327 unsigned Reg = Regs[FirstUnalloc], ShadowReg = ShadowRegs[FirstUnalloc];
329 MarkAllocated(ShadowReg);
336 assert(Align && ((Align-1) & Align) == 0);
337 StackOffset = ((StackOffset + Align-1) & ~(Align-1));
338 unsigned Result = StackOffset;
346 MarkAllocated(ShadowReg);
367 unsigned& BeginReg,
unsigned& EndReg)
const {
368 assert(InRegsParamRecordIndex < ByValRegs.
size() &&
369 "Wrong ByVal parameter index");
371 const ByValInfo&
info = ByValRegs[InRegsParamRecordIndex];
372 BeginReg = info.Begin;
378 ByValRegs.
push_back(ByValInfo(RegBegin, RegEnd));
385 unsigned e = ByValRegs.
size();
386 if (InRegsParamsProceed < e)
387 ++InRegsParamsProceed;
388 return InRegsParamsProceed < e;
393 InRegsParamsProceed = 0;
401 void MarkAllocated(
unsigned Reg);
void AnalyzeCallResult(const SmallVectorImpl< ISD::InputArg > &Ins, CCAssignFn Fn)
void push_back(const T &Elt)
static CCValAssign getCustomReg(unsigned ValNo, MVT ValVT, unsigned RegNo, MVT LocVT, LocInfo HTP)
LocInfo getLocInfo() const
void getInRegsParamInfo(unsigned InRegsParamRecordIndex, unsigned &BeginReg, unsigned &EndReg) const
void AnalyzeFormalArguments(const SmallVectorImpl< ISD::InputArg > &Ins, CCAssignFn Fn)
CallingConv::ID getCallingConv() const
bool CCAssignFn(unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, CCState &State)
unsigned getInRegsParamsCount() const
bool CheckReturn(const SmallVectorImpl< ISD::OutputArg > &ArgsFlags, CCAssignFn Fn)
unsigned getValNo() const
LLVMContext & getContext() const
unsigned AllocateReg(unsigned Reg, unsigned ShadowReg)
Version of AllocateReg with extra register to be shadowed.
bool CCCustomFn(unsigned &ValNo, MVT &ValVT, MVT &LocVT, CCValAssign::LocInfo &LocInfo, ISD::ArgFlagsTy &ArgFlags, CCState &State)
ParmContext getCallOrPrologue() const
void addLoc(const CCValAssign &V)
ID
LLVM Calling Convention Representation.
const TargetMachine & getTarget() const
MachineFunction & getMachineFunction() const
unsigned getLocReg() const
void addInRegsParamInfo(unsigned RegBegin, unsigned RegEnd)
static CCValAssign getReg(unsigned ValNo, MVT ValVT, unsigned RegNo, MVT LocVT, LocInfo HTP)
CCState(CallingConv::ID CC, bool isVarArg, MachineFunction &MF, const TargetMachine &TM, SmallVectorImpl< CCValAssign > &locs, LLVMContext &C)
unsigned getNextStackOffset() const
unsigned getFirstUnallocated(const uint16_t *Regs, unsigned NumRegs) const
void HandleByVal(unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, int MinSize, int MinAlign, ISD::ArgFlagsTy ArgFlags)
unsigned AllocateReg(const uint16_t *Regs, unsigned NumRegs)
CCValAssign - Represent assignment of one arg/retval to a location.
unsigned getInRegsParamsProceed() const
MachineFrameInfo * getFrameInfo()
unsigned AllocateReg(const uint16_t *Regs, const uint16_t *ShadowRegs, unsigned NumRegs)
Version of AllocateReg with list of registers to be shadowed.
unsigned AllocateStack(unsigned Size, unsigned Align, unsigned ShadowReg)
Version of AllocateStack with extra register to be shadowed.
void AnalyzeCallOperands(const SmallVectorImpl< ISD::OutputArg > &Outs, CCAssignFn Fn)
static cl::opt< AlignMode > Align(cl::desc("Load/store alignment support"), cl::Hidden, cl::init(DefaultAlign), cl::values(clEnumValN(DefaultAlign,"arm-default-align","Generate unaligned accesses only on hardware/OS ""combinations that are known to support them"), clEnumValN(StrictAlign,"arm-strict-align","Disallow all unaligned memory accesses"), clEnumValN(NoStrictAlign,"arm-no-strict-align","Allow unaligned memory accesses"), clEnumValEnd))
uint64_t MinAlign(uint64_t A, uint64_t B)
void ensureMaxAlignment(unsigned Align)
static CCValAssign getCustomMem(unsigned ValNo, MVT ValVT, unsigned Offset, MVT LocVT, LocInfo HTP)
void AnalyzeReturn(const SmallVectorImpl< ISD::OutputArg > &Outs, CCAssignFn Fn)
bool isAllocated(unsigned Reg) const
ParmContext CallOrPrologue
static CCValAssign getMem(unsigned ValNo, MVT ValVT, unsigned Offset, MVT LocVT, LocInfo HTP)
void clearByValRegsInfo()
unsigned getLocMemOffset() const
unsigned AllocateReg(unsigned Reg)
unsigned AllocateStack(unsigned Size, unsigned Align)