33 void DAGTypeLegalizer::ExpandRes_MERGE_VALUES(
SDNode *
N,
unsigned ResNo,
35 SDValue Op = DisintegrateMERGE_VALUES(N, ResNo);
36 GetExpandedOp(Op, Lo, Hi);
47 switch (getTypeAction(InVT)) {
53 SplitInteger(GetSoftenedFloat(InOp), Lo, Hi);
60 GetExpandedOp(InOp, Lo, Hi);
65 GetSplitVector(InOp, Lo, Hi);
73 SplitInteger(BitConvertToInteger(GetScalarizedVector(InOp)), Lo, Hi);
79 InOp = GetWidenedVector(InOp);
94 unsigned NumElems = 2;
99 while (!isTypeLegal(NVT)) {
102 if (NewSizeInBits < 8)
109 if (isTypeLegal(NVT)) {
113 for (
unsigned i = 0; i < NumElems; ++i)
120 for (
unsigned e = Vals.
size(); e - Slot > 2; Slot += 2, e += 1) {
146 assert(NOutVT.
isByteSized() &&
"Expanded type not byte sized!");
154 int SPFI = cast<FrameIndexSDNode>(StackPtr.
getNode())->getIndex();
162 Lo = DAG.
getLoad(NOutVT, dl, Store, StackPtr, PtrInfo,
163 false,
false,
false, 0);
167 StackPtr = DAG.
getNode(
ISD::ADD, dl, StackPtr.getValueType(), StackPtr,
169 StackPtr.getValueType()));
172 Hi = DAG.
getLoad(NOutVT, dl, Store, StackPtr,
173 PtrInfo.getWithOffset(IncrementSize),
false,
174 false,
false,
MinAlign(Alignment, IncrementSize));
181 void DAGTypeLegalizer::ExpandRes_BUILD_PAIR(
SDNode *N,
SDValue &Lo,
188 void DAGTypeLegalizer::ExpandRes_EXTRACT_ELEMENT(
SDNode *N,
SDValue &Lo,
195 "Type twice as big as expanded type not itself expanded!");
197 GetPairElements(Part, Lo, Hi);
200 void DAGTypeLegalizer::ExpandRes_EXTRACT_VECTOR_ELT(
SDNode *N,
SDValue &Lo,
212 if (OldVT != OldEltVT) {
216 assert(OldEltVT.
bitsLT(OldVT) &&
"Result type smaller then element type!");
240 void DAGTypeLegalizer::ExpandRes_NormalLoad(
SDNode *N,
SDValue &Lo,
255 assert(NVT.isByteSized() &&
"Expanded type not byte sized!");
258 isVolatile, isNonTemporal, isInvariant, Alignment,
262 unsigned IncrementSize = NVT.getSizeInBits() / 8;
265 Hi = DAG.
getLoad(NVT, dl, Chain, Ptr,
267 isVolatile, isNonTemporal, isInvariant,
268 MinAlign(Alignment, IncrementSize), TBAAInfo);
281 ReplaceValueWith(
SDValue(N, 1), Chain);
309 void DAGTypeLegalizer::IntegerToVector(
SDValue Op,
unsigned NumElements,
316 if (NumElements > 1) {
318 SplitInteger(Op, Parts[0], Parts[1]);
321 IntegerToVector(Parts[0], NumElements, Ops, EltVT);
322 IntegerToVector(Parts[1], NumElements, Ops, EltVT);
340 unsigned NumElts = 2;
345 if (!isTypeLegal(NVT)) {
372 "BUILD_VECTOR operand type doesn't match vector element type!");
376 std::vector<SDValue> NewElts;
377 NewElts.reserve(NumElts*2);
379 for (
unsigned i = 0; i < NumElts; ++i) {
384 NewElts.push_back(Lo);
385 NewElts.push_back(Hi);
390 NewVT, NewElts.size()),
391 &NewElts[0], NewElts.size());
397 SDValue DAGTypeLegalizer::ExpandOp_EXTRACT_ELEMENT(
SDNode *N) {
400 return cast<ConstantSDNode>(N->
getOperand(1))->getZExtValue() ? Hi :
Lo;
403 SDValue DAGTypeLegalizer::ExpandOp_INSERT_VECTOR_ELT(
SDNode *N) {
414 "Inserted element type doesn't match vector element type!");
423 GetExpandedOp(Val, Lo, Hi);
439 SDValue DAGTypeLegalizer::ExpandOp_SCALAR_TO_VECTOR(
SDNode *N) {
443 "SCALAR_TO_VECTOR operand type doesn't match vector element type!");
448 for (
unsigned i = 1; i < NumElts; ++i)
453 SDValue DAGTypeLegalizer::ExpandOp_NormalStore(
SDNode *N,
unsigned OpNo) {
455 assert(OpNo == 1 &&
"Can only expand the stored value so far");
468 assert(NVT.isByteSized() &&
"Expanded type not byte sized!");
469 unsigned IncrementSize = NVT.getSizeInBits() / 8;
478 isVolatile, isNonTemporal, Alignment, TBAAInfo);
482 Hi = DAG.
getStore(Chain, dl, Hi, Ptr,
484 isVolatile, isNonTemporal,
485 MinAlign(Alignment, IncrementSize), TBAAInfo);
500 void DAGTypeLegalizer::SplitRes_MERGE_VALUES(
SDNode *N,
unsigned ResNo,
502 SDValue Op = DisintegrateMERGE_VALUES(N, ResNo);
503 GetSplitOp(Op, Lo, Hi);
506 void DAGTypeLegalizer::SplitRes_SELECT(
SDNode *N,
SDValue &Lo,
508 SDValue LL, LH, RL, RH, CL, CH;
515 if (Cond.getValueType().isVector()) {
519 GetSplitVector(Cond, CL, CH);
528 void DAGTypeLegalizer::SplitRes_SELECT_CC(
SDNode *N,
SDValue &Lo,
void push_back(const T &Elt)
SDValue getConstant(uint64_t Val, EVT VT, bool isTarget=false)
SDValue getValue(unsigned R) const
LLVMContext * getContext() const
SDValue getVAArg(EVT VT, SDLoc dl, SDValue Chain, SDValue Ptr, SDValue SV, unsigned Align)
unsigned getPrefTypeAlignment(Type *Ty) const
std::pair< EVT, EVT > GetSplitDestVTs(const EVT &VT) const
unsigned getOpcode() const
MDNode - a tuple of other values.
const SDValue & getOperand(unsigned Num) const
const SDValue & getBasePtr() const
bool bitsLT(EVT VT) const
bitsLT - Return true if this has less bits than VT.
static MachinePointerInfo getFixedStack(int FI, int64_t offset=0)
SDValue getLoad(EVT VT, SDLoc dl, SDValue Chain, SDValue Ptr, MachinePointerInfo PtrInfo, bool isVolatile, bool isNonTemporal, bool isInvariant, unsigned Alignment, const MDNode *TBAAInfo=0, const MDNode *Ranges=0)
bool isVector() const
isVector - Return true if this is a vector value type.
SDValue getStore(SDValue Chain, SDLoc dl, SDValue Val, SDValue Ptr, MachinePointerInfo PtrInfo, bool isVolatile, bool isNonTemporal, unsigned Alignment, const MDNode *TBAAInfo=0)
bool isNormalStore(const SDNode *N)
EVT getValueType(unsigned ResNo) const
MachinePointerInfo getWithOffset(int64_t O) const
bool isInteger() const
isInteger - Return true if this is an integer, or a vector integer type.
EVT getVectorElementType() const
Simple integer binary arithmetic operators.
const SDValue & getBasePtr() const
SDValue getUNDEF(EVT VT)
getUNDEF - Return an UNDEF node. UNDEF does not have a useful SDLoc.
virtual MVT getVectorIdxTy() const
SDNode * getNode() const
get the SDNode which holds the desired result
bool isNormalLoad(const SDNode *N)
bool isNonTemporal() const
const DataLayout * getDataLayout() const
const SDValue & getValue() const
static EVT getVectorVT(LLVMContext &Context, EVT VT, unsigned NumElements)
uint64_t getConstantOperandVal(unsigned Num) const
SDValue CreateStackTemporary(EVT VT, unsigned minAlign=1)
const MachinePointerInfo & getPointerInfo() const
std::pair< SDValue, SDValue > SplitVector(const SDValue &N, const SDLoc &DL, const EVT &LoVT, const EVT &HiVT)
const SDValue & getChain() const
void swap(llvm::BitVector &LHS, llvm::BitVector &RHS)
Implement std::swap in terms of BitVector swap.
const MDNode * getTBAAInfo() const
Returns the TBAAInfo that describes the dereference.
SDValue getNode(unsigned Opcode, SDLoc DL, EVT VT)
ANY_EXTEND - Used for integer types. The high bits are undefined.
static cl::opt< AlignMode > Align(cl::desc("Load/store alignment support"), cl::Hidden, cl::init(DefaultAlign), cl::values(clEnumValN(DefaultAlign,"arm-default-align","Generate unaligned accesses only on hardware/OS ""combinations that are known to support them"), clEnumValN(StrictAlign,"arm-strict-align","Disallow all unaligned memory accesses"), clEnumValN(NoStrictAlign,"arm-no-strict-align","Allow unaligned memory accesses"), clEnumValEnd))
uint64_t MinAlign(uint64_t A, uint64_t B)
unsigned getSizeInBits() const
getSizeInBits - Return the size of the specified value type in bits.
bool isByteSized() const
isByteSized - Return true if the bit size is a multiple of 8.
EVT getTypeToTransformTo(LLVMContext &Context, EVT VT) const
SDValue getEntryNode() const
unsigned getAlignment() const
tier< T1, T2 > tie(T1 &f, T2 &s)
static EVT getIntegerVT(LLVMContext &Context, unsigned BitWidth)
unsigned getVectorNumElements() const