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llvm::TargetLoweringBase Class Reference

#include <TargetLowering.h>

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Classes

struct  AddrMode
 
struct  IntrinsicInfo
 
class  ValueTypeActionImpl
 

Public Types

enum  LegalizeAction { Legal, Promote, Expand, Custom }
 
enum  LegalizeTypeAction {
  TypeLegal, TypePromoteInteger, TypeExpandInteger, TypeSoftenFloat,
  TypeExpandFloat, TypeScalarizeVector, TypeSplitVector, TypeWidenVector
}
 
enum  BooleanContent { UndefinedBooleanContent, ZeroOrOneBooleanContent, ZeroOrNegativeOneBooleanContent }
 Enum that describes how the target represents true/false values. More...
 
enum  SelectSupportKind { ScalarValSelect, ScalarCondVectorVal, VectorMaskSelect }
 Enum that describes what type of support for selects the target has. More...
 
typedef std::pair
< LegalizeTypeAction, EVT
LegalizeKind
 

Public Member Functions

 TargetLoweringBase (const TargetMachine &TM, const TargetLoweringObjectFile *TLOF)
 NOTE: The constructor takes ownership of TLOF. More...
 
virtual ~TargetLoweringBase ()
 
const TargetMachinegetTargetMachine () const
 
const DataLayoutgetDataLayout () const
 
const TargetLoweringObjectFilegetObjFileLowering () const
 
bool isBigEndian () const
 
bool isLittleEndian () const
 
virtual MVT getPointerTy (uint32_t=0) const
 
unsigned getPointerSizeInBits (uint32_t AS=0) const
 
unsigned getPointerTypeSizeInBits (Type *Ty) const
 
virtual MVT getScalarShiftAmountTy (EVT LHSTy) const
 
EVT getShiftAmountTy (EVT LHSTy) const
 
virtual MVT getVectorIdxTy () const
 
bool isSelectExpensive () const
 Return true if the select operation is expensive for this target. More...
 
virtual bool isSelectSupported (SelectSupportKind) const
 
virtual bool shouldSplitVectorElementType (EVT) const
 
bool isIntDivCheap () const
 
bool isSlowDivBypassed () const
 Returns true if target has indicated at least one type should be bypassed. More...
 
const DenseMap< unsigned int,
unsigned int > & 
getBypassSlowDivWidths () const
 
bool isPow2DivCheap () const
 Return true if pow2 div is cheaper than a chain of srl/add/sra. More...
 
bool isJumpExpensive () const
 
bool isPredictableSelectExpensive () const
 
virtual bool isLoadBitCastBeneficial (EVT, EVT) const
 
virtual EVT getSetCCResultType (LLVMContext &Context, EVT VT) const
 
virtual MVT::SimpleValueType getCmpLibcallReturnType () const
 
BooleanContent getBooleanContents (bool isVec) const
 
Sched::Preference getSchedulingPreference () const
 Return target scheduling preference. More...
 
virtual Sched::Preference getSchedulingPreference (SDNode *) const
 
virtual const TargetRegisterClassgetRegClassFor (MVT VT) const
 
virtual const TargetRegisterClassgetRepRegClassFor (MVT VT) const
 
virtual uint8_t getRepRegClassCostFor (MVT VT) const
 
bool isTypeLegal (EVT VT) const
 
const ValueTypeActionImplgetValueTypeActions () const
 
LegalizeTypeAction getTypeAction (LLVMContext &Context, EVT VT) const
 
LegalizeTypeAction getTypeAction (MVT VT) const
 
EVT getTypeToTransformTo (LLVMContext &Context, EVT VT) const
 
EVT getTypeToExpandTo (LLVMContext &Context, EVT VT) const
 
unsigned getVectorTypeBreakdown (LLVMContext &Context, EVT VT, EVT &IntermediateVT, unsigned &NumIntermediates, MVT &RegisterVT) const
 
virtual bool getTgtMemIntrinsic (IntrinsicInfo &, const CallInst &, unsigned) const
 
virtual bool isFPImmLegal (const APFloat &, EVT) const
 
virtual bool isShuffleMaskLegal (const SmallVectorImpl< int > &, EVT) const
 
virtual bool canOpTrap (unsigned Op, EVT VT) const
 
virtual bool isVectorClearMaskLegal (const SmallVectorImpl< int > &, EVT) const
 
LegalizeAction getOperationAction (unsigned Op, EVT VT) const
 
bool isOperationLegalOrCustom (unsigned Op, EVT VT) const
 
bool isOperationLegalOrPromote (unsigned Op, EVT VT) const
 
bool isOperationExpand (unsigned Op, EVT VT) const
 
bool isOperationLegal (unsigned Op, EVT VT) const
 Return true if the specified operation is legal on this target. More...
 
LegalizeAction getLoadExtAction (unsigned ExtType, MVT VT) const
 
bool isLoadExtLegal (unsigned ExtType, EVT VT) const
 Return true if the specified load with extension is legal on this target. More...
 
LegalizeAction getTruncStoreAction (MVT ValVT, MVT MemVT) const
 
bool isTruncStoreLegal (EVT ValVT, EVT MemVT) const
 
LegalizeAction getIndexedLoadAction (unsigned IdxMode, MVT VT) const
 
bool isIndexedLoadLegal (unsigned IdxMode, EVT VT) const
 Return true if the specified indexed load is legal on this target. More...
 
LegalizeAction getIndexedStoreAction (unsigned IdxMode, MVT VT) const
 
bool isIndexedStoreLegal (unsigned IdxMode, EVT VT) const
 Return true if the specified indexed load is legal on this target. More...
 
LegalizeAction getCondCodeAction (ISD::CondCode CC, MVT VT) const
 
bool isCondCodeLegal (ISD::CondCode CC, MVT VT) const
 Return true if the specified condition code is legal on this target. More...
 
MVT getTypeToPromoteTo (unsigned Op, MVT VT) const
 
EVT getValueType (Type *Ty, bool AllowUnknown=false) const
 
MVT getSimpleValueType (Type *Ty, bool AllowUnknown=false) const
 Return the MVT corresponding to this LLVM type. See getValueType. More...
 
virtual unsigned getByValTypeAlignment (Type *Ty) const
 
MVT getRegisterType (MVT VT) const
 Return the type of registers that this ValueType will eventually require. More...
 
MVT getRegisterType (LLVMContext &Context, EVT VT) const
 Return the type of registers that this ValueType will eventually require. More...
 
unsigned getNumRegisters (LLVMContext &Context, EVT VT) const
 
virtual bool ShouldShrinkFPConstant (EVT) const
 
bool hasTargetDAGCombine (ISD::NodeType NT) const
 
unsigned getMaxStoresPerMemset (bool OptSize) const
 Get maximum # of store operations permitted for llvm.memset. More...
 
unsigned getMaxStoresPerMemcpy (bool OptSize) const
 Get maximum # of store operations permitted for llvm.memcpy. More...
 
unsigned getMaxStoresPerMemmove (bool OptSize) const
 Get maximum # of store operations permitted for llvm.memmove. More...
 
virtual bool allowsUnalignedMemoryAccesses (EVT, bool *=0) const
 Determine if the target supports unaligned memory accesses. More...
 
virtual EVT getOptimalMemOpType (uint64_t, unsigned, unsigned, bool, bool, bool, MachineFunction &) const
 
virtual bool isSafeMemOpType (MVT) const
 
bool usesUnderscoreSetJmp () const
 Determine if we should use _setjmp or setjmp to implement llvm.setjmp. More...
 
bool usesUnderscoreLongJmp () const
 Determine if we should use _longjmp or longjmp to implement llvm.longjmp. More...
 
bool supportJumpTables () const
 Return whether the target can generate code for jump tables. More...
 
int getMinimumJumpTableEntries () const
 
unsigned getStackPointerRegisterToSaveRestore () const
 
unsigned getExceptionPointerRegister () const
 
unsigned getExceptionSelectorRegister () const
 
unsigned getJumpBufSize () const
 
unsigned getJumpBufAlignment () const
 
unsigned getMinStackArgumentAlignment () const
 Return the minimum stack alignment of an argument. More...
 
unsigned getMinFunctionAlignment () const
 Return the minimum function alignment. More...
 
unsigned getPrefFunctionAlignment () const
 Return the preferred function alignment. More...
 
unsigned getPrefLoopAlignment () const
 Return the preferred loop alignment. More...
 
bool getInsertFencesForAtomic () const
 
virtual bool getStackCookieLocation (unsigned &, unsigned &) const
 
virtual unsigned getMaximalGlobalOffset () const
 
virtual bool isNoopAddrSpaceCast (unsigned SrcAS, unsigned DestAS) const
 Returns true if a cast between SrcAS and DestAS is a noop. More...
 
virtual void resetOperationActions ()
 Reset the operation actions based on target options. More...
 
virtual bool GetAddrModeArguments (IntrinsicInst *, SmallVectorImpl< Value * > &, Type *&) const
 
virtual bool isLegalAddressingMode (const AddrMode &AM, Type *Ty) const
 
virtual int getScalingFactorCost (const AddrMode &AM, Type *Ty) const
 Return the cost of the scaling factor used in the addressing mode represented by AM for this target, for a load/store of the specified type. More...
 
virtual bool isLegalICmpImmediate (int64_t) const
 
virtual bool isLegalAddImmediate (int64_t) const
 
virtual bool isTruncateFree (Type *, Type *) const
 
virtual bool allowTruncateForTailCall (Type *, Type *) const
 
virtual bool isTruncateFree (EVT, EVT) const
 
virtual bool isZExtFree (Type *, Type *) const
 
virtual bool isZExtFree (EVT, EVT) const
 
virtual bool hasPairedLoad (Type *, unsigned &) const
 
virtual bool hasPairedLoad (EVT, unsigned &) const
 
virtual bool isZExtFree (SDValue Val, EVT VT2) const
 
virtual bool isFNegFree (EVT VT) const
 
virtual bool isFAbsFree (EVT VT) const
 
virtual bool isFMAFasterThanFMulAndFAdd (EVT) const
 
virtual bool isNarrowingProfitable (EVT, EVT) const
 
void setLibcallName (RTLIB::Libcall Call, const char *Name)
 Rename the default libcall routine name for the specified libcall. More...
 
const char * getLibcallName (RTLIB::Libcall Call) const
 Get the libcall routine name for the specified libcall. More...
 
void setCmpLibcallCC (RTLIB::Libcall Call, ISD::CondCode CC)
 
ISD::CondCode getCmpLibcallCC (RTLIB::Libcall Call) const
 
void setLibcallCallingConv (RTLIB::Libcall Call, CallingConv::ID CC)
 Set the CallingConv that should be used for the specified libcall. More...
 
CallingConv::ID getLibcallCallingConv (RTLIB::Libcall Call) const
 Get the CallingConv that should be used for the specified libcall. More...
 
LegalizeKind getTypeConversion (LLVMContext &Context, EVT VT) const
 
Helpers for TargetTransformInfo implementations
int InstructionOpcodeToISD (unsigned Opcode) const
 Get the ISD node that corresponds to the Instruction class opcode. More...
 
std::pair< unsigned, MVTgetTypeLegalizationCost (Type *Ty) const
 Estimate the cost of type-legalization and the legalized type. More...
 

Static Public Member Functions

static ISD::NodeType getExtendForContent (BooleanContent Content)
 

Protected Member Functions

void initActions ()
 Initialize all of the actions to default values. More...
 
void setBooleanContents (BooleanContent Ty)
 
void setBooleanVectorContents (BooleanContent Ty)
 
void setSchedulingPreference (Sched::Preference Pref)
 Specify the target scheduling preference. More...
 
void setUseUnderscoreSetJmp (bool Val)
 
void setUseUnderscoreLongJmp (bool Val)
 
void setSupportJumpTables (bool Val)
 Indicate whether the target can generate code for jump tables. More...
 
void setMinimumJumpTableEntries (int Val)
 
void setStackPointerRegisterToSaveRestore (unsigned R)
 
void setExceptionPointerRegister (unsigned R)
 
void setExceptionSelectorRegister (unsigned R)
 
void setSelectIsExpensive (bool isExpensive=true)
 
void setJumpIsExpensive (bool isExpensive=true)
 
void setIntDivIsCheap (bool isCheap=true)
 
void addBypassSlowDiv (unsigned int SlowBitWidth, unsigned int FastBitWidth)
 Tells the code generator which bitwidths to bypass. More...
 
void setPow2DivIsCheap (bool isCheap=true)
 
void addRegisterClass (MVT VT, const TargetRegisterClass *RC)
 
void clearRegisterClasses ()
 Remove all register classes. More...
 
void clearOperationActions ()
 Remove all operation actions. More...
 
virtual std::pair< const
TargetRegisterClass *, uint8_t > 
findRepresentativeClass (MVT VT) const
 
void computeRegisterProperties ()
 
void setOperationAction (unsigned Op, MVT VT, LegalizeAction Action)
 
void setLoadExtAction (unsigned ExtType, MVT VT, LegalizeAction Action)
 
void setTruncStoreAction (MVT ValVT, MVT MemVT, LegalizeAction Action)
 
void setIndexedLoadAction (unsigned IdxMode, MVT VT, LegalizeAction Action)
 
void setIndexedStoreAction (unsigned IdxMode, MVT VT, LegalizeAction Action)
 
void setCondCodeAction (ISD::CondCode CC, MVT VT, LegalizeAction Action)
 
void AddPromotedToType (unsigned Opc, MVT OrigVT, MVT DestVT)
 
void setTargetDAGCombine (ISD::NodeType NT)
 
void setJumpBufSize (unsigned Size)
 Set the target's required jmp_buf buffer size (in bytes); default is 200. More...
 
void setJumpBufAlignment (unsigned Align)
 
void setMinFunctionAlignment (unsigned Align)
 Set the target's minimum function alignment (in log2(bytes)) More...
 
void setPrefFunctionAlignment (unsigned Align)
 
void setPrefLoopAlignment (unsigned Align)
 
void setMinStackArgumentAlignment (unsigned Align)
 Set the minimum stack alignment of an argument (in log2(bytes)). More...
 
void setInsertFencesForAtomic (bool fence)
 
bool isLegalRC (const TargetRegisterClass *RC) const
 

Protected Attributes

unsigned MaxStoresPerMemset
 Specify maximum number of store instructions per memset call. More...
 
unsigned MaxStoresPerMemsetOptSize
 
unsigned MaxStoresPerMemcpy
 Specify maximum bytes of store instructions per memcpy call. More...
 
unsigned MaxStoresPerMemcpyOptSize
 
unsigned MaxStoresPerMemmove
 Specify maximum bytes of store instructions per memmove call. More...
 
unsigned MaxStoresPerMemmoveOptSize
 
bool PredictableSelectIsExpensive
 

Detailed Description

This base class for TargetLowering contains the SelectionDAG-independent parts that can be used from the rest of CodeGen.

Definition at line 73 of file TargetLowering.h.

Member Typedef Documentation

LegalizeKind holds the legalization kind that needs to happen to EVT in order to type-legalize it.

Definition at line 102 of file TargetLowering.h.

Member Enumeration Documentation

Enum that describes how the target represents true/false values.

Enumerator
UndefinedBooleanContent 
ZeroOrOneBooleanContent 
ZeroOrNegativeOneBooleanContent 

Definition at line 105 of file TargetLowering.h.

This enum indicates whether operations are valid for a target, and if not, what action should be used to make them valid.

Enumerator
Legal 
Promote 
Expand 
Custom 

Definition at line 80 of file TargetLowering.h.

This enum indicates whether a types are legal for a target, and if not, what action should be used to make them valid.

Enumerator
TypeLegal 
TypePromoteInteger 
TypeExpandInteger 
TypeSoftenFloat 
TypeExpandFloat 
TypeScalarizeVector 
TypeSplitVector 
TypeWidenVector 

Definition at line 89 of file TargetLowering.h.

Enum that describes what type of support for selects the target has.

Enumerator
ScalarValSelect 
ScalarCondVectorVal 
VectorMaskSelect 

Definition at line 112 of file TargetLowering.h.

Constructor & Destructor Documentation

TargetLoweringBase::TargetLoweringBase ( const TargetMachine TM,
const TargetLoweringObjectFile TLOF 
)
explicit
TargetLoweringBase::~TargetLoweringBase ( )
virtual

Definition at line 698 of file TargetLoweringBase.cpp.

Member Function Documentation

void llvm::TargetLoweringBase::addBypassSlowDiv ( unsigned int  SlowBitWidth,
unsigned int  FastBitWidth 
)
inlineprotected

Tells the code generator which bitwidths to bypass.

Definition at line 941 of file TargetLowering.h.

Referenced by llvm::X86TargetLowering::resetOperationActions().

void llvm::TargetLoweringBase::AddPromotedToType ( unsigned  Opc,
MVT  OrigVT,
MVT  DestVT 
)
inlineprotected

If Opc/OrigVT is specified as being promoted, the promotion code defaults to trying a larger integer/fp until it can find one that works. If that default is insufficient, this method can be used by the target to override the default.

Definition at line 1051 of file TargetLowering.h.

References llvm::MVT::SimpleTy.

Referenced by llvm::AMDGPUTargetLowering::AMDGPUTargetLowering(), llvm::MipsTargetLowering::MipsTargetLowering(), llvm::PPCTargetLowering::PPCTargetLowering(), and llvm::X86TargetLowering::resetOperationActions().

void llvm::TargetLoweringBase::addRegisterClass ( MVT  VT,
const TargetRegisterClass RC 
)
inlineprotected
virtual bool llvm::TargetLoweringBase::allowsUnalignedMemoryAccesses ( EVT  ,
bool = 0 
) const
inlinevirtual

Determine if the target supports unaligned memory accesses.

This function returns true if the target allows unaligned memory accesses. of the specified type. If true, it also returns whether the unaligned memory access is "fast" in the second argument by reference. This is used, for example, in situations where an array copy/move/set is converted to a sequence of store operations. It's use helps to ensure that such replacements don't generate code that causes an alignment error (trap) on the target machine.

Reimplemented in llvm::X86TargetLowering, llvm::PPCTargetLowering, llvm::ARMTargetLowering, llvm::SystemZTargetLowering, llvm::SITargetLowering, llvm::MipsSETargetLowering, and llvm::Mips16TargetLowering.

Definition at line 717 of file TargetLowering.h.

Referenced by FindOptimalMemOpLowering().

virtual bool llvm::TargetLoweringBase::allowTruncateForTailCall ( Type ,
Type  
) const
inlinevirtual

Return true if a truncation from Ty1 to Ty2 is permitted when deciding whether a call is in tail position. Typically this means that both results would be assigned to the same register or stack slot, but it could mean the target performs adequate checks of its own before proceeding with the tail call.

Reimplemented in llvm::X86TargetLowering, llvm::ARMTargetLowering, llvm::SystemZTargetLowering, and llvm::HexagonTargetLowering.

Definition at line 1181 of file TargetLowering.h.

Referenced by getNoopInput().

bool TargetLoweringBase::canOpTrap ( unsigned  Op,
EVT  VT 
) const
virtual

Returns true if the operation can trap for the value type.

VT must be a legal type. By default, we optimistically assume most operations don't trap except for divide and remainder.

canOpTrap - Returns true if the operation can trap for the value type. VT must be a legal type.

Definition at line 823 of file TargetLoweringBase.cpp.

References llvm::ISD::FDIV, llvm::ISD::FREM, isTypeLegal(), llvm::ISD::SDIV, llvm::ISD::SREM, llvm::ISD::UDIV, and llvm::ISD::UREM.

void llvm::TargetLoweringBase::clearOperationActions ( )
inlineprotected

Remove all operation actions.

Definition at line 966 of file TargetLowering.h.

void llvm::TargetLoweringBase::clearRegisterClasses ( )
inlineprotected

Remove all register classes.

Definition at line 959 of file TargetLowering.h.

References llvm::MVT::LAST_VALUETYPE, and llvm::Intrinsic::memset.

Referenced by llvm::Mips16TargetLowering::Mips16TargetLowering().

void TargetLoweringBase::computeRegisterProperties ( )
protected

Once all of the register classes are added, this allows us to compute derived properties we expose.

computeRegisterProperties - Once all of the register classes are added, this allows us to compute derived properties we expose.

Definition at line 927 of file TargetLoweringBase.cpp.

References llvm::MVT::f128, llvm::MVT::f32, llvm::MVT::f64, findRepresentativeClass(), llvm::MVT::FIRST_VECTOR_VALUETYPE, llvm::MVT::getPow2VectorType(), llvm::MVT::getScalarType(), llvm::MVT::getSizeInBits(), llvm::MVT::getVectorElementType(), llvm::MVT::getVectorNumElements(), getVectorTypeBreakdownMVT(), llvm::MVT::i1, llvm::MVT::i128, llvm::MVT::i32, llvm::MVT::i64, llvm::MVT::isInteger(), isTypeLegal(), llvm::MVT::isVoid, llvm::MVT::LAST_INTEGER_VALUETYPE, llvm::MVT::LAST_VALUETYPE, llvm::MVT::LAST_VECTOR_VALUETYPE, llvm::MVT::MAX_ALLOWED_VALUETYPE, llvm::MVT::Other, llvm::MVT::ppcf128, llvm::MSP430ISD::RRC, llvm::TargetLoweringBase::ValueTypeActionImpl::setTypeAction(), shouldSplitVectorElementType(), llvm::tie(), TypeExpandFloat, TypeExpandInteger, TypePromoteInteger, TypeScalarizeVector, TypeSoftenFloat, TypeSplitVector, and TypeWidenVector.

Referenced by llvm::AArch64TargetLowering::AArch64TargetLowering(), llvm::ARMTargetLowering::ARMTargetLowering(), llvm::HexagonTargetLowering::HexagonTargetLowering(), llvm::Mips16TargetLowering::Mips16TargetLowering(), llvm::MipsSETargetLowering::MipsSETargetLowering(), llvm::MSP430TargetLowering::MSP430TargetLowering(), llvm::NVPTXTargetLowering::NVPTXTargetLowering(), llvm::PPCTargetLowering::PPCTargetLowering(), llvm::R600TargetLowering::R600TargetLowering(), llvm::X86TargetLowering::resetOperationActions(), llvm::SITargetLowering::SITargetLowering(), llvm::SparcTargetLowering::SparcTargetLowering(), llvm::SystemZTargetLowering::SystemZTargetLowering(), and llvm::XCoreTargetLowering::XCoreTargetLowering().

std::pair< const TargetRegisterClass *, uint8_t > TargetLoweringBase::findRepresentativeClass ( MVT  VT) const
protectedvirtual

Return the largest legal super-reg register class of the register class for the specified type and its associated "cost".

findRepresentativeClass - Return the largest legal super-reg register class of the register class for the specified type and its associated "cost".

Reimplemented in llvm::X86TargetLowering, and llvm::ARMTargetLowering.

Definition at line 900 of file TargetLoweringBase.cpp.

References llvm::TargetRegisterInfo::getNumRegClasses(), llvm::TargetRegisterInfo::getRegClass(), llvm::TargetMachine::getRegisterInfo(), llvm::TargetRegisterClass::getSize(), getTargetMachine(), isLegalRC(), llvm::SuperRegClassIterator::isValid(), llvm::BitVector::setBitsInMask(), and llvm::MVT::SimpleTy.

Referenced by computeRegisterProperties(), llvm::ARMTargetLowering::findRepresentativeClass(), and llvm::X86TargetLowering::findRepresentativeClass().

virtual bool llvm::TargetLoweringBase::GetAddrModeArguments ( IntrinsicInst ,
SmallVectorImpl< Value * > &  ,
Type *&   
) const
inlinevirtual

CodeGenPrepare sinks address calculations into the same BB as Load/Store instructions reading the address. This allows as much computation as possible to be done in the address mode for that operand. This hook lets targets also pass back when this should be done on intrinsics which load/store.

Definition at line 1114 of file TargetLowering.h.

BooleanContent llvm::TargetLoweringBase::getBooleanContents ( bool  isVec) const
inline

For targets without i1 registers, this gives the nature of the high-bits of boolean values held in types wider than i1.

"Boolean values" are special true/false values produced by nodes like SETCC and consumed (as the condition) by nodes like SELECT and BRCOND. Not to be confused with general values promoted from i1. Some cpus distinguish between vectors of boolean and scalars; the isVec parameter selects between the two kinds. For example on X86 a scalar boolean should be zero extended from i1, while the elements of a vector of booleans should be sign extended from i1.

Definition at line 240 of file TargetLowering.h.

Referenced by llvm::SelectionDAG::ComputeMaskedBits(), llvm::SelectionDAG::ComputeNumSignBits(), llvm::SelectionDAG::FoldSetCC(), and llvm::TargetLowering::SimplifySetCC().

const DenseMap<unsigned int, unsigned int>& llvm::TargetLoweringBase::getBypassSlowDivWidths ( ) const
inline

Returns map of slow types for division or remainder with corresponding fast types

Definition at line 190 of file TargetLowering.h.

unsigned TargetLoweringBase::getByValTypeAlignment ( Type Ty) const
virtual

Return the desired alignment for ByVal aggregate function arguments in the caller parameter area. This is the actual alignment, not its logarithm.

getByValTypeAlignment - Return the desired alignment for ByVal aggregate function arguments in the caller parameter area. This is the actual alignment, not its logarithm.

Reimplemented in llvm::X86TargetLowering, and llvm::PPCTargetLowering.

Definition at line 1232 of file TargetLoweringBase.cpp.

References llvm::DataLayout::getCallFrameTypeAlignment().

Referenced by llvm::TargetLowering::LowerCallTo().

ISD::CondCode llvm::TargetLoweringBase::getCmpLibcallCC ( RTLIB::Libcall  Call) const
inline

Get the CondCode that's to be used to test the result of the comparison libcall against zero.

Definition at line 1298 of file TargetLowering.h.

References llvm::Call.

Referenced by llvm::TargetLowering::softenSetCCOperands().

MVT::SimpleValueType TargetLoweringBase::getCmpLibcallReturnType ( ) const
virtual

Return the ValueType for comparison libcalls. Comparions libcalls include floating point comparion calls, and Ordered/Unordered check calls on floating point numbers.

Definition at line 1101 of file TargetLoweringBase.cpp.

References llvm::MVT::i32.

Referenced by llvm::TargetLowering::softenSetCCOperands().

LegalizeAction llvm::TargetLoweringBase::getCondCodeAction ( ISD::CondCode  CC,
MVT  VT 
) const
inline

Return how the condition code should be treated: either it is legal, needs to be expanded to some other code sequence, or the target has a custom expander for it.

Definition at line 533 of file TargetLowering.h.

References llvm::array_lengthof(), Promote, and llvm::MVT::SimpleTy.

Referenced by isCondCodeLegal(), and llvm::TargetLowering::SimplifySetCC().

const DataLayout* llvm::TargetLoweringBase::getDataLayout ( ) const
inline
unsigned llvm::TargetLoweringBase::getExceptionPointerRegister ( ) const
inline

If a physical register, this returns the register that receives the exception address on entry to a landing pad.

Definition at line 779 of file TargetLowering.h.

unsigned llvm::TargetLoweringBase::getExceptionSelectorRegister ( ) const
inline

If a physical register, this returns the register that receives the exception typeid on entry to a landing pad.

Definition at line 785 of file TargetLowering.h.

static ISD::NodeType llvm::TargetLoweringBase::getExtendForContent ( BooleanContent  Content)
inlinestatic
LegalizeAction llvm::TargetLoweringBase::getIndexedLoadAction ( unsigned  IdxMode,
MVT  VT 
) const
inline

Return how the indexed load should be treated: either it is legal, needs to be promoted to a larger size, needs to be expanded to some other code sequence, or the target has a custom expander for it.

Definition at line 497 of file TargetLowering.h.

References llvm::ISD::LAST_INDEXED_MODE, llvm::MVT::LAST_VALUETYPE, and llvm::MVT::SimpleTy.

Referenced by isIndexedLoadLegal().

LegalizeAction llvm::TargetLoweringBase::getIndexedStoreAction ( unsigned  IdxMode,
MVT  VT 
) const
inline

Return how the indexed store should be treated: either it is legal, needs to be promoted to a larger size, needs to be expanded to some other code sequence, or the target has a custom expander for it.

Definition at line 515 of file TargetLowering.h.

References llvm::ISD::LAST_INDEXED_MODE, llvm::MVT::LAST_VALUETYPE, and llvm::MVT::SimpleTy.

Referenced by isIndexedStoreLegal().

bool llvm::TargetLoweringBase::getInsertFencesForAtomic ( ) const
inline

Return whether the DAG builder should automatically insert fences and reduce ordering for atomics.

Definition at line 823 of file TargetLowering.h.

unsigned llvm::TargetLoweringBase::getJumpBufAlignment ( ) const
inline

Returns the target's jmp_buf alignment in bytes (if never set, the default is 0)

Definition at line 797 of file TargetLowering.h.

unsigned llvm::TargetLoweringBase::getJumpBufSize ( ) const
inline

Returns the target's jmp_buf size in bytes (if never set, the default is 200)

Definition at line 791 of file TargetLowering.h.

CallingConv::ID llvm::TargetLoweringBase::getLibcallCallingConv ( RTLIB::Libcall  Call) const
inline
const char* llvm::TargetLoweringBase::getLibcallName ( RTLIB::Libcall  Call) const
inline
LegalizeAction llvm::TargetLoweringBase::getLoadExtAction ( unsigned  ExtType,
MVT  VT 
) const
inline

Return how this load with extension should be treated: either it is legal, needs to be promoted to a larger size, needs to be expanded to some other code sequence, or the target has a custom expander for it.

Definition at line 464 of file TargetLowering.h.

References llvm::ISD::LAST_LOADEXT_TYPE, llvm::MVT::LAST_VALUETYPE, and llvm::MVT::SimpleTy.

Referenced by isLoadExtLegal().

virtual unsigned llvm::TargetLoweringBase::getMaximalGlobalOffset ( ) const
inlinevirtual

Returns the maximal possible offset which can be used for loads / stores from the global.

Reimplemented in llvm::ARMTargetLowering.

Definition at line 837 of file TargetLowering.h.

unsigned llvm::TargetLoweringBase::getMaxStoresPerMemcpy ( bool  OptSize) const
inline

Get maximum # of store operations permitted for llvm.memcpy.

This function returns the maximum number of store operations permitted to replace a call to llvm.memcpy. The value is set by the target at the performance threshold for such a replacement. If OptSize is true, return the limit for functions that have OptSize attribute.

Definition at line 694 of file TargetLowering.h.

References MaxStoresPerMemcpy, and MaxStoresPerMemcpyOptSize.

Referenced by getMemcpyLoadsAndStores().

unsigned llvm::TargetLoweringBase::getMaxStoresPerMemmove ( bool  OptSize) const
inline

Get maximum # of store operations permitted for llvm.memmove.

This function returns the maximum number of store operations permitted to replace a call to llvm.memmove. The value is set by the target at the performance threshold for such a replacement. If OptSize is true, return the limit for functions that have OptSize attribute.

Definition at line 704 of file TargetLowering.h.

References MaxStoresPerMemmove, and MaxStoresPerMemmoveOptSize.

Referenced by getMemmoveLoadsAndStores().

unsigned llvm::TargetLoweringBase::getMaxStoresPerMemset ( bool  OptSize) const
inline

Get maximum # of store operations permitted for llvm.memset.

This function returns the maximum number of store operations permitted to replace a call to llvm.memset. The value is set by the target at the performance threshold for such a replacement. If OptSize is true, return the limit for functions that have OptSize attribute.

Definition at line 684 of file TargetLowering.h.

References MaxStoresPerMemset, and MaxStoresPerMemsetOptSize.

Referenced by getMemsetStores().

unsigned llvm::TargetLoweringBase::getMinFunctionAlignment ( ) const
inline

Return the minimum function alignment.

Definition at line 807 of file TargetLowering.h.

Referenced by llvm::MachineFunction::MachineFunction().

int llvm::TargetLoweringBase::getMinimumJumpTableEntries ( ) const
inline

Return integer threshold on number of blocks to use jump tables rather than if sequence.

Definition at line 767 of file TargetLowering.h.

unsigned llvm::TargetLoweringBase::getMinStackArgumentAlignment ( ) const
inline

Return the minimum stack alignment of an argument.

Definition at line 802 of file TargetLowering.h.

unsigned llvm::TargetLoweringBase::getNumRegisters ( LLVMContext Context,
EVT  VT 
) const
inline

Return the number of registers that this ValueType will eventually require.

This is one for any types promoted to live in larger registers, but may be more than one for types (like i64) that are split into pieces. For types like i140, which are first promoted then expanded, it is the number of registers needed to hold all the bits of the original type. For an i140 on a 32 bit machine this means 5 registers.

Definition at line 646 of file TargetLowering.h.

References llvm::array_lengthof(), getRegisterType(), llvm::EVT::getSimpleVT(), llvm::MVT::getSizeInBits(), llvm::EVT::getSizeInBits(), getVectorTypeBreakdown(), llvm::EVT::isInteger(), llvm::EVT::isSimple(), llvm::EVT::isVector(), llvm_unreachable, and llvm::MVT::SimpleTy.

Referenced by llvm::FunctionLoweringInfo::ComputePHILiveOutRegInfo(), llvm::FunctionLoweringInfo::CreateRegs(), GetRegistersForValue(), llvm::GetReturnInfo(), llvm::NVPTXTargetLowering::LowerCall(), llvm::TargetLowering::LowerCallTo(), llvm::NVPTXTargetLowering::LowerFormalArguments(), and llvm::FunctionLoweringInfo::set().

const TargetLoweringObjectFile& llvm::TargetLoweringBase::getObjFileLowering ( ) const
inline
LegalizeAction llvm::TargetLoweringBase::getOperationAction ( unsigned  Op,
EVT  VT 
) const
inline

Return how this operation should be treated: either it is legal, needs to be promoted to a larger size, needs to be expanded to some other code sequence, or the target has a custom expander for it.

Definition at line 421 of file TargetLowering.h.

References llvm::array_lengthof(), Custom, Expand, llvm::EVT::getSimpleVT(), I, llvm::EVT::isExtended(), and llvm::MVT::SimpleTy.

Referenced by getTypeToPromoteTo(), isOperationExpand(), isOperationLegal(), isOperationLegalOrCustom(), and isOperationLegalOrPromote().

virtual EVT llvm::TargetLoweringBase::getOptimalMemOpType ( uint64_t  ,
unsigned  ,
unsigned  ,
bool  ,
bool  ,
bool  ,
MachineFunction  
) const
inlinevirtual

Returns the target specific optimal type for load and store operations as a result of memset, memcpy, and memmove lowering.

If DstAlign is zero that means it's safe to destination alignment can satisfy any constraint. Similarly if SrcAlign is zero it means there isn't a need to check it against alignment requirement, probably because the source does not need to be loaded. If 'IsMemset' is true, that means it's expanding a memset. If 'ZeroMemset' is true, that means it's a memset of zero. 'MemcpyStrSrc' indicates whether the memcpy source is constant so it does not need to be loaded. It returns EVT::Other if the type should be determined using generic target-independent logic.

Reimplemented in llvm::X86TargetLowering, llvm::PPCTargetLowering, and llvm::ARMTargetLowering.

Definition at line 732 of file TargetLowering.h.

References llvm::MVT::Other.

Referenced by FindOptimalMemOpLowering().

unsigned TargetLoweringBase::getPointerSizeInBits ( uint32_t  AS = 0) const
MVT TargetLoweringBase::getPointerTy ( uint32_t  AS = 0) const
virtual

Return the pointer type for the given address space, defaults to the pointer type from the data layout. FIXME: The default needs to be removed once all the code is updated.

Definition at line 797 of file TargetLoweringBase.cpp.

References llvm::MVT::getIntegerVT(), and getPointerSizeInBits().

Referenced by AddCombineToVPADDL(), llvm::X86TargetLowering::BuildFILD(), CheckType(), CheckValueType(), llvm::SelectionDAG::CreateStackTemporary(), llvm::PPCTargetLowering::emitEHSjLjLongJmp(), llvm::PPCTargetLowering::emitEHSjLjSetJmp(), llvm::X86SelectionDAGInfo::EmitTargetCodeForMemset(), llvm::ARMSelectionDAGInfo::EmitTargetCodeForMemset(), expandExp(), expandExp2(), expandPow(), ExpandUnalignedLoad(), ExpandUnalignedStore(), FindOptimalMemOpLowering(), getCopyFromParts(), GetExponent(), llvm::SelectionDAG::getIntPtrConstant(), llvm::SelectionDAG::getMemcpy(), llvm::SelectionDAG::getMemmove(), llvm::SelectionDAG::getMemset(), getNoopInput(), llvm::X86TargetLowering::getPICJumpTableRelocBase(), llvm::TargetLowering::getPICJumpTableRelocBase(), llvm::NVPTXTargetLowering::getPrototype(), llvm::FastISel::getRegForGEPIndex(), llvm::MSP430TargetLowering::getReturnAddressFrameIndex(), llvm::X86TargetLowering::getReturnAddressFrameIndex(), getSetCCResultType(), llvm::ARMTargetLowering::getSetCCResultType(), llvm::SelectionDAGBuilder::getValueImpl(), getValueType(), getVectorIdxTy(), InsertFenceForAtomic(), isBLACompatibleAddress(), llvm::MSP430TargetLowering::LowerBlockAddress(), llvm::HexagonTargetLowering::LowerBlockAddress(), llvm::AArch64TargetLowering::LowerBlockAddress(), llvm::HexagonTargetLowering::LowerBR_JT(), llvm::HexagonTargetLowering::LowerCall(), llvm::NVPTXTargetLowering::LowerCall(), llvm::AArch64TargetLowering::LowerCall(), llvm::SystemZTargetLowering::LowerCall(), llvm::SparcTargetLowering::LowerCall_32(), llvm::SparcTargetLowering::LowerCall_64(), llvm::SelectionDAGBuilder::LowerCallTo(), llvm::HexagonTargetLowering::LowerEH_RETURN(), llvm::MSP430TargetLowering::LowerExternalSymbol(), llvm::SparcTargetLowering::LowerF128_LibCallArg(), llvm::SparcTargetLowering::LowerF128Compare(), llvm::SparcTargetLowering::LowerF128Op(), llvm::AArch64TargetLowering::LowerF128ToCall(), llvm::NVPTXTargetLowering::LowerFormalArguments(), llvm::AArch64TargetLowering::LowerFormalArguments(), llvm::SystemZTargetLowering::LowerFormalArguments(), llvm::SparcTargetLowering::LowerFormalArguments_32(), llvm::SparcTargetLowering::LowerFormalArguments_64(), LowerFSINCOS(), llvm::AMDGPUTargetLowering::LowerGlobalAddress(), llvm::NVPTXTargetLowering::LowerGlobalAddress(), llvm::MSP430TargetLowering::LowerGlobalAddress(), llvm::HexagonTargetLowering::LowerGLOBALADDRESS(), llvm::AArch64TargetLowering::LowerGlobalAddressELFLarge(), llvm::AArch64TargetLowering::LowerGlobalAddressELFSmall(), llvm::SparcTargetLowering::LowerGlobalTLSAddress(), llvm::AArch64TargetLowering::LowerGlobalTLSAddress(), LowerINTRINSIC_W_CHAIN(), llvm::MSP430TargetLowering::LowerJumpTable(), llvm::AArch64TargetLowering::LowerJumpTable(), LowerMemOpCallTo(), llvm::SparcTargetLowering::LowerReturn_32(), llvm::MSP430TargetLowering::LowerRETURNADDR(), LowerRETURNADDR(), LowerSIGN_EXTEND_AVX512(), llvm::AArch64TargetLowering::LowerTLSDescCall(), llvm::MSP430TargetLowering::LowerVASTART(), llvm::AArch64TargetLowering::LowerVASTART(), LowerVASTART(), LowerVectorBroadcast(), LowerZERO_EXTEND_AVX512(), llvm::SparcTargetLowering::makeAddress(), llvm::TargetLowering::makeLibCall(), llvm::PPCTargetLowering::PerformDAGCombine(), PerformEXTRACT_VECTOR_ELTCombine(), PerformLOADCombine(), PerformSTORECombine(), PrepareCall(), llvm::AArch64TargetLowering::SaveVarArgRegisters(), llvm::PPCTargetLowering::SelectAddressRegImm(), llvm::SelectionDAGISel::SelectCodeCommon(), llvm::TargetLowering::SimplifySetCC(), llvm::SparcTargetLowering::SparcTargetLowering(), llvm::SystemZTargetLowering::SystemZTargetLowering(), llvm::SelectionDAGBuilder::visitBitTestHeader(), llvm::SelectionDAGBuilder::visitJumpTable(), llvm::SelectionDAGBuilder::visitJumpTableHeader(), and llvm::SelectionDAGBuilder::visitSPDescriptorParent().

unsigned TargetLoweringBase::getPointerTypeSizeInBits ( Type Ty) const
unsigned llvm::TargetLoweringBase::getPrefFunctionAlignment ( ) const
inline

Return the preferred function alignment.

Definition at line 812 of file TargetLowering.h.

Referenced by llvm::MachineFunction::MachineFunction().

unsigned llvm::TargetLoweringBase::getPrefLoopAlignment ( ) const
inline

Return the preferred loop alignment.

Definition at line 817 of file TargetLowering.h.

virtual const TargetRegisterClass* llvm::TargetLoweringBase::getRegClassFor ( MVT  VT) const
inlinevirtual
MVT llvm::TargetLoweringBase::getRegisterType ( MVT  VT) const
inline
MVT llvm::TargetLoweringBase::getRegisterType ( LLVMContext Context,
EVT  VT 
) const
inline
virtual uint8_t llvm::TargetLoweringBase::getRepRegClassCostFor ( MVT  VT) const
inlinevirtual

Return the cost of the 'representative' register class for the specified value type.

Definition at line 278 of file TargetLowering.h.

References llvm::MVT::SimpleTy.

Referenced by GetCostForDef().

virtual const TargetRegisterClass* llvm::TargetLoweringBase::getRepRegClassFor ( MVT  VT) const
inlinevirtual

Return the 'representative' register class for the specified value type.

The 'representative' register class is the largest legal super-reg register class for the register class of the value type. For example, on i386 the rep register class for i8, i16, and i32 are GR32; while the rep register class is GR64 on x86_64.

Reimplemented in llvm::MipsSETargetLowering.

Definition at line 271 of file TargetLowering.h.

References llvm::MVT::SimpleTy.

Referenced by GetCostForDef(), and llvm::MipsSETargetLowering::getRepRegClassFor().

MVT TargetLoweringBase::getScalarShiftAmountTy ( EVT  LHSTy) const
virtual
virtual int llvm::TargetLoweringBase::getScalingFactorCost ( const AddrMode AM,
Type Ty 
) const
inlinevirtual

Return the cost of the scaling factor used in the addressing mode represented by AM for this target, for a load/store of the specified type.

If the AM is supported, the return value must be >= 0. If the AM is not supported, it returns a negative value. TODO: Handle pre/postinc as well.

Definition at line 1149 of file TargetLowering.h.

References isLegalAddressingMode().

Sched::Preference llvm::TargetLoweringBase::getSchedulingPreference ( ) const
inline

Return target scheduling preference.

Definition at line 245 of file TargetLowering.h.

Referenced by llvm::createDefaultScheduler(), llvm::PPCTargetLowering::getSchedulingPreference(), and llvm::ScheduleDAGSDNodes::newSUnit().

virtual Sched::Preference llvm::TargetLoweringBase::getSchedulingPreference ( SDNode ) const
inlinevirtual

Some scheduler, e.g. hybrid, can switch to different scheduling heuristics for different nodes. This function returns the preference (or none) for the given node.

Reimplemented in llvm::PPCTargetLowering, and llvm::ARMTargetLowering.

Definition at line 252 of file TargetLowering.h.

References llvm::Sched::None.

EVT TargetLoweringBase::getSetCCResultType ( LLVMContext Context,
EVT  VT 
) const
virtual
EVT TargetLoweringBase::getShiftAmountTy ( EVT  LHSTy) const
MVT llvm::TargetLoweringBase::getSimpleValueType ( Type Ty,
bool  AllowUnknown = false 
) const
inline

Return the MVT corresponding to this LLVM type. See getValueType.

Definition at line 603 of file TargetLowering.h.

References llvm::EVT::getSimpleVT(), and getValueType().

Referenced by llvm::TargetLowering::ParseConstraints().

virtual bool llvm::TargetLoweringBase::getStackCookieLocation ( unsigned ,
unsigned  
) const
inlinevirtual

Return true if the target stores stack protector cookies at a fixed offset in some non-standard address space, and populates the address space and offset as appropriate.

Reimplemented in llvm::X86TargetLowering.

Definition at line 830 of file TargetLowering.h.

Referenced by CreatePrologue().

unsigned llvm::TargetLoweringBase::getStackPointerRegisterToSaveRestore ( ) const
inline

If a physical register, this specifies the register that llvm.savestack/llvm.restorestack should save and restore.

Definition at line 773 of file TargetLowering.h.

Referenced by llvm::TargetInstrInfo::isSchedulingBoundary(), and llvm::HexagonTargetLowering::LowerDYNAMIC_STACKALLOC().

const TargetMachine& llvm::TargetLoweringBase::getTargetMachine ( ) const
inline

Definition at line 145 of file TargetLowering.h.

Referenced by llvm::SITargetLowering::AdjustInstrPostInstrSelection(), llvm::ARMTargetLowering::AdjustInstrPostInstrSelection(), llvm::AArch64TargetLowering::emitAtomicBinary(), llvm::PPCTargetLowering::EmitAtomicBinary(), llvm::AArch64TargetLowering::emitAtomicBinaryMinMax(), llvm::AArch64TargetLowering::emitAtomicCmpSwap(), llvm::PPCTargetLowering::emitEHSjLjLongJmp(), llvm::PPCTargetLowering::emitEHSjLjSetJmp(), llvm::AArch64TargetLowering::EmitF128CSEL(), llvm::SITargetLowering::EmitInstrWithCustomInserter(), llvm::SparcTargetLowering::EmitInstrWithCustomInserter(), llvm::XCoreTargetLowering::EmitInstrWithCustomInserter(), llvm::MSP430TargetLowering::EmitInstrWithCustomInserter(), llvm::MipsTargetLowering::EmitInstrWithCustomInserter(), llvm::ARMTargetLowering::EmitInstrWithCustomInserter(), llvm::PPCTargetLowering::EmitInstrWithCustomInserter(), llvm::X86TargetLowering::EmitInstrWithCustomInserter(), llvm::PPCTargetLowering::EmitPartwordAtomicBinary(), llvm::MSP430TargetLowering::EmitShiftInstr(), findRepresentativeClass(), llvm::X86TargetLowering::getJumpTableEncoding(), llvm::TargetLowering::getJumpTableEncoding(), llvm::MipsTargetLowering::getOpndList(), llvm::PPCTargetLowering::getRegForInlineAsmConstraint(), llvm::TargetLowering::getRegForInlineAsmConstraint(), llvm::X86TargetLowering::getReturnAddressFrameIndex(), llvm::ARMTargetLowering::getSchedulingPreference(), llvm::X86TargetLowering::getSetCCResultType(), llvm::X86TargetLowering::getStackCookieLocation(), llvm::AArch64TargetLowering::IsEligibleForTailCallOptimization(), llvm::isInTailCallPosition(), llvm::X86TargetLowering::isLegalAddressingMode(), llvm::TargetLowering::isOffsetFoldingLegal(), llvm::X86TargetLowering::LowerAsmOperandForConstraint(), llvm::AArch64TargetLowering::LowerBlockAddress(), llvm::HexagonTargetLowering::LowerCall(), llvm::AArch64TargetLowering::LowerCall(), llvm::SparcTargetLowering::LowerCall_32(), llvm::SparcTargetLowering::LowerCall_64(), llvm::HexagonTargetLowering::LowerCallResult(), llvm::AArch64TargetLowering::LowerCallResult(), llvm::X86TargetLowering::LowerCustomJumpTableEntry(), llvm::R600TargetLowering::LowerFormalArguments(), llvm::SITargetLowering::LowerFormalArguments(), llvm::HexagonTargetLowering::LowerFormalArguments(), llvm::AArch64TargetLowering::LowerFormalArguments(), llvm::SparcTargetLowering::LowerFormalArguments_32(), llvm::SparcTargetLowering::LowerFormalArguments_64(), llvm::AMDGPUTargetLowering::LowerGlobalAddress(), llvm::HexagonTargetLowering::LowerGLOBALADDRESS(), llvm::AArch64TargetLowering::LowerGlobalAddressELF(), llvm::AArch64TargetLowering::LowerGlobalAddressELFLarge(), llvm::AArch64TargetLowering::LowerGlobalAddressELFSmall(), llvm::SparcTargetLowering::LowerGlobalTLSAddress(), llvm::AArch64TargetLowering::LowerGlobalTLSAddress(), LowerINTRINSIC_W_CHAIN(), llvm::AArch64TargetLowering::LowerJumpTable(), llvm::HexagonTargetLowering::LowerReturn(), llvm::AArch64TargetLowering::LowerReturn(), llvm::AArch64TargetLowering::LowerTLSDescCall(), llvm::SparcTargetLowering::makeAddress(), llvm::PPCTargetLowering::PerformDAGCombine(), llvm::SITargetLowering::PostISelFolding(), llvm::PPCTargetLowering::ReplaceNodeResults(), llvm::X86TargetLowering::resetOperationActions(), and llvm::ResourcePriorityQueue::ResourcePriorityQueue().

virtual bool llvm::TargetLoweringBase::getTgtMemIntrinsic ( IntrinsicInfo ,
const CallInst ,
unsigned   
) const
inlinevirtual

Given an intrinsic, checks if on the target the intrinsic will need to map to a MemIntrinsicNode (touches memory). If this is the case, it returns true and store the intrinsic information into the IntrinsicInfo that was passed to the function.

Reimplemented in llvm::ARMTargetLowering, llvm::AArch64TargetLowering, llvm::AMDGPUTargetLowering, and llvm::NVPTXTargetLowering.

Definition at line 383 of file TargetLowering.h.

LegalizeAction llvm::TargetLoweringBase::getTruncStoreAction ( MVT  ValVT,
MVT  MemVT 
) const
inline

Return how this store with truncation should be treated: either it is legal, needs to be promoted to a larger size, needs to be expanded to some other code sequence, or the target has a custom expander for it.

Definition at line 479 of file TargetLowering.h.

References llvm::MVT::LAST_VALUETYPE, and llvm::MVT::SimpleTy.

Referenced by isTruncStoreLegal().

LegalizeTypeAction llvm::TargetLoweringBase::getTypeAction ( LLVMContext Context,
EVT  VT 
) const
inline

Return how we should legalize values of this type, either it is already legal (return 'Legal') or we need to promote it to a larger type (return 'Promote'), or we need to expand it into multiple registers of smaller integer type (return 'Expand'). 'Custom' is not an option.

Definition at line 319 of file TargetLowering.h.

References getTypeConversion().

Referenced by llvm::SelectionDAG::getConstant(), getTypeToExpandTo(), getVectorTypeBreakdown(), and OptimizeNoopCopyExpression().

LegalizeTypeAction llvm::TargetLoweringBase::getTypeAction ( MVT  VT) const
inline
LegalizeKind llvm::TargetLoweringBase::getTypeConversion ( LLVMContext Context,
EVT  VT 
) const
inline
std::pair< unsigned, MVT > TargetLoweringBase::getTypeLegalizationCost ( Type Ty) const

Estimate the cost of type-legalization and the legalized type.

Definition at line 1312 of file TargetLoweringBase.cpp.

References llvm::CallingConv::C, llvm::Type::getContext(), llvm::EVT::getSimpleVT(), getTypeConversion(), getValueType(), TypeExpandInteger, TypeLegal, and TypeSplitVector.

EVT llvm::TargetLoweringBase::getTypeToExpandTo ( LLVMContext Context,
EVT  VT 
) const
inline

For types supported by the target, this is an identity function. For types that must be expanded (i.e. integer types that are larger than the largest integer register or illegal floating point types), this returns the largest legal type it will be expanded to.

Definition at line 340 of file TargetLowering.h.

References getTypeAction(), getTypeToTransformTo(), llvm::EVT::isVector(), llvm_unreachable, TypeExpandInteger, and TypeLegal.

MVT llvm::TargetLoweringBase::getTypeToPromoteTo ( unsigned  Op,
MVT  VT 
) const
inline

If the action for this operation is to promote, this method returns the ValueType to promote to.

Definition at line 555 of file TargetLowering.h.

References getOperationAction(), llvm::MVT::isFloatingPoint(), llvm::MVT::isInteger(), isTypeLegal(), llvm::MVT::isVoid, Promote, and llvm::MVT::SimpleTy.

EVT llvm::TargetLoweringBase::getTypeToTransformTo ( LLVMContext Context,
EVT  VT 
) const
inline

For types supported by the target, this is an identity function. For types that must be promoted to larger types, this returns the larger type to promote to. For integer types that are larger than the largest integer register, this contains one step in the expansion to get to the smaller register. For illegal floating point types, this returns the integer type to transform to.

Definition at line 332 of file TargetLowering.h.

References getTypeConversion().

Referenced by llvm::FunctionLoweringInfo::ComputePHILiveOutRegInfo(), llvm::SelectionDAG::getConstant(), getMemcpyLoadsAndStores(), llvm::FastISel::getRegForValue(), getRegisterType(), llvm::SelectionDAG::GetSplitDestVTs(), getTypeToExpandTo(), getVectorTypeBreakdown(), and OptimizeNoopCopyExpression().

EVT llvm::TargetLoweringBase::getValueType ( Type Ty,
bool  AllowUnknown = false 
) const
inline
const ValueTypeActionImpl& llvm::TargetLoweringBase::getValueTypeActions ( ) const
inline

Definition at line 311 of file TargetLowering.h.

virtual MVT llvm::TargetLoweringBase::getVectorIdxTy ( ) const
inlinevirtual
unsigned TargetLoweringBase::getVectorTypeBreakdown ( LLVMContext Context,
EVT  VT,
EVT IntermediateVT,
unsigned NumIntermediates,
MVT RegisterVT 
) const

Vector types are broken down into some number of legal first class types. For example, EVT::v8f32 maps to 2 EVT::v4f32 with Altivec or SSE1, or 8 promoted EVT::f64 values with the X86 FP stack. Similarly, EVT::v2i64 turns into 4 EVT::i32 values with both PPC and X86.

This method returns the number of registers needed, and the VT for each register. It also returns the VT and quantity of the intermediate values before they are promoted/expanded.

getVectorTypeBreakdown - Vector types are broken down into some number of legal first class types. For example, MVT::v8f32 maps to 2 MVT::v4f32 with Altivec or SSE1, or 8 promoted MVT::f64 values with the X86 FP stack. Similarly, MVT::v2i64 turns into 4 MVT::i32 values with both PPC and X86.

This method returns the number of registers needed, and the VT for each register. It also returns the VT and quantity of the intermediate values before they are promoted/expanded.

Definition at line 1114 of file TargetLoweringBase.cpp.

References getRegisterType(), llvm::EVT::getSimpleVT(), llvm::MVT::getSizeInBits(), llvm::EVT::getSizeInBits(), getTypeAction(), getTypeToTransformTo(), llvm::EVT::getVectorElementType(), llvm::EVT::getVectorNumElements(), llvm::EVT::getVectorVT(), llvm::isPowerOf2_32(), isTypeLegal(), llvm::NextPowerOf2(), llvm::X86II::TA, TypePromoteInteger, and TypeWidenVector.

Referenced by getCopyFromPartsVector(), getNumRegisters(), and getRegisterType().

virtual bool llvm::TargetLoweringBase::hasPairedLoad ( Type ,
unsigned  
) const
inlinevirtual

Return true if the target supplies and combines to a paired load two loaded values of type LoadedType next to each other in memory. RequiredAlignment gives the minimal alignment constraints that must be met to be able to select this paired load.

This information is not used to generate actual paired loads, but it is used to generate a sequence of loads that is easier to combine into a paired load. For instance, something like this: a = load i64* addr b = trunc i64 a to i32 c = lshr i64 a, 32 d = trunc i64 c to i32 will be optimized into: b = load i32* addr1 d = load i32* addr2 Where addr1 = addr2 +/- sizeof(i32).

In other words, unless the target performs a post-isel load combining, this information should not be provided because it will generate more loads.

Definition at line 1226 of file TargetLowering.h.

virtual bool llvm::TargetLoweringBase::hasPairedLoad ( EVT  ,
unsigned  
) const
inlinevirtual

Definition at line 1231 of file TargetLowering.h.

bool llvm::TargetLoweringBase::hasTargetDAGCombine ( ISD::NodeType  NT) const
inline

If true, the target has custom DAG combine transformations that it can perform for the specified node.

Definition at line 673 of file TargetLowering.h.

References llvm::array_lengthof().

void TargetLoweringBase::initActions ( )
protected
int TargetLoweringBase::InstructionOpcodeToISD ( unsigned  Opcode) const
bool llvm::TargetLoweringBase::isBigEndian ( ) const
inline
bool llvm::TargetLoweringBase::isCondCodeLegal ( ISD::CondCode  CC,
MVT  VT 
) const
inline

Return true if the specified condition code is legal on this target.

Definition at line 546 of file TargetLowering.h.

References Custom, getCondCodeAction(), and Legal.

Referenced by llvm::SelectionDAG::FoldSetCC(), llvm::R600TargetLowering::PerformDAGCombine(), and llvm::TargetLowering::SimplifySetCC().

virtual bool llvm::TargetLoweringBase::isFAbsFree ( EVT  VT) const
inlinevirtual

Return true if an fabs operation is free to the point where it is never worthwhile to replace it with a bitwise operation.

Reimplemented in llvm::AMDGPUTargetLowering.

Definition at line 1252 of file TargetLowering.h.

References llvm::EVT::isFloatingPoint().

virtual bool llvm::TargetLoweringBase::isFMAFasterThanFMulAndFAdd ( EVT  ) const
inlinevirtual

Return true if an FMA operation is faster than a pair of fmul and fadd instructions. fmuladd intrinsics will be expanded to FMAs when this method returns true, otherwise fmuladd is expanded to fmul + fadd.

NOTE: This may be called before legalization on types for which FMAs are not legal, but should return true if those types will eventually legalize to types that support FMAs. After legalization, it will only be called on types that support FMAs (via Legal or Custom actions)

Reimplemented in llvm::X86TargetLowering, llvm::PPCTargetLowering, llvm::AArch64TargetLowering, llvm::SystemZTargetLowering, and llvm::SITargetLowering.

Definition at line 1265 of file TargetLowering.h.

virtual bool llvm::TargetLoweringBase::isFNegFree ( EVT  VT) const
inlinevirtual

Return true if an fneg operation is free to the point where it is never worthwhile to replace it with a bitwise operation.

Reimplemented in llvm::AMDGPUTargetLowering.

Definition at line 1245 of file TargetLowering.h.

References llvm::EVT::isFloatingPoint().

virtual bool llvm::TargetLoweringBase::isFPImmLegal ( const APFloat ,
EVT   
) const
inlinevirtual

Returns true if the target can instruction select the specified FP immediate natively. If false, the legalizer will materialize the FP immediate as a load from a constant pool.

Reimplemented in llvm::X86TargetLowering, llvm::ARMTargetLowering, llvm::SystemZTargetLowering, llvm::HexagonTargetLowering, and llvm::AMDGPUTargetLowering.

Definition at line 391 of file TargetLowering.h.

bool llvm::TargetLoweringBase::isIndexedLoadLegal ( unsigned  IdxMode,
EVT  VT 
) const
inline

Return true if the specified indexed load is legal on this target.

Definition at line 505 of file TargetLowering.h.

References Custom, getIndexedLoadAction(), llvm::EVT::getSimpleVT(), llvm::EVT::isSimple(), and Legal.

bool llvm::TargetLoweringBase::isIndexedStoreLegal ( unsigned  IdxMode,
EVT  VT 
) const
inline

Return true if the specified indexed load is legal on this target.

Definition at line 523 of file TargetLowering.h.

References Custom, getIndexedStoreAction(), llvm::EVT::getSimpleVT(), llvm::EVT::isSimple(), and Legal.

bool llvm::TargetLoweringBase::isIntDivCheap ( ) const
inline

Return true if integer divide is usually cheaper than a sequence of several shifts, adds, and multiplies for this target.

Definition at line 183 of file TargetLowering.h.

bool llvm::TargetLoweringBase::isJumpExpensive ( ) const
inline

Return true if Flow Control is an expensive operation that should be avoided.

Definition at line 199 of file TargetLowering.h.

virtual bool llvm::TargetLoweringBase::isLegalAddImmediate ( int64_t  ) const
inlinevirtual

Return true if the specified immediate is legal add immediate, that is the target has add instructions which can add a register with the immediate without having to materialize the immediate into a register.

Reimplemented in llvm::X86TargetLowering, and llvm::ARMTargetLowering.

Definition at line 1165 of file TargetLowering.h.

bool TargetLoweringBase::isLegalAddressingMode ( const AddrMode AM,
Type Ty 
) const
virtual

Return true if the addressing mode represented by AM is legal for this target, for a load/store of the specified type.

The type may be VoidTy, in which case only return true if the addressing mode is legal for a load/store of any legal type. TODO: Handle pre/postinc as well.

isLegalAddressingMode - Return true if the addressing mode represented by AM is legal for this target, for a load/store of the specified type.

Reimplemented in llvm::X86TargetLowering, llvm::PPCTargetLowering, llvm::ARMTargetLowering, llvm::SystemZTargetLowering, llvm::HexagonTargetLowering, llvm::XCoreTargetLowering, and llvm::NVPTXTargetLowering.

Definition at line 1340 of file TargetLoweringBase.cpp.

References llvm::TargetLoweringBase::AddrMode::BaseGV, llvm::TargetLoweringBase::AddrMode::BaseOffs, llvm::TargetLoweringBase::AddrMode::HasBaseReg, and llvm::TargetLoweringBase::AddrMode::Scale.

Referenced by canFoldInAddressingMode(), and getScalingFactorCost().

virtual bool llvm::TargetLoweringBase::isLegalICmpImmediate ( int64_t  ) const
inlinevirtual

Return true if the specified immediate is legal icmp immediate, that is the target has icmp instructions which can compare a register against the immediate without having to materialize the immediate into a register.

Reimplemented in llvm::X86TargetLowering, llvm::ARMTargetLowering, llvm::AArch64TargetLowering, and llvm::HexagonTargetLowering.

Definition at line 1158 of file TargetLowering.h.

Referenced by llvm::TargetLowering::SimplifySetCC().

bool TargetLoweringBase::isLegalRC ( const TargetRegisterClass RC) const
protected

Return true if the value types that can be represented by the specified register class are all legal.

isLegalRC - Return true if the value types that can be represented by the specified register class are all legal.

Definition at line 888 of file TargetLoweringBase.cpp.

References I, isTypeLegal(), llvm::TargetRegisterClass::vt_begin(), and llvm::TargetRegisterClass::vt_end().

Referenced by findRepresentativeClass(), and llvm::TargetLowering::getRegForInlineAsmConstraint().

bool llvm::TargetLoweringBase::isLittleEndian ( ) const
inline
virtual bool llvm::TargetLoweringBase::isLoadBitCastBeneficial ( EVT  ,
EVT   
) const
inlinevirtual

isLoadBitCastBeneficial() - Return true if the following transform is beneficial. fold (conv (load x)) -> (load (conv*)x) On architectures that don't natively support some vector loads efficiently, casting the load to a smaller vector of larger types and loading is more efficient, however, this can be undone by optimizations in dag combiner.

Reimplemented in llvm::AMDGPUTargetLowering.

Definition at line 214 of file TargetLowering.h.

bool llvm::TargetLoweringBase::isLoadExtLegal ( unsigned  ExtType,
EVT  VT 
) const
inline

Return true if the specified load with extension is legal on this target.

Definition at line 471 of file TargetLowering.h.

References getLoadExtAction(), llvm::EVT::getSimpleVT(), llvm::EVT::isSimple(), and Legal.

virtual bool llvm::TargetLoweringBase::isNarrowingProfitable ( EVT  ,
EVT   
) const
inlinevirtual

Return true if it's profitable to narrow operations of type VT1 to VT2. e.g. on x86, it's profitable to narrow from i32 to i8 but not from i32 to i16.

Reimplemented in llvm::X86TargetLowering.

Definition at line 1272 of file TargetLowering.h.

virtual bool llvm::TargetLoweringBase::isNoopAddrSpaceCast ( unsigned  SrcAS,
unsigned  DestAS 
) const
inlinevirtual

Returns true if a cast between SrcAS and DestAS is a noop.

Reimplemented in llvm::X86TargetLowering.

Definition at line 842 of file TargetLowering.h.

bool llvm::TargetLoweringBase::isOperationExpand ( unsigned  Op,
EVT  VT 
) const
inline

Return true if the specified operation is illegal on this target or unlikely to be made legal with custom lowering. This is used to help guide high-level lowering decisions.

Definition at line 451 of file TargetLowering.h.

References Expand, getOperationAction(), and isTypeLegal().

bool llvm::TargetLoweringBase::isOperationLegal ( unsigned  Op,
EVT  VT 
) const
inline
bool llvm::TargetLoweringBase::isOperationLegalOrCustom ( unsigned  Op,
EVT  VT 
) const
inline

Return true if the specified operation is legal on this target or can be made legal with custom lowering. This is used to help guide high-level lowering decisions.

Definition at line 433 of file TargetLowering.h.

References Custom, getOperationAction(), isTypeLegal(), Legal, and llvm::MVT::Other.

Referenced by areJTsAllowed(), buildFromShuffleMostly(), llvm::TargetLowering::BuildSDIV(), llvm::TargetLowering::BuildUDIV(), FindOptimalMemOpLowering(), isNegatibleForFree(), PerformLOADCombine(), llvm::TargetLowering::SimplifyDemandedBits(), and XFormVExtractWithShuffleIntoLoad().

bool llvm::TargetLoweringBase::isOperationLegalOrPromote ( unsigned  Op,
EVT  VT 
) const
inline

Return true if the specified operation is legal on this target or can be made legal using promotion. This is used to help guide high-level lowering decisions.

Definition at line 442 of file TargetLowering.h.

References getOperationAction(), isTypeLegal(), Legal, llvm::MVT::Other, and Promote.

Referenced by WidenMaskArithmetic().

bool llvm::TargetLoweringBase::isPow2DivCheap ( ) const
inline

Return true if pow2 div is cheaper than a chain of srl/add/sra.

Definition at line 195 of file TargetLowering.h.

bool llvm::TargetLoweringBase::isPredictableSelectExpensive ( ) const
inline

Return true if selects are only cheaper than branches if the branch is unlikely to be predicted right.

Definition at line 203 of file TargetLowering.h.

References PredictableSelectIsExpensive.

virtual bool llvm::TargetLoweringBase::isSafeMemOpType ( MVT  ) const
inlinevirtual

Returns true if it's safe to use load / store of the specified type to expand memcpy / memset inline.

This is mostly true for all types except for some special cases. For example, on X86 targets without SSE2 f64 load / store are done with fldl / fstpl which also does type conversion. Note the specified type doesn't have to be legal as the hook is used before type legalization.

Reimplemented in llvm::X86TargetLowering.

Definition at line 748 of file TargetLowering.h.

Referenced by FindOptimalMemOpLowering().

bool llvm::TargetLoweringBase::isSelectExpensive ( ) const
inline

Return true if the select operation is expensive for this target.

Definition at line 170 of file TargetLowering.h.

virtual bool llvm::TargetLoweringBase::isSelectSupported ( SelectSupportKind  ) const
inlinevirtual

Reimplemented in llvm::ARMTargetLowering.

Definition at line 172 of file TargetLowering.h.

virtual bool llvm::TargetLoweringBase::isShuffleMaskLegal ( const SmallVectorImpl< int > &  ,
EVT   
) const
inlinevirtual

Targets can use this to indicate that they only support some VECTOR_SHUFFLE operations, those with specific masks. By default, if a target supports the VECTOR_SHUFFLE node, all mask values are assumed to be legal.

Reimplemented in llvm::X86TargetLowering, llvm::ARMTargetLowering, and llvm::MipsSETargetLowering.

Definition at line 399 of file TargetLowering.h.

bool llvm::TargetLoweringBase::isSlowDivBypassed ( ) const
inline

Returns true if target has indicated at least one type should be bypassed.

Definition at line 186 of file TargetLowering.h.

References llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT >::empty().

virtual bool llvm::TargetLoweringBase::isTruncateFree ( Type ,
Type  
) const
inlinevirtual

Return true if it's free to truncate a value of type Ty1 to type Ty2. e.g. On x86 it's free to truncate a i32 value in register EAX to i16 by referencing its sub-register AX.

Reimplemented in llvm::X86TargetLowering, llvm::SystemZTargetLowering, llvm::MSP430TargetLowering, and llvm::HexagonTargetLowering.

Definition at line 1172 of file TargetLowering.h.

Referenced by ExtendUsesToFormExtLoad(), getMemsetStores(), and llvm::TargetLowering::TargetLoweringOpt::ShrinkDemandedOp().

virtual bool llvm::TargetLoweringBase::isTruncateFree ( EVT  ,
EVT   
) const
inlinevirtual
bool llvm::TargetLoweringBase::isTruncStoreLegal ( EVT  ValVT,
EVT  MemVT 
) const
inline

Return true if the specified store with truncation is legal on this target.

Definition at line 488 of file TargetLowering.h.

References llvm::EVT::getSimpleVT(), getTruncStoreAction(), llvm::EVT::isSimple(), isTypeLegal(), and Legal.

bool llvm::TargetLoweringBase::isTypeLegal ( EVT  VT) const
inline

Return true if the target has native support for the specified value type. This means that it has a register that directly holds it without promotions or expansions.

Definition at line 285 of file TargetLowering.h.

References llvm::array_lengthof(), llvm::EVT::getSimpleVT(), llvm::EVT::isSimple(), and llvm::MVT::SimpleTy.

Referenced by llvm::ARMTargetLowering::allowTruncateForTailCall(), llvm::X86TargetLowering::allowTruncateForTailCall(), llvm::TargetLowering::BuildSDIV(), llvm::TargetLowering::BuildUDIV(), canOpTrap(), computeRegisterProperties(), EltsFromConsecutiveLoads(), ExpandBITCAST(), ExpandUnalignedLoad(), ExpandUnalignedStore(), FindMemType(), FindOptimalMemOpLowering(), getCopyFromPartsVector(), getCopyToParts(), llvm::FastISel::getRegForValue(), getTypeToPromoteTo(), getVectorTypeBreakdown(), getVectorTypeBreakdownMVT(), isLegalRC(), isNoopBitcast(), isOperationExpand(), isOperationLegal(), isOperationLegalOrCustom(), isOperationLegalOrPromote(), isTruncStoreLegal(), llvm::X86TargetLowering::isTypeDesirableForOp(), llvm::TargetLowering::isTypeDesirableForOp(), llvm::NVPTXTargetLowering::isTypeSupportedInIntrinsic(), LowerADDC_ADDE_SUBC_SUBE(), LowerATOMIC_STORE(), LowerFP_TO_SINT(), LowerFP_TO_UINT(), LowerSINT_TO_FP(), LowerUINT_TO_FP(), LowerVectorIntExtend(), PerformANDCombine(), PerformExtendCombine(), PerformFMACombine(), PerformLOADCombine(), PerformORCombine(), PerformSELECTCombine(), PerformShiftCombine(), PerformShuffleCombine(), PerformSTORECombine(), PerformVECTOR_SHUFFLECombine(), PerformXORCombine(), llvm::ResourcePriorityQueue::rawRegPressureDelta(), llvm::X86TargetLowering::ReplaceNodeResults(), llvm::ResourcePriorityQueue::scheduledNode(), llvm::TargetLowering::SimplifySetCC(), llvm::SystemZTargetLowering::SystemZTargetLowering(), and llvm::SelectionDAGBuilder::visitBitTestHeader().

virtual bool llvm::TargetLoweringBase::isVectorClearMaskLegal ( const SmallVectorImpl< int > &  ,
EVT   
) const
inlinevirtual

Similar to isShuffleMaskLegal. This is used by Targets can use this to indicate if there is a suitable VECTOR_SHUFFLE that can be used to replace a VAND with a constant pool entry.

Reimplemented in llvm::X86TargetLowering.

Definition at line 413 of file TargetLowering.h.

virtual bool llvm::TargetLoweringBase::isZExtFree ( Type ,
Type  
) const
inlinevirtual

Return true if any actual instruction that defines a value of type Ty1 implicitly zero-extends the value to Ty2 in the result register.

This does not necessarily include registers defined in unknown ways, such as incoming arguments, or copies from unknown virtual registers. Also, if isTruncateFree(Ty2, Ty1) is true, this does not necessarily apply to truncate instructions. e.g. on x86-64, all instructions that define 32-bit values implicit zero-extend the result out to 64 bits.

Reimplemented in llvm::X86TargetLowering, and llvm::MSP430TargetLowering.

Definition at line 1197 of file TargetLowering.h.

Referenced by isZExtFree(), and llvm::TargetLowering::TargetLoweringOpt::ShrinkDemandedOp().

virtual bool llvm::TargetLoweringBase::isZExtFree ( EVT  ,
EVT   
) const
inlinevirtual

Reimplemented in llvm::X86TargetLowering, and llvm::MSP430TargetLowering.

Definition at line 1201 of file TargetLowering.h.

virtual bool llvm::TargetLoweringBase::isZExtFree ( SDValue  Val,
EVT  VT2 
) const
inlinevirtual

Return true if zero-extending the specific node Val to type VT2 is free (either because it's implicitly zero-extended such as ARM ldrb / ldrh or because it's folded such as X86 zero-extending loads).

Reimplemented in llvm::X86TargetLowering, llvm::ARMTargetLowering, llvm::MSP430TargetLowering, and llvm::XCoreTargetLowering.

Definition at line 1239 of file TargetLowering.h.

References llvm::SDValue::getValueType(), and isZExtFree().

virtual void llvm::TargetLoweringBase::resetOperationActions ( )
inlinevirtual

Reset the operation actions based on target options.

Reimplemented in llvm::X86TargetLowering.

Definition at line 864 of file TargetLowering.h.

void llvm::TargetLoweringBase::setBooleanContents ( BooleanContent  Ty)
inlineprotected
void llvm::TargetLoweringBase::setBooleanVectorContents ( BooleanContent  Ty)
inlineprotected
void llvm::TargetLoweringBase::setCmpLibcallCC ( RTLIB::Libcall  Call,
ISD::CondCode  CC 
)
inline

Override the default CondCode to be used to test the result of the comparison libcall against zero.

Definition at line 1292 of file TargetLowering.h.

References llvm::Call.

Referenced by llvm::ARMTargetLowering::ARMTargetLowering().

void llvm::TargetLoweringBase::setCondCodeAction ( ISD::CondCode  CC,
MVT  VT,
LegalizeAction  Action 
)
inlineprotected

Indicate that the specified condition code is or isn't supported on the target and indicate what to do about it.

The lower 5 bits of the SimpleTy index into Nth 2bit set from the 32-bit value and the upper 27 bits index into the second dimension of the array to select what 32-bit value to use.

Definition at line 1034 of file TargetLowering.h.

References llvm::array_lengthof(), llvm::MVT::LAST_VALUETYPE, and llvm::MVT::SimpleTy.

Referenced by llvm::MipsSETargetLowering::addMSAFloatType(), llvm::MipsSETargetLowering::addMSAIntType(), llvm::HexagonTargetLowering::HexagonTargetLowering(), llvm::PPCTargetLowering::PPCTargetLowering(), llvm::R600TargetLowering::R600TargetLowering(), llvm::X86TargetLowering::resetOperationActions(), and llvm::SITargetLowering::SITargetLowering().

void llvm::TargetLoweringBase::setExceptionPointerRegister ( unsigned  R)
inlineprotected
void llvm::TargetLoweringBase::setExceptionSelectorRegister ( unsigned  R)
inlineprotected
void llvm::TargetLoweringBase::setIndexedLoadAction ( unsigned  IdxMode,
MVT  VT,
LegalizeAction  Action 
)
inlineprotected

Indicate that the specified indexed load does or does not work with the specified type and indicate what to do abort it.

NOTE: All indexed mode loads are initialized to Expand in TargetLowering.cpp

Definition at line 1009 of file TargetLowering.h.

References llvm::ISD::LAST_INDEXED_MODE, llvm::MVT::LAST_VALUETYPE, and llvm::MVT::SimpleTy.

Referenced by llvm::ARMTargetLowering::ARMTargetLowering(), llvm::HexagonTargetLowering::HexagonTargetLowering(), initActions(), llvm::MSP430TargetLowering::MSP430TargetLowering(), and llvm::PPCTargetLowering::PPCTargetLowering().

void llvm::TargetLoweringBase::setIndexedStoreAction ( unsigned  IdxMode,
MVT  VT,
LegalizeAction  Action 
)
inlineprotected

Indicate that the specified indexed store does or does not work with the specified type and indicate what to do about it.

NOTE: All indexed mode stores are initialized to Expand in TargetLowering.cpp

Definition at line 1023 of file TargetLowering.h.

References llvm::ISD::LAST_INDEXED_MODE, llvm::MVT::LAST_VALUETYPE, and llvm::MVT::SimpleTy.

Referenced by llvm::ARMTargetLowering::ARMTargetLowering(), llvm::HexagonTargetLowering::HexagonTargetLowering(), initActions(), and llvm::PPCTargetLowering::PPCTargetLowering().

void llvm::TargetLoweringBase::setInsertFencesForAtomic ( bool  fence)
inlineprotected

Set if the DAG builder should automatically insert fences and reduce the order of atomic memory operations to Monotonic.

Definition at line 1100 of file TargetLowering.h.

Referenced by llvm::ARMTargetLowering::ARMTargetLowering(), llvm::MipsTargetLowering::MipsTargetLowering(), and llvm::PPCTargetLowering::PPCTargetLowering().

void llvm::TargetLoweringBase::setIntDivIsCheap ( bool  isCheap = true)
inlineprotected

Tells the code generator that integer divide is expensive, and if possible, should be replaced by an alternate sequence of instructions not containing an integer divide.

Definition at line 938 of file TargetLowering.h.

Referenced by llvm::MSP430TargetLowering::MSP430TargetLowering(), and llvm::XCoreTargetLowering::XCoreTargetLowering().

void llvm::TargetLoweringBase::setJumpBufAlignment ( unsigned  Align)
inlineprotected

Set the target's required jmp_buf buffer alignment (in bytes); default is 0

Definition at line 1070 of file TargetLowering.h.

References Align().

void llvm::TargetLoweringBase::setJumpBufSize ( unsigned  Size)
inlineprotected

Set the target's required jmp_buf buffer size (in bytes); default is 200.

Definition at line 1064 of file TargetLowering.h.

void llvm::TargetLoweringBase::setJumpIsExpensive ( bool  isExpensive = true)
inlineprotected

Tells the code generator not to expand sequence of operations into a separate sequences that increases the amount of flow control.

Definition at line 931 of file TargetLowering.h.

Referenced by llvm::NVPTXTargetLowering::NVPTXTargetLowering().

void llvm::TargetLoweringBase::setLibcallCallingConv ( RTLIB::Libcall  Call,
CallingConv::ID  CC 
)
inline

Set the CallingConv that should be used for the specified libcall.

Definition at line 1303 of file TargetLowering.h.

References llvm::Call.

Referenced by llvm::ARMTargetLowering::ARMTargetLowering(), and llvm::X86TargetLowering::resetOperationActions().

void llvm::TargetLoweringBase::setLibcallName ( RTLIB::Libcall  Call,
const char *  Name 
)
inline
void llvm::TargetLoweringBase::setLoadExtAction ( unsigned  ExtType,
MVT  VT,
LegalizeAction  Action 
)
inlineprotected
void llvm::TargetLoweringBase::setMinFunctionAlignment ( unsigned  Align)
inlineprotected
void llvm::TargetLoweringBase::setMinimumJumpTableEntries ( int  Val)
inlineprotected

Indicate the number of blocks to generate jump tables rather than if sequence.

Definition at line 901 of file TargetLowering.h.

Referenced by llvm::HexagonTargetLowering::HexagonTargetLowering().

void llvm::TargetLoweringBase::setMinStackArgumentAlignment ( unsigned  Align)
inlineprotected

Set the minimum stack alignment of an argument (in log2(bytes)).

Definition at line 1094 of file TargetLowering.h.

References Align().

Referenced by llvm::ARMTargetLowering::ARMTargetLowering(), and llvm::PPCTargetLowering::PPCTargetLowering().

void llvm::TargetLoweringBase::setOperationAction ( unsigned  Op,
MVT  VT,
LegalizeAction  Action 
)
inlineprotected
void llvm::TargetLoweringBase::setPow2DivIsCheap ( bool  isCheap = true)
inlineprotected

Tells the code generator that it shouldn't generate srl/add/sra for a signed divide by power of two, and let the target handle it.

Definition at line 947 of file TargetLowering.h.

Referenced by llvm::PPCTargetLowering::PPCTargetLowering().

void llvm::TargetLoweringBase::setPrefFunctionAlignment ( unsigned  Align)
inlineprotected

Set the target's preferred function alignment. This should be set if there is a performance benefit to higher-than-minimum alignment (in log2(bytes))

Definition at line 1082 of file TargetLowering.h.

References Align().

Referenced by llvm::MSP430TargetLowering::MSP430TargetLowering(), llvm::PPCTargetLowering::PPCTargetLowering(), and llvm::X86TargetLowering::resetOperationActions().

void llvm::TargetLoweringBase::setPrefLoopAlignment ( unsigned  Align)
inlineprotected

Set the target's preferred loop alignment. Default alignment is zero, it means the target does not care about loop alignment. The alignment is specified in log2(bytes).

Definition at line 1089 of file TargetLowering.h.

References Align().

Referenced by llvm::HexagonTargetLowering::HexagonTargetLowering(), and llvm::X86TargetLowering::resetOperationActions().

void llvm::TargetLoweringBase::setSchedulingPreference ( Sched::Preference  Pref)
inlineprotected
void llvm::TargetLoweringBase::setSelectIsExpensive ( bool  isExpensive = true)
inlineprotected

Tells the code generator not to expand operations into sequences that use the select operations if possible.

Definition at line 925 of file TargetLowering.h.

void llvm::TargetLoweringBase::setStackPointerRegisterToSaveRestore ( unsigned  R)
inlineprotected
void llvm::TargetLoweringBase::setSupportJumpTables ( bool  Val)
inlineprotected

Indicate whether the target can generate code for jump tables.

Definition at line 895 of file TargetLowering.h.

Referenced by llvm::PPCTargetLowering::PPCTargetLowering().

void llvm::TargetLoweringBase::setTargetDAGCombine ( ISD::NodeType  NT)
inlineprotected
void llvm::TargetLoweringBase::setTruncStoreAction ( MVT  ValVT,
MVT  MemVT,
LegalizeAction  Action 
)
inlineprotected
void llvm::TargetLoweringBase::setUseUnderscoreLongJmp ( bool  Val)
inlineprotected

Indicate whether this target prefers to use _longjmp to implement llvm.longjmp or the non _ version. Defaults to false.

Definition at line 890 of file TargetLowering.h.

Referenced by llvm::PPCTargetLowering::PPCTargetLowering(), and llvm::X86TargetLowering::resetOperationActions().

void llvm::TargetLoweringBase::setUseUnderscoreSetJmp ( bool  Val)
inlineprotected

Indicate whether this target prefers to use _setjmp to implement llvm.setjmp or the non _ version. Defaults to false.

Definition at line 884 of file TargetLowering.h.

Referenced by llvm::PPCTargetLowering::PPCTargetLowering(), and llvm::X86TargetLowering::resetOperationActions().

virtual bool llvm::TargetLoweringBase::ShouldShrinkFPConstant ( EVT  ) const
inlinevirtual

If true, then instruction selection should seek to shrink the FP constant of the specified type to a smaller type in order to save space and / or reduce runtime.

Reimplemented in llvm::X86TargetLowering, llvm::SparcTargetLowering, and llvm::AMDGPUTargetLowering.

Definition at line 669 of file TargetLowering.h.

virtual bool llvm::TargetLoweringBase::shouldSplitVectorElementType ( EVT  ) const
inlinevirtual

Return true if a vector of the given type should be split (TypeSplitVector) instead of promoted (TypePromoteInteger) during type legalization.

Reimplemented in llvm::NVPTXTargetLowering, and llvm::SITargetLowering.

Definition at line 179 of file TargetLowering.h.

Referenced by computeRegisterProperties().

bool llvm::TargetLoweringBase::supportJumpTables ( ) const
inline

Return whether the target can generate code for jump tables.

Definition at line 761 of file TargetLowering.h.

Referenced by areJTsAllowed().

bool llvm::TargetLoweringBase::usesUnderscoreLongJmp ( ) const
inline

Determine if we should use _longjmp or longjmp to implement llvm.longjmp.

Definition at line 756 of file TargetLowering.h.

bool llvm::TargetLoweringBase::usesUnderscoreSetJmp ( ) const
inline

Determine if we should use _setjmp or setjmp to implement llvm.setjmp.

Definition at line 751 of file TargetLowering.h.

Member Data Documentation

unsigned llvm::TargetLoweringBase::MaxStoresPerMemcpy
protected

Specify maximum bytes of store instructions per memcpy call.

When lowering @llvm.memcpy this field specifies the maximum number of store operations that may be substituted for a call to memcpy. Targets must set this value based on the cost threshold for that target. Targets should assume that the memcpy will be done using as many of the largest store operations first, followed by smaller ones, if necessary, per alignment restrictions. For example, storing 7 bytes on a 32-bit machine with 32-bit alignment would result in one 4-byte store, a one 2-byte store and one 1-byte store. This only applies to copying a constant array of constant size.

Definition at line 1658 of file TargetLowering.h.

Referenced by llvm::ARMTargetLowering::ARMTargetLowering(), getMaxStoresPerMemcpy(), llvm::HexagonTargetLowering::HexagonTargetLowering(), llvm::MipsTargetLowering::MipsTargetLowering(), llvm::NVPTXTargetLowering::NVPTXTargetLowering(), llvm::PPCTargetLowering::PPCTargetLowering(), llvm::X86TargetLowering::resetOperationActions(), llvm::SystemZTargetLowering::SystemZTargetLowering(), TargetLoweringBase(), and llvm::XCoreTargetLowering::XCoreTargetLowering().

unsigned llvm::TargetLoweringBase::MaxStoresPerMemcpyOptSize
protected
unsigned llvm::TargetLoweringBase::MaxStoresPerMemmove
protected

Specify maximum bytes of store instructions per memmove call.

When lowering @llvm.memmove this field specifies the maximum number of store instructions that may be substituted for a call to memmove. Targets must set this value based on the cost threshold for that target. Targets should assume that the memmove will be done using as many of the largest store operations first, followed by smaller ones, if necessary, per alignment restrictions. For example, moving 9 bytes on a 32-bit machine with 8-bit alignment would result in nine 1-byte stores. This only applies to copying a constant array of constant size.

Definition at line 1674 of file TargetLowering.h.

Referenced by llvm::ARMTargetLowering::ARMTargetLowering(), getMaxStoresPerMemmove(), llvm::HexagonTargetLowering::HexagonTargetLowering(), llvm::NVPTXTargetLowering::NVPTXTargetLowering(), llvm::PPCTargetLowering::PPCTargetLowering(), llvm::X86TargetLowering::resetOperationActions(), TargetLoweringBase(), and llvm::XCoreTargetLowering::XCoreTargetLowering().

unsigned llvm::TargetLoweringBase::MaxStoresPerMemmoveOptSize
protected

Maximum number of store instructions that may be substituted for a call to memmove, used for functions with OpSize attribute.

Definition at line 1678 of file TargetLowering.h.

Referenced by llvm::ARMTargetLowering::ARMTargetLowering(), getMaxStoresPerMemmove(), llvm::PPCTargetLowering::PPCTargetLowering(), llvm::X86TargetLowering::resetOperationActions(), TargetLoweringBase(), and llvm::XCoreTargetLowering::XCoreTargetLowering().

unsigned llvm::TargetLoweringBase::MaxStoresPerMemset
protected

Specify maximum number of store instructions per memset call.

When lowering @llvm.memset this field specifies the maximum number of store operations that may be substituted for the call to memset. Targets must set this value based on the cost threshold for that target. Targets should assume that the memset will be done using as many of the largest store operations first, followed by smaller ones, if necessary, per alignment restrictions. For example, storing 9 bytes on a 32-bit machine with 16-bit alignment would result in four 2-byte stores and one 1-byte store. This only applies to setting a constant array of a constant size.

Definition at line 1641 of file TargetLowering.h.

Referenced by llvm::ARMTargetLowering::ARMTargetLowering(), getMaxStoresPerMemset(), llvm::NVPTXTargetLowering::NVPTXTargetLowering(), llvm::PPCTargetLowering::PPCTargetLowering(), llvm::X86TargetLowering::resetOperationActions(), llvm::SystemZTargetLowering::SystemZTargetLowering(), TargetLoweringBase(), and llvm::XCoreTargetLowering::XCoreTargetLowering().

unsigned llvm::TargetLoweringBase::MaxStoresPerMemsetOptSize
protected
bool llvm::TargetLoweringBase::PredictableSelectIsExpensive
protected

Tells the code generator that select is more expensive than a branch if the branch is usually predicted right.

Definition at line 1682 of file TargetLowering.h.

Referenced by llvm::ARMTargetLowering::ARMTargetLowering(), isPredictableSelectExpensive(), llvm::X86TargetLowering::resetOperationActions(), and TargetLoweringBase().


The documentation for this class was generated from the following files: