llvm::RegisterClassInfo Class Reference

#include <RegisterClassInfo.h>

Public Member Functions
	RegisterClassInfo ()
void	runOnMachineFunction (const MachineFunction &MF)
unsigned	getNumAllocatableRegs (const TargetRegisterClass *RC) const
ArrayRef< MCPhysReg >	getOrder (const TargetRegisterClass *RC) const
bool	isProperSubClass (const TargetRegisterClass *RC) const
unsigned	getLastCalleeSavedAlias (unsigned PhysReg) const
unsigned	getMinCost (const TargetRegisterClass *RC)
unsigned	getLastCostChange (const TargetRegisterClass *RC)
unsigned	getRegPressureSetLimit (unsigned Idx) const

Protected Member Functions
unsigned	computePSetLimit (unsigned Idx) const

Detailed Description

Definition at line 27 of file RegisterClassInfo.h.

Constructor & Destructor Documentation

RegisterClassInfo::RegisterClassInfo

(

)

Definition at line 32 of file RegisterClassInfo.cpp.

Member Function Documentation

unsigned RegisterClassInfo::computePSetLimit ( unsigned  Idx ) const

protected

This is not accurate because two overlapping register sets may have some nonoverlapping reserved registers. However, computing the allocation order for all register classes would be too expensive.

Definition at line 153 of file RegisterClassInfo.cpp.

References getNumAllocatableRegs(), llvm::TargetRegisterClass::getNumRegs(), llvm::TargetRegisterInfo::getRegClassPressureSets(), llvm::TargetRegisterInfo::getRegClassWeight(), llvm::TargetRegisterInfo::getRegPressureSetLimit(), if(), llvm::TargetRegisterInfo::regclass_begin(), llvm::TargetRegisterInfo::regclass_end(), llvm::RegClassWeight::RegWeight, and llvm::RegClassWeight::WeightLimit.

Referenced by getRegPressureSetLimit().

unsigned llvm::RegisterClassInfo::getLastCalleeSavedAlias ( unsigned  PhysReg ) const

inline

getLastCalleeSavedAlias - Returns the last callee saved register that overlaps PhysReg, or 0 if Reg doesn't overlap a CSR.

Definition at line 110 of file RegisterClassInfo.h.

References llvm::TargetRegisterInfo::isPhysicalRegister(), and N.

unsigned llvm::RegisterClassInfo::getLastCostChange ( const TargetRegisterClass *  RC )

inline

Get the position of the last cost change in getOrder(RC).

All registers in getOrder(RC).slice(getLastCostChange(RC)) will have the same cost according to TRI->getCostPerUse().

Definition at line 128 of file RegisterClassInfo.h.

unsigned llvm::RegisterClassInfo::getMinCost ( const TargetRegisterClass *  RC )

inline

Get the minimum register cost in RC's allocation order. This is the smallest value returned by TRI->getCostPerUse(Reg) for all the registers in getOrder(RC).

Definition at line 120 of file RegisterClassInfo.h.

unsigned llvm::RegisterClassInfo::getNumAllocatableRegs ( const TargetRegisterClass *  RC ) const

inline

getNumAllocatableRegs - Returns the number of actually allocatable registers in RC in the current function.

Definition at line 87 of file RegisterClassInfo.h.

Referenced by computePSetLimit().

ArrayRef<MCPhysReg> llvm::RegisterClassInfo::getOrder ( const TargetRegisterClass *  RC ) const

inline

getOrder - Returns the preferred allocation order for RC. The order contains no reserved registers, and registers that alias callee saved registers come last.

Definition at line 94 of file RegisterClassInfo.h.

Referenced by llvm::RegAllocBase::allocatePhysRegs(), and llvm::AllocationOrder::AllocationOrder().

unsigned llvm::RegisterClassInfo::getRegPressureSetLimit ( unsigned  Idx ) const

inline

Get the register unit limit for the given pressure set index.

RegisterClassInfo adjusts this limit for reserved registers.

Definition at line 135 of file RegisterClassInfo.h.

References computePSetLimit().

Referenced by computeExcessPressureDelta(), llvm::RegPressureTracker::getUpwardPressureDelta(), llvm::ScheduleDAGMI::initRegPressure(), and llvm::ScheduleDAGMI::updateScheduledPressure().

bool llvm::RegisterClassInfo::isProperSubClass ( const TargetRegisterClass *  RC ) const

inline

isProperSubClass - Returns true if RC has a legal super-class with more allocatable registers.

Register classes like GR32_NOSP are not proper sub-classes because esp is not allocatable. Similarly, tGPR is not a proper sub-class in Thumb mode because the GPR super-class is not legal.

Definition at line 104 of file RegisterClassInfo.h.

void RegisterClassInfo::runOnMachineFunction

(

const MachineFunction &

MF

)

runOnFunction - Prepare to answer questions about MF. This must be called before any other methods are used.

Definition at line 35 of file RegisterClassInfo.cpp.

References llvm::SmallVectorImpl< T >::clear(), llvm::TargetRegisterInfo::getCalleeSavedRegs(), llvm::TargetRegisterInfo::getNumRegClasses(), llvm::TargetRegisterInfo::getNumRegPressureSets(), llvm::MCRegisterInfo::getNumRegs(), llvm::MachineFunction::getRegInfo(), llvm::TargetMachine::getRegisterInfo(), llvm::MachineRegisterInfo::getReservedRegs(), llvm::MachineFunction::getTarget(), llvm::MCRegAliasIterator::isValid(), N, llvm::OwningArrayPtr< T >::reset(), llvm::SmallVectorImpl< T >::resize(), and llvm::BitVector::size().

Referenced by llvm::RegAllocBase::init().

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The documentation for this class was generated from the following files:

• RegisterClassInfo.h
• RegisterClassInfo.cpp