#include <X86Subtarget.h>

Inheritance diagram for llvm::X86Subtarget:

Collaboration diagram for llvm::X86Subtarget:

Public Member Functions
	X86Subtarget (const std::string &TT, const std::string &CPU, const std::string &FS, unsigned StackAlignOverride, bool is64Bit)

unsigned	getStackAlignment () const

unsigned	getMaxInlineSizeThreshold () const

void	ParseSubtargetFeatures (StringRef CPU, StringRef FS)

void	AutoDetectSubtargetFeatures ()

virtual void	resetSubtargetFeatures (const MachineFunction *MF)
	Reset the features for the X86 target. More...

bool	is64Bit () const
	Is this x86_64? (disregarding specific ABI / programming model) More...

bool	isTarget64BitILP32 () const
	Is this x86_64 with the ILP32 programming model (x32 ABI)? More...

bool	isTarget64BitLP64 () const
	Is this x86_64 with the LP64 programming model (standard AMD64, no x32)? More...

PICStyles::Style	getPICStyle () const

void	setPICStyle (PICStyles::Style Style)

bool	hasCMov () const

bool	hasMMX () const

bool	hasSSE1 () const

bool	hasSSE2 () const

bool	hasSSE3 () const

bool	hasSSSE3 () const

bool	hasSSE41 () const

bool	hasSSE42 () const

bool	hasAVX () const

bool	hasAVX2 () const

bool	hasAVX512 () const

bool	hasFp256 () const

bool	hasInt256 () const

bool	hasSSE4A () const

bool	has3DNow () const

bool	has3DNowA () const

bool	hasPOPCNT () const

bool	hasAES () const

bool	hasPCLMUL () const

bool	hasFMA () const

bool	hasFMA4 () const

bool	hasXOP () const

bool	hasTBM () const

bool	hasMOVBE () const

bool	hasRDRAND () const

bool	hasF16C () const

bool	hasFSGSBase () const

bool	hasLZCNT () const

bool	hasBMI () const

bool	hasBMI2 () const

bool	hasRTM () const

bool	hasHLE () const

bool	hasADX () const

bool	hasSHA () const

bool	hasPRFCHW () const

bool	hasRDSEED () const

bool	isBTMemSlow () const

bool	isUnalignedMemAccessFast () const

bool	hasVectorUAMem () const

bool	hasCmpxchg16b () const

bool	useLeaForSP () const

bool	hasSlowDivide () const

bool	padShortFunctions () const

bool	callRegIndirect () const

bool	LEAusesAG () const

bool	hasCDI () const

bool	hasPFI () const

bool	hasERI () const

bool	isAtom () const

const Triple &	getTargetTriple () const

bool	isTargetDarwin () const

bool	isTargetFreeBSD () const

bool	isTargetSolaris () const

bool	isTargetELF () const

bool	isTargetLinux () const

bool	isTargetNaCl () const

bool	isTargetNaCl32 () const

bool	isTargetNaCl64 () const

bool	isTargetWindows () const

bool	isTargetMingw () const

bool	isTargetCygwin () const

bool	isTargetCygMing () const

bool	isTargetCOFF () const

bool	isTargetEnvMacho () const

bool	isOSWindows () const

bool	isTargetWin64 () const

bool	isTargetWin32 () const

bool	isPICStyleSet () const

bool	isPICStyleGOT () const

bool	isPICStyleRIPRel () const

bool	isPICStyleStubPIC () const

bool	isPICStyleStubNoDynamic () const

bool	isPICStyleStubAny () const

bool	isCallingConvWin64 (CallingConv::ID CC) const

unsigned char	ClassifyGlobalReference (const GlobalValue *GV, const TargetMachine &TM) const

unsigned char	ClassifyBlockAddressReference () const

bool	IsLegalToCallImmediateAddr (const TargetMachine &TM) const

const char *	getBZeroEntry () const

bool	hasSinCos () const

bool	enableMachineScheduler () const LLVM_OVERRIDE
	Enable the MachineScheduler pass for all X86 subtargets. More...

bool	enablePostRAScheduler (CodeGenOpt::Level OptLevel, TargetSubtargetInfo::AntiDepBreakMode &Mode, RegClassVector &CriticalPathRCs) const
	enablePostRAScheduler - run for Atom optimization. More...

bool	postRAScheduler () const

const InstrItineraryData &	getInstrItineraryData () const

Protected Types
enum	X86SSEEnum { NoMMXSSE, MMX, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, AVX, AVX2, AVX512F }

enum	X863DNowEnum { NoThreeDNow, ThreeDNow, ThreeDNowA }

enum	X86ProcFamilyEnum { Others, IntelAtom, IntelSLM }

Protected Attributes
X86ProcFamilyEnum	X86ProcFamily
	X86ProcFamily - X86 processor family: Intel Atom, and others. More...

PICStyles::Style	PICStyle

X86SSEEnum	X86SSELevel

X863DNowEnum	X863DNowLevel

bool	HasCMov

bool	HasX86_64

bool	HasPOPCNT
	HasPOPCNT - True if the processor supports POPCNT. More...

bool	HasSSE4A
	HasSSE4A - True if the processor supports SSE4A instructions. More...

bool	HasAES
	HasAES - Target has AES instructions. More...

bool	HasPCLMUL
	HasPCLMUL - Target has carry-less multiplication. More...

bool	HasFMA
	HasFMA - Target has 3-operand fused multiply-add. More...

bool	HasFMA4
	HasFMA4 - Target has 4-operand fused multiply-add. More...

bool	HasXOP
	HasXOP - Target has XOP instructions. More...

bool	HasTBM
	HasTBM - Target has TBM instructions. More...

bool	HasMOVBE
	HasMOVBE - True if the processor has the MOVBE instruction. More...

bool	HasRDRAND
	HasRDRAND - True if the processor has the RDRAND instruction. More...

bool	HasF16C
	HasF16C - Processor has 16-bit floating point conversion instructions. More...

bool	HasFSGSBase
	HasFSGSBase - Processor has FS/GS base insturctions. More...

bool	HasLZCNT
	HasLZCNT - Processor has LZCNT instruction. More...

bool	HasBMI
	HasBMI - Processor has BMI1 instructions. More...

bool	HasBMI2
	HasBMI2 - Processor has BMI2 instructions. More...

bool	HasRTM
	HasRTM - Processor has RTM instructions. More...

bool	HasHLE
	HasHLE - Processor has HLE. More...

bool	HasADX
	HasADX - Processor has ADX instructions. More...

bool	HasSHA
	HasSHA - Processor has SHA instructions. More...

bool	HasPRFCHW
	HasPRFCHW - Processor has PRFCHW instructions. More...

bool	HasRDSEED
	HasRDSEED - Processor has RDSEED instructions. More...

bool	IsBTMemSlow
	IsBTMemSlow - True if BT (bit test) of memory instructions are slow. More...

bool	IsUAMemFast
	IsUAMemFast - True if unaligned memory access is fast. More...

bool	HasVectorUAMem

bool	HasCmpxchg16b

bool	UseLeaForSP

bool	HasSlowDivide

bool	PostRAScheduler
	PostRAScheduler - True if using post-register-allocation scheduler. More...

bool	PadShortFunctions

bool	CallRegIndirect

bool	LEAUsesAG

bool	HasPFI
	Processor has AVX-512 PreFetch Instructions. More...

bool	HasERI
	Processor has AVX-512 Exponential and Reciprocal Instructions. More...

bool	HasCDI
	Processor has AVX-512 Conflict Detection Instructions. More...

unsigned	stackAlignment

unsigned	MaxInlineSizeThreshold

Triple	TargetTriple
	TargetTriple - What processor and OS we're targeting. More...

InstrItineraryData	InstrItins
	Instruction itineraries for scheduling. More...

Detailed Description

Definition at line 42 of file X86Subtarget.h.

Member Enumeration Documentation

enum llvm::X86Subtarget::X863DNowEnum

protected

Enumerator
NoThreeDNow
ThreeDNow
ThreeDNowA

Definition at line 48 of file X86Subtarget.h.

enum llvm::X86Subtarget::X86ProcFamilyEnum

protected

Enumerator
Others
IntelAtom
IntelSLM

Definition at line 52 of file X86Subtarget.h.

enum llvm::X86Subtarget::X86SSEEnum

protected

Enumerator
NoMMXSSE
MMX
SSE1
SSE2
SSE3
SSSE3
SSE41
SSE42
AVX
AVX2
AVX512F

Definition at line 44 of file X86Subtarget.h.

Constructor & Destructor Documentation

X86Subtarget::X86Subtarget	(	const std::string &	TT,
		const std::string &	CPU,
		const std::string &	FS,
		unsigned	StackAlignOverride,
		bool	is64Bit
	)

This constructor initializes the data members to match that of the specified triple.

Definition at line 536 of file X86Subtarget.cpp.

References resetSubtargetFeatures().

Member Function Documentation

void X86Subtarget::AutoDetectSubtargetFeatures ( )

AutoDetectSubtargetFeatures - Auto-detect CPU features using CPUID instruction.

Definition at line 193 of file X86Subtarget.cpp.

References AVX, AVX2, AVX512F, llvm::X86_MC::DetectFamilyModel(), llvm::N86::EAX, llvm::N86::EBX, llvm::N86::ECX, llvm::N86::EDX, llvm::X86_MC::GetCpuIDAndInfo(), llvm::X86_MC::GetCpuIDAndInfoEx(), HasADX, HasAES, HasBMI, HasBMI2, HasCDI, HasCMov, HasCmpxchg16b, HasERI, HasF16C, HasFMA, HasFMA4, HasFSGSBase, HasHLE, HasLZCNT, HasMOVBE, HasPCLMUL, HasPFI, HasPOPCNT, HasPRFCHW, HasRDRAND, HasRDSEED, HasRTM, HasSHA, HasSSE4A, HasTBM, HasX86_64, HasXOP, IntelAtom, IntelSLM, IsBTMemSlow, IsUAMemFast, llvm::LibFunc::memcmp, MMX, OSHasAVXSupport(), SSE1, SSE2, SSE3, SSE41, SSE42, SSSE3, UseLeaForSP, X86ProcFamily, and X86SSELevel.

bool llvm::X86Subtarget::callRegIndirect ( ) const

inline

Definition at line 301 of file X86Subtarget.h.

References CallRegIndirect.

unsigned char X86Subtarget::ClassifyBlockAddressReference ( ) const

ClassifyBlockAddressReference - Classify a blockaddress reference for the current subtarget according to how we should reference it in a non-pcrel context.

Definition at line 40 of file X86Subtarget.cpp.

References isPICStyleGOT(), isPICStyleStubPIC(), llvm::X86II::MO_GOTOFF, llvm::X86II::MO_NO_FLAG, and llvm::X86II::MO_PIC_BASE_OFFSET.

unsigned char X86Subtarget::ClassifyGlobalReference	(	const GlobalValue *	GV,
		const TargetMachine &	TM
	)		const

ClassifyGlobalReference - Classify a global variable reference for the current subtarget according to how we should reference it in a non-pcrel context.

Definition at line 55 of file X86Subtarget.cpp.

Referenced by llvm::X86TargetLowering::isLegalAddressingMode(), and llvm::X86TargetLowering::LowerAsmOperandForConstraint().

bool llvm::X86Subtarget::enableMachineScheduler ( ) const

inline

Enable the MachineScheduler pass for all X86 subtargets.

Definition at line 394 of file X86Subtarget.h.

bool X86Subtarget::enablePostRAScheduler	(	CodeGenOpt::Level	OptLevel,
		TargetSubtargetInfo::AntiDepBreakMode &	Mode,
		RegClassVector &	CriticalPathRCs
	)		const

enablePostRAScheduler - run for Atom optimization.

Definition at line 549 of file X86Subtarget.cpp.

References llvm::TargetSubtargetInfo::ANTIDEP_CRITICAL, llvm::CodeGenOpt::Default, and PostRAScheduler.

const char * X86Subtarget::getBZeroEntry ( ) const

This function returns the name of a function which has an interface like the non-standard bzero function, if such a function exists on the current subtarget and it is considered prefereable over memset with zero passed as the second argument. Otherwise it returns null.

getBZeroEntry - This function returns the name of a function which has an interface like the non-standard bzero function, if such a function exists on the current subtarget and it is considered prefereable over memset with zero passed as the second argument. Otherwise it returns null.

Definition at line 150 of file X86Subtarget.cpp.

References getTargetTriple().

Referenced by llvm::X86SelectionDAGInfo::EmitTargetCodeForMemset().

const InstrItineraryData& llvm::X86Subtarget::getInstrItineraryData ( ) const

inline

getInstrItins = Return the instruction itineraries based on the subtarget selection.

Definition at line 405 of file X86Subtarget.h.

References InstrItins.

unsigned llvm::X86Subtarget::getMaxInlineSizeThreshold ( ) const

inline

getMaxInlineSizeThreshold - Returns the maximum memset / memcpy size that still makes it profitable to inline the call.

Definition at line 223 of file X86Subtarget.h.

References MaxInlineSizeThreshold.

Referenced by llvm::X86SelectionDAGInfo::EmitTargetCodeForMemcpy(), and llvm::X86SelectionDAGInfo::EmitTargetCodeForMemset().

PICStyles::Style llvm::X86Subtarget::getPICStyle ( ) const

inline

Definition at line 254 of file X86Subtarget.h.

References PICStyle.

unsigned llvm::X86Subtarget::getStackAlignment ( ) const

inline

getStackAlignment - Returns the minimum alignment known to hold of the stack frame on entry to the function and which must be maintained by every function for this subtarget.

Definition at line 219 of file X86Subtarget.h.

References stackAlignment.

const Triple& llvm::X86Subtarget::getTargetTriple ( ) const

inline

Definition at line 309 of file X86Subtarget.h.

References TargetTriple.

Referenced by getBZeroEntry(), and hasSinCos().

bool llvm::X86Subtarget::has3DNow ( ) const

inline

Definition at line 271 of file X86Subtarget.h.

References ThreeDNow, and X863DNowLevel.

bool llvm::X86Subtarget::has3DNowA ( ) const

inline

Definition at line 272 of file X86Subtarget.h.

References ThreeDNowA, and X863DNowLevel.

bool llvm::X86Subtarget::hasADX ( ) const

inline

Definition at line 290 of file X86Subtarget.h.

References HasADX.

bool llvm::X86Subtarget::hasAES ( ) const

inline

Definition at line 274 of file X86Subtarget.h.

References HasAES.

bool llvm::X86Subtarget::hasAVX ( ) const

inline

Definition at line 265 of file X86Subtarget.h.

References AVX, and X86SSELevel.

Referenced by CopyToFromAsymmetricReg(), hasFp256(), matchIntegerMINMAX(), llvm::X86InstrInfo::shouldScheduleAdjacent(), and X86ChooseCmpOpcode().

bool llvm::X86Subtarget::hasAVX2 ( ) const

inline

Definition at line 266 of file X86Subtarget.h.

References AVX2, and X86SSELevel.

Referenced by hasInt256(), matchIntegerMINMAX(), PerformSELECTCombine(), and llvm::X86InstrInfo::setExecutionDomain().

bool llvm::X86Subtarget::hasAVX512 ( ) const

inline

Definition at line 267 of file X86Subtarget.h.

References AVX512F, and X86SSELevel.

Referenced by CopyToFromAsymmetricReg(), getLoadStoreRegOpcode(), llvm::X86RegisterInfo::getReservedRegs(), llvm::X86TargetLowering::getSetCCResultType(), LowerScalarImmediateShift(), LowerScalarVariableShift(), LowerShift(), LowerVectorBroadcast(), LowerVSETCC(), PerformSELECTCombine(), and llvm::X86TargetLowering::resetOperationActions().

bool llvm::X86Subtarget::hasBMI ( ) const

inline

Definition at line 286 of file X86Subtarget.h.

References HasBMI.

Referenced by PerformAndCombine(), PerformXorCombine(), and llvm::X86TargetLowering::resetOperationActions().

bool llvm::X86Subtarget::hasBMI2 ( ) const

inline

Definition at line 287 of file X86Subtarget.h.

References HasBMI2.

Referenced by PerformAndCombine().

bool llvm::X86Subtarget::hasCDI ( ) const

inline

Definition at line 303 of file X86Subtarget.h.

References HasCDI.

bool llvm::X86Subtarget::hasCMov ( ) const

inline

Definition at line 257 of file X86Subtarget.h.

References HasCMov.

Referenced by llvm::X86InstrInfo::canInsertSelect(), and PerformXorCombine().

bool llvm::X86Subtarget::hasCmpxchg16b ( ) const

inline

Definition at line 297 of file X86Subtarget.h.

References HasCmpxchg16b.

Referenced by llvm::X86TargetLowering::resetOperationActions().

bool llvm::X86Subtarget::hasERI ( ) const

inline

Definition at line 305 of file X86Subtarget.h.

References HasERI.

bool llvm::X86Subtarget::hasF16C ( ) const

inline

Definition at line 283 of file X86Subtarget.h.

References HasF16C.

bool llvm::X86Subtarget::hasFMA ( ) const

inline

Definition at line 276 of file X86Subtarget.h.

References HasFMA.

Referenced by llvm::X86TargetLowering::isFMAFasterThanFMulAndFAdd(), PerformFMACombine(), and llvm::X86TargetLowering::resetOperationActions().

bool llvm::X86Subtarget::hasFMA4 ( ) const

inline

Definition at line 278 of file X86Subtarget.h.

References HasFMA, and HasFMA4.

Referenced by llvm::X86TargetLowering::isFMAFasterThanFMulAndFAdd(), PerformFMACombine(), and llvm::X86TargetLowering::resetOperationActions().

bool llvm::X86Subtarget::hasFp256 ( ) const

inline

Definition at line 268 of file X86Subtarget.h.

References hasAVX().

Referenced by llvm::X86TargetLowering::getOptimalMemOpType(), llvm::X86TargetLowering::getSingleConstraintMatchWeight(), LowerANY_EXTEND(), LowerEXTRACT_SUBVECTOR(), LowerINSERT_SUBVECTOR(), LowerVectorBroadcast(), LowerZERO_EXTEND(), PerformFADDCombine(), PerformFSUBCombine(), PerformSExtCombine(), PerformShuffleCombine(), and llvm::X86TargetLowering::resetOperationActions().

bool llvm::X86Subtarget::hasFSGSBase ( ) const

inline

Definition at line 284 of file X86Subtarget.h.

References HasFSGSBase.

bool llvm::X86Subtarget::hasHLE ( ) const

inline

Definition at line 289 of file X86Subtarget.h.

References HasHLE.

bool llvm::X86Subtarget::hasInt256 ( ) const

inline

bool llvm::X86Subtarget::hasLZCNT ( ) const

inline

Definition at line 285 of file X86Subtarget.h.

References HasLZCNT.

Referenced by llvm::X86TargetLowering::resetOperationActions().

bool llvm::X86Subtarget::hasMMX ( ) const

inline

Definition at line 258 of file X86Subtarget.h.

References MMX, and X86SSELevel.

Referenced by llvm::X86TargetLowering::getRegForInlineAsmConstraint(), llvm::X86TargetLowering::getSingleConstraintMatchWeight(), LowerBITCAST(), and llvm::X86TargetLowering::resetOperationActions().

bool llvm::X86Subtarget::hasMOVBE ( ) const

inline

Definition at line 281 of file X86Subtarget.h.

References HasMOVBE.

bool llvm::X86Subtarget::hasPCLMUL ( ) const

inline

Definition at line 275 of file X86Subtarget.h.

References HasPCLMUL.

bool llvm::X86Subtarget::hasPFI ( ) const

inline

Definition at line 304 of file X86Subtarget.h.

References HasPFI.

bool llvm::X86Subtarget::hasPOPCNT ( ) const

inline

Definition at line 273 of file X86Subtarget.h.

References HasPOPCNT.

Referenced by llvm::X86TargetLowering::resetOperationActions().

bool llvm::X86Subtarget::hasPRFCHW ( ) const

inline

Definition at line 292 of file X86Subtarget.h.

References HasPRFCHW.

bool llvm::X86Subtarget::hasRDRAND ( ) const

inline

Definition at line 282 of file X86Subtarget.h.

References HasRDRAND.

bool llvm::X86Subtarget::hasRDSEED ( ) const

inline

Definition at line 293 of file X86Subtarget.h.

References HasRDSEED.

bool llvm::X86Subtarget::hasRTM ( ) const

inline

Definition at line 288 of file X86Subtarget.h.

References HasRTM.

bool llvm::X86Subtarget::hasSHA ( ) const

inline

Definition at line 291 of file X86Subtarget.h.

References HasSHA.

bool X86Subtarget::hasSinCos ( ) const

This function returns true if the target has sincos() routine in its compiler runtime or math libraries.

Definition at line 159 of file X86Subtarget.cpp.

References getTargetTriple(), is64Bit(), llvm::Triple::isMacOSX(), and llvm::Triple::isMacOSXVersionLT().

Referenced by llvm::X86TargetLowering::resetOperationActions().

bool llvm::X86Subtarget::hasSlowDivide ( ) const

inline

Definition at line 299 of file X86Subtarget.h.

References HasSlowDivide.

Referenced by llvm::X86TargetLowering::resetOperationActions().

bool llvm::X86Subtarget::hasSSE1 ( ) const

inline

Definition at line 259 of file X86Subtarget.h.

References SSE1, and X86SSELevel.

Referenced by llvm::X86TargetLowering::getByValTypeAlignment(), llvm::X86JITInfo::getLazyResolverFunction(), llvm::X86TargetLowering::getOptimalMemOpType(), llvm::X86TargetLowering::getRegForInlineAsmConstraint(), llvm::X86TargetLowering::getSingleConstraintMatchWeight(), llvm::X86TargetLowering::LowerXConstraint(), PerformSELECTCombine(), llvm::X86TargetLowering::resetOperationActions(), X86ChooseCmpOpcode(), and llvm::X86TargetLowering::X86TargetLowering().

bool llvm::X86Subtarget::hasSSE2 ( ) const

inline

bool llvm::X86Subtarget::hasSSE3 ( ) const

inline

Definition at line 261 of file X86Subtarget.h.

References SSE3, and X86SSELevel.

Referenced by llvm::X86TargetLowering::BuildFILD(), isMOVSHDUPMask(), isMOVSLDUPMask(), PerformFADDCombine(), PerformFSUBCombine(), and llvm::X86TargetLowering::resetOperationActions().

bool llvm::X86Subtarget::hasSSE41 ( ) const

inline

Definition at line 263 of file X86Subtarget.h.

References SSE41, and X86SSELevel.

Referenced by LowerMUL(), LowerVECTOR_SHUFFLEtoBlend(), LowerVectorAllZeroTest(), LowerVectorIntExtend(), LowerVSETCC(), matchIntegerMINMAX(), PerformLOADCombine(), PerformOrCombine(), and llvm::X86TargetLowering::resetOperationActions().

bool llvm::X86Subtarget::hasSSE42 ( ) const

inline

Definition at line 264 of file X86Subtarget.h.

References SSE42, and X86SSELevel.

Referenced by llvm::X86TargetLowering::EmitInstrWithCustomInserter(), and LowerVSETCC().

bool llvm::X86Subtarget::hasSSE4A ( ) const

inline

Definition at line 270 of file X86Subtarget.h.

References HasSSE4A.

bool llvm::X86Subtarget::hasSSSE3 ( ) const

inline

Definition at line 262 of file X86Subtarget.h.

References SSSE3, and X86SSELevel.

Referenced by isPALIGNRMask(), LowerVECTOR_SHUFFLEv16i8(), LowerVECTOR_SHUFFLEv8i16(), PerformAddCombine(), PerformOrCombine(), and PerformSubCombine().

bool llvm::X86Subtarget::hasTBM ( ) const

inline

Definition at line 280 of file X86Subtarget.h.

References HasTBM.

Referenced by PerformAndCombine().

bool llvm::X86Subtarget::hasVectorUAMem ( ) const

inline

Definition at line 296 of file X86Subtarget.h.

References HasVectorUAMem.

bool llvm::X86Subtarget::hasXOP ( ) const

inline

Definition at line 279 of file X86Subtarget.h.

References HasXOP.

bool llvm::X86Subtarget::is64Bit ( ) const

inline

Is this x86_64? (disregarding specific ABI / programming model)

Definition at line 240 of file X86Subtarget.h.

bool llvm::X86Subtarget::isAtom ( ) const

inline

Definition at line 307 of file X86Subtarget.h.

References IntelAtom, and X86ProcFamily.

Referenced by llvm::X86TargetLowering::resetOperationActions().

bool llvm::X86Subtarget::isBTMemSlow ( ) const

inline

Definition at line 294 of file X86Subtarget.h.

References IsBTMemSlow.

bool llvm::X86Subtarget::isCallingConvWin64 ( CallingConv::ID CC ) const

inline

Definition at line 362 of file X86Subtarget.h.

References isTargetWin64(), llvm::CallingConv::X86_64_SysV, and llvm::CallingConv::X86_64_Win64.

bool X86Subtarget::IsLegalToCallImmediateAddr ( const TargetMachine & TM ) const

IsLegalToCallImmediateAddr - Return true if the subtarget allows calls to immediate address.

Definition at line 167 of file X86Subtarget.cpp.

References llvm::TargetMachine::getRelocationModel(), isTargetELF(), and llvm::Reloc::Static.

bool llvm::X86Subtarget::isOSWindows ( ) const

inline

Definition at line 336 of file X86Subtarget.h.

References llvm::Triple::isOSWindows(), and TargetTriple.

Referenced by llvm::X86FrameLowering::emitPrologue(), and llvm::X86TargetLowering::resetOperationActions().

bool llvm::X86Subtarget::isPICStyleGOT ( ) const

inline

Definition at line 347 of file X86Subtarget.h.

References llvm::PICStyles::GOT, and PICStyle.

Referenced by ClassifyBlockAddressReference(), ClassifyGlobalReference(), llvm::X86TargetLowering::getJumpTableEncoding(), llvm::X86TargetLowering::LowerAsmOperandForConstraint(), and llvm::X86TargetLowering::LowerCustomJumpTableEntry().

bool llvm::X86Subtarget::isPICStyleRIPRel ( ) const

inline

Definition at line 348 of file X86Subtarget.h.

References PICStyle, and llvm::PICStyles::RIPRel.

Referenced by ClassifyGlobalReference(), llvm::X86TargetLowering::getPICJumpTableRelocBaseExpr(), and llvm::X86AsmPrinter::PrintAsmOperand().

bool llvm::X86Subtarget::isPICStyleSet ( ) const

inline

Definition at line 346 of file X86Subtarget.h.

References llvm::PICStyles::None, and PICStyle.

bool llvm::X86Subtarget::isPICStyleStubAny ( ) const

inline

Definition at line 357 of file X86Subtarget.h.

References PICStyle, llvm::PICStyles::StubDynamicNoPIC, and llvm::PICStyles::StubPIC.

bool llvm::X86Subtarget::isPICStyleStubNoDynamic ( ) const

inline

Definition at line 354 of file X86Subtarget.h.

References PICStyle, and llvm::PICStyles::StubDynamicNoPIC.

Referenced by ClassifyGlobalReference().

bool llvm::X86Subtarget::isPICStyleStubPIC ( ) const

inline

Definition at line 350 of file X86Subtarget.h.

References PICStyle, and llvm::PICStyles::StubPIC.

Referenced by ClassifyBlockAddressReference(), ClassifyGlobalReference(), and llvm::X86TargetLowering::LowerAsmOperandForConstraint().

bool llvm::X86Subtarget::isTarget64BitILP32 ( ) const

inline

Is this x86_64 with the ILP32 programming model (x32 ABI)?

Definition at line 245 of file X86Subtarget.h.

References llvm::Triple::getEnvironment(), llvm::Triple::GNUX32, and TargetTriple.

bool llvm::X86Subtarget::isTarget64BitLP64 ( ) const

inline

Is this x86_64 with the LP64 programming model (standard AMD64, no x32)?

Definition at line 250 of file X86Subtarget.h.

References llvm::Triple::getEnvironment(), llvm::Triple::GNUX32, and TargetTriple.

Referenced by llvm::X86FrameLowering::eliminateCallFramePseudoInstr(), llvm::X86FrameLowering::emitEpilogue(), llvm::X86FrameLowering::emitPrologue(), and llvm::X86RegisterInfo::getPointerRegClass().

bool llvm::X86Subtarget::isTargetCOFF ( ) const

inline

Definition at line 330 of file X86Subtarget.h.

References llvm::Triple::ELF, llvm::Triple::getEnvironment(), llvm::Triple::isOSBinFormatCOFF(), and TargetTriple.

Referenced by createTLOF(), llvm::X86AsmPrinter::EmitEndOfAsmFile(), llvm::X86AsmPrinter::EmitStartOfAsmFile(), llvm::X86AsmPrinter::runOnMachineFunction(), and llvm::X86TargetMachine::X86TargetMachine().

bool llvm::X86Subtarget::isTargetCygMing ( ) const

inline

Definition at line 329 of file X86Subtarget.h.

References llvm::Triple::isOSCygMing(), and TargetTriple.

Referenced by llvm::X86AsmPrinter::EmitEndOfAsmFile(), llvm::X86FrameLowering::emitPrologue(), isTargetWin32(), and llvm::X86TargetLowering::resetOperationActions().

bool llvm::X86Subtarget::isTargetCygwin ( ) const

inline

Definition at line 328 of file X86Subtarget.h.

References llvm::Triple::Cygwin, llvm::Triple::getOS(), and TargetTriple.

bool llvm::X86Subtarget::isTargetDarwin ( ) const

inline

Definition at line 311 of file X86Subtarget.h.

References llvm::Triple::isOSDarwin(), and TargetTriple.

Referenced by llvm::X86FrameLowering::adjustForSegmentedStacks(), ClassifyGlobalReference(), LowerFSINCOS(), llvm::X86TargetLowering::resetOperationActions(), and llvm::X86TargetMachine::X86TargetMachine().

bool llvm::X86Subtarget::isTargetELF ( ) const

inline

Definition at line 318 of file X86Subtarget.h.

References llvm::Triple::ELF, llvm::Triple::getEnvironment(), llvm::Triple::isOSBinFormatELF(), and TargetTriple.

Referenced by ClassifyGlobalReference(), createTLOF(), llvm::X86AsmPrinter::EmitEndOfAsmFile(), IsLegalToCallImmediateAddr(), llvm::X86TargetLowering::resetOperationActions(), and llvm::X86TargetMachine::X86TargetMachine().

bool llvm::X86Subtarget::isTargetEnvMacho ( ) const

inline

Definition at line 334 of file X86Subtarget.h.

References llvm::Triple::isEnvironmentMachO(), and TargetTriple.

Referenced by createTLOF(), llvm::X86AsmPrinter::EmitEndOfAsmFile(), llvm::X86FrameLowering::emitPrologue(), llvm::X86AsmPrinter::EmitStartOfAsmFile(), llvm::X86TargetLowering::resetOperationActions(), and llvm::X86AsmPrinter::runOnMachineFunction().

bool llvm::X86Subtarget::isTargetFreeBSD ( ) const

inline

Definition at line 312 of file X86Subtarget.h.

References llvm::Triple::FreeBSD, llvm::Triple::getOS(), and TargetTriple.

Referenced by llvm::X86FrameLowering::adjustForSegmentedStacks().

bool llvm::X86Subtarget::isTargetLinux ( ) const

inline

Definition at line 322 of file X86Subtarget.h.

References llvm::Triple::isOSLinux(), and TargetTriple.

Referenced by llvm::X86FrameLowering::adjustForHiPEPrologue(), llvm::X86FrameLowering::adjustForSegmentedStacks(), createTLOF(), and llvm::X86TargetLowering::getStackCookieLocation().

bool llvm::X86Subtarget::isTargetMingw ( ) const

inline

Definition at line 327 of file X86Subtarget.h.

References llvm::Triple::getOS(), llvm::Triple::MinGW32, and TargetTriple.

Referenced by llvm::X86TargetLowering::resetOperationActions().

bool llvm::X86Subtarget::isTargetNaCl ( ) const

inline

Definition at line 323 of file X86Subtarget.h.

References llvm::Triple::isOSNaCl(), and TargetTriple.

Referenced by isTargetNaCl32(), and isTargetNaCl64().

bool llvm::X86Subtarget::isTargetNaCl32 ( ) const

inline

Definition at line 324 of file X86Subtarget.h.

References is64Bit(), and isTargetNaCl().

bool llvm::X86Subtarget::isTargetNaCl64 ( ) const

inline

Definition at line 325 of file X86Subtarget.h.

References is64Bit(), and isTargetNaCl().

bool llvm::X86Subtarget::isTargetSolaris ( ) const

inline

Definition at line 315 of file X86Subtarget.h.

References llvm::Triple::getOS(), llvm::Triple::Solaris, and TargetTriple.

bool llvm::X86Subtarget::isTargetWin32 ( ) const

inline

Definition at line 342 of file X86Subtarget.h.

References isTargetCygMing(), and isTargetWindows().

Referenced by llvm::X86FrameLowering::adjustForSegmentedStacks().

bool llvm::X86Subtarget::isTargetWin64 ( ) const

inline

Definition at line 338 of file X86Subtarget.h.

References llvm::Triple::isOSWindows(), and TargetTriple.

Referenced by ClassifyGlobalReference(), llvm::X86FrameLowering::emitPrologue(), llvm::X86RegisterInfo::getPointerRegClass(), isCallingConvWin64(), llvm::X86TargetLowering::resetOperationActions(), and llvm::X86RegisterInfo::X86RegisterInfo().

bool llvm::X86Subtarget::isTargetWindows ( ) const

inline

Definition at line 326 of file X86Subtarget.h.

References llvm::Triple::getOS(), TargetTriple, and llvm::Triple::Win32.

Referenced by computeBytesPoppedByCallee(), llvm::X86AsmPrinter::EmitEndOfAsmFile(), llvm::X86TargetLowering::isTargetFTOL(), isTargetWin32(), and llvm::X86TargetLowering::resetOperationActions().

bool llvm::X86Subtarget::isUnalignedMemAccessFast ( ) const

inline

Definition at line 295 of file X86Subtarget.h.

References IsUAMemFast.

Referenced by llvm::X86TargetLowering::allowsUnalignedMemoryAccesses(), llvm::X86TargetLowering::getOptimalMemOpType(), and llvm::X86InstrInfo::unfoldMemoryOperand().

bool llvm::X86Subtarget::LEAusesAG ( ) const

inline

Definition at line 302 of file X86Subtarget.h.

References LEAUsesAG.

bool llvm::X86Subtarget::padShortFunctions ( ) const

inline

Definition at line 300 of file X86Subtarget.h.

References PadShortFunctions.

void llvm::X86Subtarget::ParseSubtargetFeatures	(	StringRef	CPU,
		StringRef	FS
	)

ParseSubtargetFeatures - Parses features string setting specified subtarget options. Definition of function is auto generated by tblgen.

bool llvm::X86Subtarget::postRAScheduler ( ) const

inline

Definition at line 401 of file X86Subtarget.h.

References PostRAScheduler.

void X86Subtarget::resetSubtargetFeatures ( const MachineFunction * MF )

virtual

Reset the features for the X86 target.

Definition at line 399 of file X86Subtarget.cpp.

References llvm::X86II::FS, llvm::AttributeSet::getAttribute(), llvm::Function::getAttributes(), llvm::MachineFunction::getFunction(), llvm::Attribute::getValueAsString(), llvm::Attribute::hasAttribute(), and llvm::Attribute::None.

Referenced by X86Subtarget().

void llvm::X86Subtarget::setPICStyle ( PICStyles::Style Style )

inline

Definition at line 255 of file X86Subtarget.h.

References PICStyle.

Referenced by llvm::X86TargetMachine::X86TargetMachine().

bool llvm::X86Subtarget::useLeaForSP ( ) const

inline

Definition at line 298 of file X86Subtarget.h.

References UseLeaForSP.

Referenced by llvm::X86FrameLowering::emitEpilogue(), and llvm::X86FrameLowering::emitPrologue().

Member Data Documentation

bool llvm::X86Subtarget::CallRegIndirect

protected

CallRegIndirect - True if the Calls with memory reference should be converted to a register-based indirect call.

Definition at line 173 of file X86Subtarget.h.

Referenced by callRegIndirect().

bool llvm::X86Subtarget::HasADX

protected

HasADX - Processor has ADX instructions.

Definition at line 131 of file X86Subtarget.h.

Referenced by AutoDetectSubtargetFeatures(), and hasADX().

bool llvm::X86Subtarget::HasAES

protected

HasAES - Target has AES instructions.

Definition at line 86 of file X86Subtarget.h.

Referenced by AutoDetectSubtargetFeatures(), and hasAES().

bool llvm::X86Subtarget::HasBMI

protected

HasBMI - Processor has BMI1 instructions.

Definition at line 119 of file X86Subtarget.h.

Referenced by AutoDetectSubtargetFeatures(), and hasBMI().

bool llvm::X86Subtarget::HasBMI2

protected

HasBMI2 - Processor has BMI2 instructions.

Definition at line 122 of file X86Subtarget.h.

Referenced by AutoDetectSubtargetFeatures(), and hasBMI2().

bool llvm::X86Subtarget::HasCDI

protected

Processor has AVX-512 Conflict Detection Instructions.

Definition at line 185 of file X86Subtarget.h.

Referenced by AutoDetectSubtargetFeatures(), and hasCDI().

bool llvm::X86Subtarget::HasCMov

protected

HasCMov - True if this processor has conditional move instructions (generally pentium pro+).

Definition at line 73 of file X86Subtarget.h.

Referenced by AutoDetectSubtargetFeatures(), and hasCMov().

bool llvm::X86Subtarget::HasCmpxchg16b

protected

HasCmpxchg16b - True if this processor has the CMPXCHG16B instruction; this is true for most x86-64 chips, but not the first AMD chips.

Definition at line 154 of file X86Subtarget.h.

Referenced by AutoDetectSubtargetFeatures(), and hasCmpxchg16b().

bool llvm::X86Subtarget::HasERI

protected

Processor has AVX-512 Exponential and Reciprocal Instructions.

Definition at line 182 of file X86Subtarget.h.

Referenced by AutoDetectSubtargetFeatures(), and hasERI().

bool llvm::X86Subtarget::HasF16C

protected

HasF16C - Processor has 16-bit floating point conversion instructions.

Definition at line 110 of file X86Subtarget.h.

Referenced by AutoDetectSubtargetFeatures(), and hasF16C().

bool llvm::X86Subtarget::HasFMA

protected

HasFMA - Target has 3-operand fused multiply-add.

Definition at line 92 of file X86Subtarget.h.

Referenced by AutoDetectSubtargetFeatures(), hasFMA(), and hasFMA4().

bool llvm::X86Subtarget::HasFMA4

protected

HasFMA4 - Target has 4-operand fused multiply-add.

Definition at line 95 of file X86Subtarget.h.

Referenced by AutoDetectSubtargetFeatures(), and hasFMA4().

bool llvm::X86Subtarget::HasFSGSBase

protected

HasFSGSBase - Processor has FS/GS base insturctions.

Definition at line 113 of file X86Subtarget.h.

Referenced by AutoDetectSubtargetFeatures(), and hasFSGSBase().

bool llvm::X86Subtarget::HasHLE

protected

HasHLE - Processor has HLE.

Definition at line 128 of file X86Subtarget.h.

Referenced by AutoDetectSubtargetFeatures(), and hasHLE().

bool llvm::X86Subtarget::HasLZCNT

protected

HasLZCNT - Processor has LZCNT instruction.

Definition at line 116 of file X86Subtarget.h.

Referenced by AutoDetectSubtargetFeatures(), and hasLZCNT().

bool llvm::X86Subtarget::HasMOVBE

protected

HasMOVBE - True if the processor has the MOVBE instruction.

Definition at line 104 of file X86Subtarget.h.

Referenced by AutoDetectSubtargetFeatures(), and hasMOVBE().

bool llvm::X86Subtarget::HasPCLMUL

protected

HasPCLMUL - Target has carry-less multiplication.

Definition at line 89 of file X86Subtarget.h.

Referenced by AutoDetectSubtargetFeatures(), and hasPCLMUL().

bool llvm::X86Subtarget::HasPFI

protected

Processor has AVX-512 PreFetch Instructions.

Definition at line 179 of file X86Subtarget.h.

Referenced by AutoDetectSubtargetFeatures(), and hasPFI().

bool llvm::X86Subtarget::HasPOPCNT

protected

HasPOPCNT - True if the processor supports POPCNT.

Definition at line 80 of file X86Subtarget.h.

Referenced by AutoDetectSubtargetFeatures(), and hasPOPCNT().

bool llvm::X86Subtarget::HasPRFCHW

protected

HasPRFCHW - Processor has PRFCHW instructions.

Definition at line 137 of file X86Subtarget.h.

Referenced by AutoDetectSubtargetFeatures(), and hasPRFCHW().

bool llvm::X86Subtarget::HasRDRAND

protected

HasRDRAND - True if the processor has the RDRAND instruction.

Definition at line 107 of file X86Subtarget.h.

Referenced by AutoDetectSubtargetFeatures(), and hasRDRAND().

bool llvm::X86Subtarget::HasRDSEED

protected

HasRDSEED - Processor has RDSEED instructions.

Definition at line 140 of file X86Subtarget.h.

Referenced by AutoDetectSubtargetFeatures(), and hasRDSEED().

bool llvm::X86Subtarget::HasRTM

protected

HasRTM - Processor has RTM instructions.

Definition at line 125 of file X86Subtarget.h.

Referenced by AutoDetectSubtargetFeatures(), and hasRTM().

bool llvm::X86Subtarget::HasSHA

protected

HasSHA - Processor has SHA instructions.

Definition at line 134 of file X86Subtarget.h.

Referenced by AutoDetectSubtargetFeatures(), and hasSHA().

bool llvm::X86Subtarget::HasSlowDivide

protected

HasSlowDivide - True if smaller divides are significantly faster than full divides and should be used when possible.

Definition at line 162 of file X86Subtarget.h.

Referenced by hasSlowDivide().

bool llvm::X86Subtarget::HasSSE4A

protected

HasSSE4A - True if the processor supports SSE4A instructions.

Definition at line 83 of file X86Subtarget.h.

Referenced by AutoDetectSubtargetFeatures(), and hasSSE4A().

bool llvm::X86Subtarget::HasTBM

protected

HasTBM - Target has TBM instructions.

Definition at line 101 of file X86Subtarget.h.

Referenced by AutoDetectSubtargetFeatures(), and hasTBM().

bool llvm::X86Subtarget::HasVectorUAMem

protected

HasVectorUAMem - True if SIMD operations can have unaligned memory operands. This may require setting a feature bit in the processor.

Definition at line 150 of file X86Subtarget.h.

Referenced by hasVectorUAMem().

bool llvm::X86Subtarget::HasX86_64

protected

HasX86_64 - True if the processor supports X86-64 instructions.

Definition at line 77 of file X86Subtarget.h.

Referenced by AutoDetectSubtargetFeatures().

bool llvm::X86Subtarget::HasXOP

protected

HasXOP - Target has XOP instructions.

Definition at line 98 of file X86Subtarget.h.

Referenced by AutoDetectSubtargetFeatures(), and hasXOP().

InstrItineraryData llvm::X86Subtarget::InstrItins

protected

Instruction itineraries for scheduling.

Definition at line 199 of file X86Subtarget.h.

Referenced by getInstrItineraryData().

bool llvm::X86Subtarget::IsBTMemSlow

protected

IsBTMemSlow - True if BT (bit test) of memory instructions are slow.

Definition at line 143 of file X86Subtarget.h.

Referenced by AutoDetectSubtargetFeatures(), and isBTMemSlow().

bool llvm::X86Subtarget::IsUAMemFast

protected

IsUAMemFast - True if unaligned memory access is fast.

Definition at line 146 of file X86Subtarget.h.

Referenced by AutoDetectSubtargetFeatures(), and isUnalignedMemAccessFast().

bool llvm::X86Subtarget::LEAUsesAG

protected

LEAUsesAG - True if the LEA instruction inputs have to be ready at address generation (AG) time.

Definition at line 176 of file X86Subtarget.h.

Referenced by LEAusesAG().

unsigned llvm::X86Subtarget::MaxInlineSizeThreshold

protected

Max. memset / memcpy size that is turned into rep/movs, rep/stos ops.

Definition at line 193 of file X86Subtarget.h.

Referenced by getMaxInlineSizeThreshold().

bool llvm::X86Subtarget::PadShortFunctions

protected

PadShortFunctions - True if the short functions should be padded to prevent a stall when returning too early.

Definition at line 169 of file X86Subtarget.h.

Referenced by padShortFunctions().

PICStyles::Style llvm::X86Subtarget::PICStyle

protected

PICStyle - Which PIC style to use

Definition at line 61 of file X86Subtarget.h.

Referenced by getPICStyle(), isPICStyleGOT(), isPICStyleRIPRel(), isPICStyleSet(), isPICStyleStubAny(), isPICStyleStubNoDynamic(), isPICStyleStubPIC(), and setPICStyle().

bool llvm::X86Subtarget::PostRAScheduler

protected

PostRAScheduler - True if using post-register-allocation scheduler.

Definition at line 165 of file X86Subtarget.h.

Referenced by enablePostRAScheduler(), and postRAScheduler().

unsigned llvm::X86Subtarget::stackAlignment

protected

stackAlignment - The minimum alignment known to hold of the stack frame on entry to the function and which must be maintained by every function.

Definition at line 189 of file X86Subtarget.h.

Referenced by getStackAlignment().

Triple llvm::X86Subtarget::TargetTriple

protected

TargetTriple - What processor and OS we're targeting.

Definition at line 196 of file X86Subtarget.h.

Referenced by getTargetTriple(), isOSWindows(), isTarget64BitILP32(), isTarget64BitLP64(), isTargetCOFF(), isTargetCygMing(), isTargetCygwin(), isTargetDarwin(), isTargetELF(), isTargetEnvMacho(), isTargetFreeBSD(), isTargetLinux(), isTargetMingw(), isTargetNaCl(), isTargetSolaris(), isTargetWin64(), and isTargetWindows().

bool llvm::X86Subtarget::UseLeaForSP

protected

UseLeaForSP - True if the LEA instruction should be used for adjusting the stack pointer. This is an optimization for Intel Atom processors.

Definition at line 158 of file X86Subtarget.h.

Referenced by AutoDetectSubtargetFeatures(), and useLeaForSP().

X863DNowEnum llvm::X86Subtarget::X863DNowLevel

protected

X863DNowLevel - 3DNow or 3DNow Athlon, or none supported.

Definition at line 69 of file X86Subtarget.h.

Referenced by has3DNow(), and has3DNowA().

X86ProcFamilyEnum llvm::X86Subtarget::X86ProcFamily

protected

X86ProcFamily - X86 processor family: Intel Atom, and others.

Definition at line 57 of file X86Subtarget.h.

Referenced by AutoDetectSubtargetFeatures(), and isAtom().

X86SSEEnum llvm::X86Subtarget::X86SSELevel

protected

X86SSELevel - MMX, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, or none supported.

Definition at line 65 of file X86Subtarget.h.

Referenced by AutoDetectSubtargetFeatures(), hasAVX(), hasAVX2(), hasAVX512(), hasMMX(), hasSSE1(), hasSSE2(), hasSSE3(), hasSSE41(), hasSSE42(), and hasSSSE3().

The documentation for this class was generated from the following files:

Public Member Functions

Protected Types

Protected Attributes

Detailed Description

Member Enumeration Documentation

Constructor & Destructor Documentation

Member Function Documentation

Member Data Documentation