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| virtual void | anchor () |
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| | ARMRegisterInfo (const ARMSubtarget &STI) |
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| const uint16_t * | getCalleeSavedRegs (const MachineFunction *MF=0) const |
| | Code Generation virtual methods... More...
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| const uint32_t * | getCallPreservedMask (CallingConv::ID) const |
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| const uint32_t * | getNoPreservedMask () const |
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| const uint32_t * | getThisReturnPreservedMask (CallingConv::ID) const |
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| BitVector | getReservedRegs (const MachineFunction &MF) const |
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| const TargetRegisterClass * | getPointerRegClass (const MachineFunction &MF, unsigned Kind=0) const |
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| const TargetRegisterClass * | getCrossCopyRegClass (const TargetRegisterClass *RC) const |
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| const TargetRegisterClass * | getLargestLegalSuperClass (const TargetRegisterClass *RC) const |
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| unsigned | getRegPressureLimit (const TargetRegisterClass *RC, MachineFunction &MF) const |
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| void | getRegAllocationHints (unsigned VirtReg, ArrayRef< MCPhysReg > Order, SmallVectorImpl< MCPhysReg > &Hints, const MachineFunction &MF, const VirtRegMap *VRM) const |
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| void | UpdateRegAllocHint (unsigned Reg, unsigned NewReg, MachineFunction &MF) const |
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| virtual bool | avoidWriteAfterWrite (const TargetRegisterClass *RC) const |
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| bool | hasBasePointer (const MachineFunction &MF) const |
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| bool | canRealignStack (const MachineFunction &MF) const |
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| bool | needsStackRealignment (const MachineFunction &MF) const |
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| int64_t | getFrameIndexInstrOffset (const MachineInstr *MI, int Idx) const |
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| bool | needsFrameBaseReg (MachineInstr *MI, int64_t Offset) const |
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| void | materializeFrameBaseRegister (MachineBasicBlock *MBB, unsigned BaseReg, int FrameIdx, int64_t Offset) const |
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| void | resolveFrameIndex (MachineBasicBlock::iterator I, unsigned BaseReg, int64_t Offset) const |
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| bool | isFrameOffsetLegal (const MachineInstr *MI, int64_t Offset) const |
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| bool | cannotEliminateFrame (const MachineFunction &MF) const |
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| unsigned | getFrameRegister (const MachineFunction &MF) const |
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| unsigned | getBaseRegister () const |
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| bool | isLowRegister (unsigned Reg) const |
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| virtual void | emitLoadConstPool (MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, DebugLoc dl, unsigned DestReg, unsigned SubIdx, int Val, ARMCC::CondCodes Pred=ARMCC::AL, unsigned PredReg=0, unsigned MIFlags=MachineInstr::NoFlags) const |
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| virtual bool | requiresRegisterScavenging (const MachineFunction &MF) const |
| | Code Generation virtual methods... More...
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| virtual bool | trackLivenessAfterRegAlloc (const MachineFunction &MF) const |
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| virtual bool | requiresFrameIndexScavenging (const MachineFunction &MF) const |
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| virtual bool | requiresVirtualBaseRegisters (const MachineFunction &MF) const |
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| virtual void | eliminateFrameIndex (MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, RegScavenger *RS=NULL) const |
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Definition at line 25 of file ARMRegisterInfo.h.