llvm::ARMBaseRegisterInfo Class Reference

#include <ARMBaseRegisterInfo.h>

Inheritance diagram for llvm::ARMBaseRegisterInfo:

Collaboration diagram for llvm::ARMBaseRegisterInfo:

Public Member Functions
const uint16_t *	getCalleeSavedRegs (const MachineFunction *MF=0) const
	Code Generation virtual methods... More...
const uint32_t *	getCallPreservedMask (CallingConv::ID) const
const uint32_t *	getNoPreservedMask () const
const uint32_t *	getThisReturnPreservedMask (CallingConv::ID) const
BitVector	getReservedRegs (const MachineFunction &MF) const
const TargetRegisterClass *	getPointerRegClass (const MachineFunction &MF, unsigned Kind=0) const
const TargetRegisterClass *	getCrossCopyRegClass (const TargetRegisterClass *RC) const
const TargetRegisterClass *	getLargestLegalSuperClass (const TargetRegisterClass *RC) const
unsigned	getRegPressureLimit (const TargetRegisterClass *RC, MachineFunction &MF) const
void	getRegAllocationHints (unsigned VirtReg, ArrayRef< MCPhysReg > Order, SmallVectorImpl< MCPhysReg > &Hints, const MachineFunction &MF, const VirtRegMap *VRM) const
void	UpdateRegAllocHint (unsigned Reg, unsigned NewReg, MachineFunction &MF) const
virtual bool	avoidWriteAfterWrite (const TargetRegisterClass *RC) const
bool	hasBasePointer (const MachineFunction &MF) const
bool	canRealignStack (const MachineFunction &MF) const
bool	needsStackRealignment (const MachineFunction &MF) const
int64_t	getFrameIndexInstrOffset (const MachineInstr *MI, int Idx) const
bool	needsFrameBaseReg (MachineInstr *MI, int64_t Offset) const
void	materializeFrameBaseRegister (MachineBasicBlock *MBB, unsigned BaseReg, int FrameIdx, int64_t Offset) const
void	resolveFrameIndex (MachineBasicBlock::iterator I, unsigned BaseReg, int64_t Offset) const
bool	isFrameOffsetLegal (const MachineInstr *MI, int64_t Offset) const
bool	cannotEliminateFrame (const MachineFunction &MF) const
unsigned	getFrameRegister (const MachineFunction &MF) const
unsigned	getBaseRegister () const
bool	isLowRegister (unsigned Reg) const
virtual void	emitLoadConstPool (MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, DebugLoc dl, unsigned DestReg, unsigned SubIdx, int Val, ARMCC::CondCodes Pred=ARMCC::AL, unsigned PredReg=0, unsigned MIFlags=MachineInstr::NoFlags) const
virtual bool	requiresRegisterScavenging (const MachineFunction &MF) const
	Code Generation virtual methods... More...
virtual bool	trackLivenessAfterRegAlloc (const MachineFunction &MF) const
virtual bool	requiresFrameIndexScavenging (const MachineFunction &MF) const
virtual bool	requiresVirtualBaseRegisters (const MachineFunction &MF) const
virtual void	eliminateFrameIndex (MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, RegScavenger *RS=NULL) const

Protected Member Functions
	ARMBaseRegisterInfo (const ARMSubtarget &STI)
unsigned	getOpcode (int Op) const

Protected Attributes
const ARMSubtarget &	STI
unsigned	FramePtr
	FramePtr - ARM physical register used as frame ptr. More...
unsigned	BasePtr

Detailed Description

Definition at line 75 of file ARMBaseRegisterInfo.h.

Constructor & Destructor Documentation

ARMBaseRegisterInfo::ARMBaseRegisterInfo ( const ARMSubtarget &  STI )

explicitprotected

Definition at line 46 of file ARMBaseRegisterInfo.cpp.

Member Function Documentation

bool ARMBaseRegisterInfo::avoidWriteAfterWrite ( const TargetRegisterClass *  RC ) const

virtual

Definition at line 280 of file ARMBaseRegisterInfo.cpp.

References llvm::TargetRegisterClass::getID(), llvm::ARMSubtarget::isLikeA9(), and STI.

bool ARMBaseRegisterInfo::cannotEliminateFrame

(

const MachineFunction &

MF

)

const

Definition at line 371 of file ARMBaseRegisterInfo.cpp.

References llvm::MachineFrameInfo::adjustsStack(), llvm::TargetOptions::DisableFramePointerElim(), llvm::MachineFunction::getFrameInfo(), llvm::MachineFunction::getTarget(), llvm::MachineFrameInfo::hasVarSizedObjects(), llvm::MachineFrameInfo::isFrameAddressTaken(), needsStackRealignment(), and llvm::TargetMachine::Options.

Referenced by llvm::ARMFrameLowering::processFunctionBeforeCalleeSavedScan().

bool ARMBaseRegisterInfo::canRealignStack

(

const MachineFunction &

MF

)

const

Definition at line 333 of file ARMBaseRegisterInfo.cpp.

References BasePtr, llvm::MachineRegisterInfo::canReserveReg(), FramePtr, llvm::TargetMachine::getFrameLowering(), llvm::MachineFunction::getFunction(), llvm::MachineFunction::getInfo(), llvm::MachineFunction::getRegInfo(), llvm::MachineFunction::getTarget(), llvm::Function::hasFnAttribute(), llvm::TargetFrameLowering::hasReservedCallFrame(), llvm::ARMFunctionInfo::isThumb1OnlyFunction(), and MRI.

Referenced by checkNumAlignedDPRCS2Regs(), needsFrameBaseReg(), and needsStackRealignment().

void ARMBaseRegisterInfo::eliminateFrameIndex ( MachineBasicBlock::iterator  II, int  SPAdj, unsigned  FIOperandNum, RegScavenger *  RS = NULL  ) const

virtual

Reimplemented in llvm::Thumb1RegisterInfo.

Definition at line 692 of file ARMBaseRegisterInfo.cpp.

References llvm::ARMII::AddrMode4, llvm::ARMII::AddrMode6, llvm::ARMII::AddrModeMask, llvm::ARMCC::AL, llvm::MachineOperand::ChangeToRegister(), llvm::MachineRegisterInfo::createVirtualRegister(), llvm::emitARMRegPlusImmediate(), llvm::emitT2RegPlusImmediate(), llvm::MachineInstr::findFirstPredOperandIdx(), llvm::ISD::FrameIndex, llvm::MachineInstr::getDebugLoc(), llvm::MachineInstr::getDesc(), llvm::MachineFunction::getFrameInfo(), llvm::TargetMachine::getFrameLowering(), llvm::MachineOperand::getImm(), llvm::MachineOperand::getIndex(), llvm::MachineFunction::getInfo(), llvm::TargetMachine::getInstrInfo(), llvm::MachineInstr::getOperand(), llvm::MachineInstr::getParent(), llvm::MachineBasicBlock::getParent(), llvm::MachineOperand::getReg(), llvm::MachineFunction::getRegInfo(), llvm::MachineFunction::getTarget(), llvm::ARMFrameLowering::hasReservedCallFrame(), llvm::MachineFrameInfo::hasVarSizedObjects(), llvm::MachineInstr::isDebugValue(), llvm::RegScavenger::isScavengingFrameIndex(), llvm::ARMFunctionInfo::isThumb1OnlyFunction(), llvm::ARMFunctionInfo::isThumb2Function(), llvm::ARMFunctionInfo::isThumbFunction(), llvm::A64CC::MI, llvm::ARMFrameLowering::ResolveFrameIndexReference(), llvm::rewriteARMFrameIndex(), llvm::rewriteT2FrameIndex(), TII, and llvm::MCInstrDesc::TSFlags.

void ARMBaseRegisterInfo::emitLoadConstPool ( MachineBasicBlock &  MBB, MachineBasicBlock::iterator &  MBBI, DebugLoc  dl, unsigned  DestReg, unsigned  SubIdx, int  Val, ARMCC::CondCodes  Pred = ARMCC::AL, unsigned  PredReg = 0, unsigned  MIFlags = MachineInstr::NoFlags  ) const

virtual

emitLoadConstPool - Emits a load from constpool to materialize the specified immediate.

Reimplemented in llvm::Thumb1RegisterInfo, and llvm::Thumb2RegisterInfo.

Definition at line 391 of file ARMBaseRegisterInfo.cpp.

References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), llvm::CallingConv::C, llvm::ISD::ConstantPool, llvm::MCInstrInfo::get(), llvm::ConstantInt::get(), llvm::MachineFunction::getConstantPool(), llvm::MachineConstantPool::getConstantPoolIndex(), llvm::Function::getContext(), llvm::getDefRegState(), llvm::MachineFunction::getFunction(), llvm::TargetMachine::getInstrInfo(), llvm::Type::getInt32Ty(), llvm::MachineBasicBlock::getParent(), llvm::MachineFunction::getTarget(), llvm::MachineInstrBuilder::setMIFlags(), and TII.

Referenced by emitThumbRegPlusImmInReg().

unsigned llvm::ARMBaseRegisterInfo::getBaseRegister ( ) const

inline

Definition at line 150 of file ARMBaseRegisterInfo.h.

References BasePtr.

Referenced by llvm::ARMFrameLowering::processFunctionBeforeCalleeSavedScan(), and llvm::ARMFrameLowering::ResolveFrameIndexReference().

const uint16_t * ARMBaseRegisterInfo::getCalleeSavedRegs

(

const MachineFunction *

MF = 0

)

const

Code Generation virtual methods...

Definition at line 53 of file ARMBaseRegisterInfo.cpp.

References F(), llvm::Function::getCallingConv(), llvm::Function::getFnAttribute(), llvm::MachineFunction::getFunction(), llvm::Attribute::getValueAsString(), llvm::CallingConv::GHC, llvm::Function::hasFnAttribute(), llvm::ARMSubtarget::isAAPCS_ABI(), llvm::ARMSubtarget::isMClass(), llvm::ARMSubtarget::isTargetIOS(), and STI.

Referenced by llvm::ARMFrameLowering::processFunctionBeforeCalleeSavedScan().

const uint32_t * ARMBaseRegisterInfo::getCallPreservedMask

(

CallingConv::ID

CC

)

const

Definition at line 85 of file ARMBaseRegisterInfo.cpp.

References llvm::CallingConv::GHC, llvm::ARMSubtarget::isAAPCS_ABI(), llvm::ARMSubtarget::isTargetIOS(), and STI.

const TargetRegisterClass * ARMBaseRegisterInfo::getCrossCopyRegClass

(

const TargetRegisterClass *

RC

)

const

Definition at line 174 of file ARMBaseRegisterInfo.cpp.

int64_t ARMBaseRegisterInfo::getFrameIndexInstrOffset	(	const MachineInstr *	MI,
		int	Idx
	)		const

Definition at line 432 of file ARMBaseRegisterInfo.cpp.

References llvm::ARMII::AddrMode2, llvm::ARMII::AddrMode3, llvm::ARMII::AddrMode5, llvm::ARMII::AddrMode_i12, llvm::ARMII::AddrModeMask, llvm::ARMII::AddrModeT1_s, llvm::ARMII::AddrModeT2_i12, llvm::ARMII::AddrModeT2_i8, llvm::ARM_AM::getAM2Offset(), llvm::ARM_AM::getAM2Op(), llvm::ARM_AM::getAM3Offset(), llvm::ARM_AM::getAM3Op(), llvm::ARM_AM::getAM5Offset(), llvm::ARM_AM::getAM5Op(), llvm::MachineInstr::getDesc(), llvm::MachineOperand::getImm(), llvm::MachineInstr::getOperand(), llvm_unreachable, llvm::ARM_AM::sub, and llvm::MCInstrDesc::TSFlags.

Referenced by isFrameOffsetLegal().

unsigned ARMBaseRegisterInfo::getFrameRegister

(

const MachineFunction &

MF

)

const

Definition at line 380 of file ARMBaseRegisterInfo.cpp.

References FramePtr, llvm::TargetMachine::getFrameLowering(), llvm::MachineFunction::getTarget(), and llvm::TargetFrameLowering::hasFP().

Referenced by llvm::Thumb1RegisterInfo::eliminateFrameIndex(), llvm::ARMFrameLowering::processFunctionBeforeCalleeSavedScan(), and llvm::ARMFrameLowering::ResolveFrameIndexReference().

const TargetRegisterClass * ARMBaseRegisterInfo::getLargestLegalSuperClass

(

const TargetRegisterClass *

RC

)

const

Definition at line 147 of file ARMBaseRegisterInfo.cpp.

References llvm::TargetRegisterClass::getID(), llvm::TargetRegisterClass::getSuperClasses(), and I.

Referenced by llvm::Thumb1RegisterInfo::getLargestLegalSuperClass().

const uint32_t * ARMBaseRegisterInfo::getNoPreservedMask

(

)

const

Definition at line 94 of file ARMBaseRegisterInfo.cpp.

unsigned llvm::ARMBaseRegisterInfo::getOpcode ( int  Op ) const

protected

const TargetRegisterClass * ARMBaseRegisterInfo::getPointerRegClass	(	const MachineFunction &	MF,
		unsigned	Kind = 0
	)		const

Definition at line 168 of file ARMBaseRegisterInfo.cpp.

void ARMBaseRegisterInfo::getRegAllocationHints	(	unsigned	VirtReg,
		ArrayRef< MCPhysReg >	Order,
		SmallVectorImpl< MCPhysReg > &	Hints,
		const MachineFunction &	MF,
		const VirtRegMap *	VRM
	)		const

Definition at line 210 of file ARMBaseRegisterInfo.cpp.

References llvm::ArrayRef< T >::begin(), llvm::ArrayRef< T >::end(), getPairedGPR(), llvm::VirtRegMap::getPhys(), llvm::MachineRegisterInfo::getRegAllocationHint(), llvm::TargetRegisterInfo::getRegAllocationHints(), llvm::MachineFunction::getRegInfo(), llvm::VirtRegMap::hasPhys(), I, llvm::MachineRegisterInfo::isReserved(), MRI, llvm::SmallVectorTemplateBase< T, isPodLike >::push_back(), llvm::ARMRI::RegPairEven, llvm::ARMRI::RegPairOdd, and llvm::ArrayRef< T >::size().

unsigned ARMBaseRegisterInfo::getRegPressureLimit	(	const TargetRegisterClass *	RC,
		MachineFunction &	MF
	)		const

Definition at line 181 of file ARMBaseRegisterInfo.cpp.

References llvm::TargetMachine::getFrameLowering(), llvm::TargetRegisterClass::getID(), llvm::MachineFunction::getTarget(), llvm::TargetFrameLowering::hasFP(), llvm::ARMSubtarget::isR9Reserved(), and STI.

BitVector ARMBaseRegisterInfo::getReservedRegs

(

const MachineFunction &

MF

)

const

Definition at line 116 of file ARMBaseRegisterInfo.cpp.

References BasePtr, llvm::TargetRegisterClass::begin(), llvm::TargetRegisterClass::end(), FramePtr, llvm::TargetMachine::getFrameLowering(), llvm::MachineFunction::getTarget(), hasBasePointer(), llvm::ARMSubtarget::hasD16(), llvm::TargetFrameLowering::hasFP(), llvm::ARMSubtarget::hasVFP3(), I, llvm::ARMSubtarget::isR9Reserved(), llvm::MCRegisterInfo::DiffListIterator::isValid(), llvm::BitVector::set(), STI, and llvm::BitVector::test().

const uint32_t * ARMBaseRegisterInfo::getThisReturnPreservedMask

(

CallingConv::ID

CC

)

const

getThisReturnPreservedMask - Returns a call preserved mask specific to the case that 'returned' is on an i32 first argument if the calling convention is one that can (partially) model this attribute with a preserved mask (i.e. it is a calling convention that uses the same register for the first i32 argument and an i32 return value)

Should return NULL in the case that the calling convention does not have this property

Definition at line 99 of file ARMBaseRegisterInfo.cpp.

References llvm::CallingConv::GHC, llvm::ARMSubtarget::isAAPCS_ABI(), llvm::ARMSubtarget::isTargetIOS(), and STI.

bool ARMBaseRegisterInfo::hasBasePointer

(

const MachineFunction &

MF

)

const

Definition at line 302 of file ARMBaseRegisterInfo.cpp.

References llvm::MachineFunction::getFrameInfo(), llvm::TargetMachine::getFrameLowering(), llvm::MachineFunction::getInfo(), llvm::MachineFrameInfo::getLocalFrameSize(), llvm::MachineFunction::getTarget(), llvm::MachineFrameInfo::hasVarSizedObjects(), llvm::ARMFunctionInfo::isThumb2Function(), llvm::ARMFunctionInfo::isThumbFunction(), and needsStackRealignment().

Referenced by llvm::Thumb1RegisterInfo::eliminateFrameIndex(), getReservedRegs(), llvm::ARMFrameLowering::processFunctionBeforeCalleeSavedScan(), and llvm::ARMFrameLowering::ResolveFrameIndexReference().

bool ARMBaseRegisterInfo::isFrameOffsetLegal	(	const MachineInstr *	MI,
		int64_t	Offset
	)		const

Definition at line 623 of file ARMBaseRegisterInfo.cpp.

References llvm::ARMII::AddrMode2, llvm::ARMII::AddrMode3, llvm::ARMII::AddrMode4, llvm::ARMII::AddrMode5, llvm::ARMII::AddrMode6, llvm::ARMII::AddrMode_i12, llvm::ARMII::AddrModeMask, llvm::ARMII::AddrModeT1_s, llvm::ARMII::AddrModeT2_i12, llvm::ARMII::AddrModeT2_i8, llvm::MachineInstr::getDesc(), getFrameIndexInstrOffset(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::isFI(), llvm_unreachable, and llvm::MCInstrDesc::TSFlags.

Referenced by needsFrameBaseReg().

bool llvm::ARMBaseRegisterInfo::isLowRegister

(

unsigned

Reg

)

const

void ARMBaseRegisterInfo::materializeFrameBaseRegister	(	MachineBasicBlock *	MBB,
		unsigned	BaseReg,
		int	FrameIdx,
		int64_t	Offset
	)		const

materializeFrameBaseRegister - Insert defining instruction(s) for BaseReg to be a pointer to FrameIdx at the beginning of the basic block.

Definition at line 568 of file ARMBaseRegisterInfo.cpp.

References llvm::AddDefaultCC(), llvm::AddDefaultPred(), llvm::MachineBasicBlock::begin(), llvm::BuildMI(), llvm::MachineRegisterInfo::constrainRegClass(), llvm::MachineBasicBlock::end(), llvm::MCInstrInfo::get(), llvm::MachineFunction::getInfo(), llvm::TargetMachine::getInstrInfo(), llvm::MachineBasicBlock::getParent(), llvm::TargetInstrInfo::getRegClass(), llvm::MachineFunction::getRegInfo(), llvm::MachineFunction::getTarget(), llvm::MipsISD::Ins, llvm::ARMFunctionInfo::isThumb1OnlyFunction(), llvm::ARMFunctionInfo::isThumbFunction(), MRI, and TII.

bool ARMBaseRegisterInfo::needsFrameBaseReg	(	MachineInstr *	MI,
		int64_t	Offset
	)		const

needsFrameBaseReg - Returns true if the instruction's frame index reference would be better served by a base register other than FP or SP. Used by LocalStackFrameAllocation to determine which frame index references it should create new base registers for.

Definition at line 486 of file ARMBaseRegisterInfo.cpp.

References canRealignStack(), llvm::MachineFunction::getFrameInfo(), llvm::TargetMachine::getFrameLowering(), llvm::MachineFunction::getInfo(), llvm::MachineFrameInfo::getLocalFrameMaxAlign(), llvm::MachineFrameInfo::getLocalFrameSize(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineInstr::getParent(), llvm::MachineBasicBlock::getParent(), llvm::TargetFrameLowering::getStackAlignment(), llvm::MachineFunction::getTarget(), llvm::TargetFrameLowering::hasFP(), llvm::MachineFrameInfo::hasVarSizedObjects(), llvm::MachineOperand::isFI(), isFrameOffsetLegal(), llvm::ARMFunctionInfo::isThumb1OnlyFunction(), and llvm::ARMFunctionInfo::isThumbFunction().

bool ARMBaseRegisterInfo::needsStackRealignment

(

const MachineFunction &

MF

)

const

Definition at line 358 of file ARMBaseRegisterInfo.cpp.

References canRealignStack(), F(), llvm::Function::getAttributes(), llvm::MachineFunction::getFrameInfo(), llvm::TargetMachine::getFrameLowering(), llvm::MachineFunction::getFunction(), llvm::MachineFrameInfo::getMaxAlignment(), llvm::TargetFrameLowering::getStackAlignment(), llvm::MachineFunction::getTarget(), llvm::AttributeSet::hasAttribute(), and llvm::Attribute::StackAlignment.

Referenced by cannotEliminateFrame(), hasBasePointer(), llvm::ARMFrameLowering::processFunctionBeforeCalleeSavedScan(), and llvm::ARMFrameLowering::ResolveFrameIndexReference().

bool ARMBaseRegisterInfo::requiresFrameIndexScavenging ( const MachineFunction &  MF ) const

virtual

Definition at line 422 of file ARMBaseRegisterInfo.cpp.

bool ARMBaseRegisterInfo::requiresRegisterScavenging ( const MachineFunction &  MF ) const

virtual

Code Generation virtual methods...

Definition at line 412 of file ARMBaseRegisterInfo.cpp.

bool ARMBaseRegisterInfo::requiresVirtualBaseRegisters ( const MachineFunction &  MF ) const

virtual

Definition at line 427 of file ARMBaseRegisterInfo.cpp.

void ARMBaseRegisterInfo::resolveFrameIndex	(	MachineBasicBlock::iterator	I,
		unsigned	BaseReg,
		int64_t	Offset
	)		const

Definition at line 594 of file ARMBaseRegisterInfo.cpp.

References llvm::MachineFunction::getInfo(), llvm::TargetMachine::getInstrInfo(), llvm::MachineInstr::getNumOperands(), llvm::MachineInstr::getOperand(), llvm::MachineInstr::getParent(), llvm::MachineBasicBlock::getParent(), llvm::MachineFunction::getTarget(), I, llvm::MachineOperand::isFI(), llvm::ARMFunctionInfo::isThumb1OnlyFunction(), llvm::ARMFunctionInfo::isThumb2Function(), llvm::ARMFunctionInfo::isThumbFunction(), llvm::A64CC::MI, llvm::rewriteARMFrameIndex(), llvm::rewriteT2FrameIndex(), and TII.

bool ARMBaseRegisterInfo::trackLivenessAfterRegAlloc ( const MachineFunction &  MF ) const

virtual

Definition at line 417 of file ARMBaseRegisterInfo.cpp.

void ARMBaseRegisterInfo::UpdateRegAllocHint	(	unsigned	Reg,
		unsigned	NewReg,
		MachineFunction &	MF
	)		const

Definition at line 260 of file ARMBaseRegisterInfo.cpp.

References llvm::MachineRegisterInfo::getRegAllocationHint(), llvm::MachineFunction::getRegInfo(), llvm::TargetRegisterInfo::isVirtualRegister(), MRI, llvm::ARMRI::RegPairEven, llvm::ARMRI::RegPairOdd, and llvm::MachineRegisterInfo::setRegAllocationHint().

Member Data Documentation

unsigned llvm::ARMBaseRegisterInfo::BasePtr

protected

BasePtr - ARM physical register used as a base ptr in complex stack frames. I.e., when we need a 3rd base, not just SP and FP, due to variable size stack objects.

Definition at line 85 of file ARMBaseRegisterInfo.h.

Referenced by canRealignStack(), llvm::Thumb1RegisterInfo::eliminateFrameIndex(), getBaseRegister(), and getReservedRegs().

unsigned llvm::ARMBaseRegisterInfo::FramePtr

protected

FramePtr - ARM physical register used as frame ptr.

Definition at line 80 of file ARMBaseRegisterInfo.h.

Referenced by canRealignStack(), getFrameRegister(), and getReservedRegs().

const ARMSubtarget& llvm::ARMBaseRegisterInfo::STI

protected

Definition at line 77 of file ARMBaseRegisterInfo.h.

Referenced by avoidWriteAfterWrite(), getCalleeSavedRegs(), getCallPreservedMask(), getRegPressureLimit(), getReservedRegs(), and getThisReturnPreservedMask().

---

The documentation for this class was generated from the following files:

• ARMBaseRegisterInfo.h
• ARMBaseRegisterInfo.cpp