14 #ifndef MIPSREGISTERINFO_H
15 #define MIPSREGISTERINFO_H
20 #define GET_REGINFO_HEADER
21 #include "MipsGenRegisterInfo.inc"
62 int SPAdj,
unsigned FIOperandNum,
77 int64_t SPOffset)
const = 0;
COFF::RelocationTypeX86 Type
const uint32_t * getCallPreservedMask(CallingConv::ID) const
void eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, RegScavenger *RS=NULL) const
Stack Frame Processing Methods.
static unsigned getRegisterNumbering(unsigned RegEnum)
ID
LLVM Calling Convention Representation.
virtual const TargetRegisterClass * intRegClass(unsigned Size) const =0
Return GPR register class.
bundle_iterator< MachineInstr, instr_iterator > iterator
unsigned getRegPressureLimit(const TargetRegisterClass *RC, MachineFunction &MF) const
unsigned getFrameRegister(const MachineFunction &MF) const
Debug information queries.
MipsRegisterInfo(const MipsSubtarget &Subtarget)
static unsigned getPICCallReg()
Get PIC indirect call register.
const MipsSubtarget & Subtarget
void adjustMipsStackFrame(MachineFunction &MF) const
Adjust the Mips stack frame.
virtual bool requiresRegisterScavenging(const MachineFunction &MF) const
virtual bool trackLivenessAfterRegAlloc(const MachineFunction &MF) const
BitVector getReservedRegs(const MachineFunction &MF) const
void processFunctionBeforeFrameFinalized(MachineFunction &MF, RegScavenger *RS=NULL) const
static const uint32_t * getMips16RetHelperMask()
const uint16_t * getCalleeSavedRegs(const MachineFunction *MF=0) const
Mips Callee Saved Registers.
const TargetRegisterClass * getPointerRegClass(const MachineFunction &MF, unsigned Kind) const
Code Generation virtual methods...