MipsISelLowering.cpp File Reference

#include "MipsISelLowering.h"
#include "InstPrinter/MipsInstPrinter.h"
#include "MCTargetDesc/MipsBaseInfo.h"
#include "MipsMachineFunction.h"
#include "MipsSubtarget.h"
#include "MipsTargetMachine.h"
#include "MipsTargetObjectFile.h"
#include "llvm/ADT/Statistic.h"
#include "llvm/ADT/StringSwitch.h"
#include "llvm/CodeGen/CallingConvLower.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/SelectionDAGISel.h"
#include "llvm/CodeGen/ValueTypes.h"
#include "llvm/IR/CallingConv.h"
#include "llvm/IR/DerivedTypes.h"
#include "llvm/IR/GlobalVariable.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/raw_ostream.h"
#include <cctype>
#include "MipsGenCallingConv.inc"

Include dependency graph for MipsISelLowering.cpp:

Go to the source code of this file.

Macros
#define	DEBUG_TYPE   "mips-lower"

Functions
	STATISTIC (NumTailCalls,"Number of tail calls")
static bool	isShiftedMask (uint64_t I, uint64_t &Pos, uint64_t &Size)
static SDValue	performDivRemCombine (SDNode *N, SelectionDAG &DAG, TargetLowering::DAGCombinerInfo &DCI, const MipsSubtarget *Subtarget)
static Mips::CondCode	condCodeToFCC (ISD::CondCode CC)
static bool	invertFPCondCodeUser (Mips::CondCode CC)
static SDValue	createFPCmp (SelectionDAG &DAG, const SDValue &Op)
static SDValue	createCMovFP (SelectionDAG &DAG, SDValue Cond, SDValue True, SDValue False, SDLoc DL)
static SDValue	performSELECTCombine (SDNode *N, SelectionDAG &DAG, TargetLowering::DAGCombinerInfo &DCI, const MipsSubtarget *Subtarget)
static SDValue	performANDCombine (SDNode *N, SelectionDAG &DAG, TargetLowering::DAGCombinerInfo &DCI, const MipsSubtarget *Subtarget)
static SDValue	performORCombine (SDNode *N, SelectionDAG &DAG, TargetLowering::DAGCombinerInfo &DCI, const MipsSubtarget *Subtarget)
static SDValue	performADDCombine (SDNode *N, SelectionDAG &DAG, TargetLowering::DAGCombinerInfo &DCI, const MipsSubtarget *Subtarget)
static unsigned	addLiveIn (MachineFunction &MF, unsigned PReg, const TargetRegisterClass *RC)
static MachineBasicBlock *	expandPseudoDIV (MachineInstr *MI, MachineBasicBlock &MBB, const TargetInstrInfo &TII, bool Is64Bit)
static SDValue	lowerFCOPYSIGN32 (SDValue Op, SelectionDAG &DAG, bool HasExtractInsert)
static SDValue	lowerFCOPYSIGN64 (SDValue Op, SelectionDAG &DAG, bool HasExtractInsert)
static SDValue	lowerFABS32 (SDValue Op, SelectionDAG &DAG, bool HasExtractInsert)
static SDValue	lowerFABS64 (SDValue Op, SelectionDAG &DAG, bool HasExtractInsert)
static SDValue	createLoadLR (unsigned Opc, SelectionDAG &DAG, LoadSDNode *LD, SDValue Chain, SDValue Src, unsigned Offset)
static SDValue	createStoreLR (unsigned Opc, SelectionDAG &DAG, StoreSDNode *SD, SDValue Chain, unsigned Offset)
static SDValue	lowerUnalignedIntStore (StoreSDNode *SD, SelectionDAG &DAG, bool IsLittle)
static SDValue	lowerFP_TO_SINT_STORE (StoreSDNode *SD, SelectionDAG &DAG)
static bool	CC_MipsO32 (unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, CCState &State, const uint16_t *F64Regs)
static bool	CC_MipsO32_FP32 (unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, CCState &State)
static bool	CC_MipsO32_FP64 (unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, CCState &State)
static unsigned	getNextIntArgReg (unsigned Reg)
static std::pair< bool, bool >	parsePhysicalReg (const StringRef &C, std::string &Prefix, unsigned long long &Reg)
static bool	isF128SoftLibCall (const char *CallSym)
	This function returns true if CallSym is a long double emulation routine. More...
static bool	originalTypeIsF128 (const Type *Ty, const SDNode *CallNode)

Variables
static cl::opt< bool >	LargeGOT ("mxgot", cl::Hidden, cl::desc("MIPS: Enable GOT larger than 64k."), cl::init(false))
static cl::opt< bool >	NoZeroDivCheck ("mno-check-zero-division", cl::Hidden, cl::desc("MIPS: Don't trap on integer division by zero."), cl::init(false))
static const uint16_t	O32IntRegs [4]
static const uint16_t	Mips64IntRegs [8]
static const uint16_t	Mips64DPRegs [8]

Macro Definition Documentation

#define DEBUG_TYPE   "mips-lower"

Definition at line 14 of file MipsISelLowering.cpp.

Function Documentation

static unsigned addLiveIn ( MachineFunction &  MF, unsigned  PReg, const TargetRegisterClass *  RC  )

static

Definition at line 755 of file MipsISelLowering.cpp.

References llvm::MachineRegisterInfo::addLiveIn(), llvm::MachineRegisterInfo::createVirtualRegister(), and llvm::MachineFunction::getRegInfo().

static bool CC_MipsO32 ( unsigned  ValNo, MVT  ValVT, MVT  LocVT, CCValAssign::LocInfo  LocInfo, ISD::ArgFlagsTy  ArgFlags, CCState &  State, const uint16_t *  F64Regs  )

static

Definition at line 2124 of file MipsISelLowering.cpp.

References llvm::CCState::addLoc(), llvm::CCValAssign::AExt, llvm::CCState::AllocateReg(), llvm::CCState::AllocateStack(), llvm::MVT::f32, llvm::MVT::f64, llvm::CCState::getFirstUnallocated(), llvm::CCValAssign::getMem(), llvm::ISD::ArgFlagsTy::getOrigAlign(), llvm::CCValAssign::getReg(), llvm::MVT::getSizeInBits(), llvm::MVT::i16, llvm::MVT::i32, llvm::MVT::i8, llvm::ISD::ArgFlagsTy::isByVal(), llvm::MVT::isFloatingPoint(), llvm::ISD::ArgFlagsTy::isSExt(), llvm::CCState::isVarArg(), llvm::ISD::ArgFlagsTy::isZExt(), llvm_unreachable, llvm::CCValAssign::SExt, and llvm::CCValAssign::ZExt.

Referenced by CC_MipsO32_FP32(), and CC_MipsO32_FP64().

static bool CC_MipsO32_FP32 ( unsigned  ValNo, MVT  ValVT, MVT  LocVT, CCValAssign::LocInfo  LocInfo, ISD::ArgFlagsTy  ArgFlags, CCState &  State  )

static

Definition at line 2200 of file MipsISelLowering.cpp.

References CC_MipsO32().

static bool CC_MipsO32_FP64 ( unsigned  ValNo, MVT  ValVT, MVT  LocVT, CCValAssign::LocInfo  LocInfo, ISD::ArgFlagsTy  ArgFlags, CCState &  State  )

static

Definition at line 2208 of file MipsISelLowering.cpp.

References CC_MipsO32().

static Mips::CondCode condCodeToFCC ( ISD::CondCode  CC )

static

Definition at line 447 of file MipsISelLowering.cpp.

References llvm::Mips::FCOND_OEQ, llvm::Mips::FCOND_OGE, llvm::Mips::FCOND_OGT, llvm::Mips::FCOND_OLE, llvm::Mips::FCOND_OLT, llvm::Mips::FCOND_ONE, llvm::Mips::FCOND_OR, llvm::Mips::FCOND_UEQ, llvm::Mips::FCOND_UGE, llvm::Mips::FCOND_UGT, llvm::Mips::FCOND_ULE, llvm::Mips::FCOND_ULT, llvm::Mips::FCOND_UN, llvm::Mips::FCOND_UNE, llvm_unreachable, llvm::ISD::SETEQ, llvm::ISD::SETGE, llvm::ISD::SETGT, llvm::ISD::SETLE, llvm::ISD::SETLT, llvm::ISD::SETNE, llvm::ISD::SETO, llvm::ISD::SETOEQ, llvm::ISD::SETOGE, llvm::ISD::SETOGT, llvm::ISD::SETOLE, llvm::ISD::SETOLT, llvm::ISD::SETONE, llvm::ISD::SETUEQ, llvm::ISD::SETUGE, llvm::ISD::SETUGT, llvm::ISD::SETULE, llvm::ISD::SETULT, llvm::ISD::SETUNE, and llvm::ISD::SETUO.

Referenced by createFPCmp().

static SDValue createCMovFP ( SelectionDAG &  DAG, SDValue  Cond, SDValue  True, SDValue  False, SDLoc  DL  )

static

Definition at line 510 of file MipsISelLowering.cpp.

References llvm::MipsISD::CMovFP_F, llvm::MipsISD::CMovFP_T, llvm::SelectionDAG::getNode(), llvm::SDValue::getOperand(), llvm::SelectionDAG::getRegister(), llvm::ConstantSDNode::getSExtValue(), llvm::SDValue::getValueType(), llvm::MVT::i32, and invertFPCondCodeUser().

static SDValue createFPCmp ( SelectionDAG &  DAG, const SDValue &  Op  )

static

Definition at line 488 of file MipsISelLowering.cpp.

References condCodeToFCC(), llvm::MipsISD::FPCmp, llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getNode(), llvm::SDValue::getOpcode(), llvm::SDValue::getOperand(), llvm::SDValue::getValueType(), llvm::MVT::Glue, llvm::MVT::i32, llvm::EVT::isFloatingPoint(), and llvm::ISD::SETCC.

static SDValue createLoadLR ( unsigned  Opc, SelectionDAG &  DAG, LoadSDNode *  LD, SDValue  Chain, SDValue  Src, unsigned  Offset  )

static

Definition at line 1924 of file MipsISelLowering.cpp.

References llvm::ISD::ADD, llvm::LoadSDNode::getBasePtr(), llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getMemIntrinsicNode(), llvm::MemSDNode::getMemOperand(), llvm::MemSDNode::getMemoryVT(), llvm::SelectionDAG::getNode(), llvm::SDValue::getValueType(), llvm::SDNode::getValueType(), llvm::SelectionDAG::getVTList(), and llvm::MVT::Other.

Referenced by llvm::MipsTargetLowering::lowerLOAD().

static SDValue createStoreLR ( unsigned  Opc, SelectionDAG &  DAG, StoreSDNode *  SD, SDValue  Chain, unsigned  Offset  )

static

Definition at line 2003 of file MipsISelLowering.cpp.

References llvm::ISD::ADD, llvm::StoreSDNode::getBasePtr(), llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getMemIntrinsicNode(), llvm::MemSDNode::getMemOperand(), llvm::MemSDNode::getMemoryVT(), llvm::SelectionDAG::getNode(), llvm::StoreSDNode::getValue(), llvm::SDValue::getValueType(), llvm::SelectionDAG::getVTList(), and llvm::MVT::Other.

Referenced by lowerUnalignedIntStore().

static MachineBasicBlock* expandPseudoDIV ( MachineInstr *  MI, MachineBasicBlock &  MBB, const TargetInstrInfo &  TII, bool  Is64Bit  )

static

Definition at line 762 of file MipsISelLowering.cpp.

References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), llvm::MCInstrInfo::get(), llvm::MachineInstr::getDebugLoc(), llvm::getKillRegState(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), I, llvm::MachineOperand::isKill(), llvm::next(), NoZeroDivCheck, llvm::MachineOperand::setIsKill(), and llvm::MachineOperand::setSubReg().

Referenced by llvm::MipsTargetLowering::EmitInstrWithCustomInserter().

static unsigned getNextIntArgReg ( unsigned  Reg )

static

Definition at line 2223 of file MipsISelLowering.cpp.

static bool invertFPCondCodeUser ( Mips::CondCode  CC )

static

This function returns true if the floating point conditional branches and conditional moves which use condition code CC should be inverted.

Definition at line 476 of file MipsISelLowering.cpp.

References llvm::Mips::FCOND_F, llvm::Mips::FCOND_GT, llvm::Mips::FCOND_NGT, and llvm::Mips::FCOND_T.

Referenced by createCMovFP().

static bool isF128SoftLibCall ( const char *  CallSym )

static

This function returns true if CallSym is a long double emulation routine.

Definition at line 3172 of file MipsISelLowering.cpp.

References llvm::array_lengthof(), and I.

Referenced by originalTypeIsF128().

static bool isShiftedMask ( uint64_t  I, uint64_t &  Pos, uint64_t &  Size  )

static

Definition at line 70 of file MipsISelLowering.cpp.

References llvm::CountPopulation_64(), llvm::countTrailingZeros(), and llvm::isShiftedMask_64().

Referenced by performANDCombine(), and performORCombine().

static SDValue lowerFABS32 ( SDValue  Op, SelectionDAG &  DAG, bool  HasExtractInsert  )

static

Definition at line 1723 of file MipsISelLowering.cpp.

References llvm::ISD::BITCAST, llvm::MipsISD::BuildPairF64, llvm::MipsISD::ExtractElementF64, llvm::MVT::f32, llvm::MVT::f64, llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getNode(), llvm::SDValue::getOperand(), llvm::SelectionDAG::getRegister(), llvm::SDValue::getValueType(), llvm::MVT::i32, llvm::MipsISD::Ins, llvm::ISD::SHL, llvm::ISD::SRL, and llvm::X.

static SDValue lowerFABS64 ( SDValue  Op, SelectionDAG &  DAG, bool  HasExtractInsert  )

static

Definition at line 1753 of file MipsISelLowering.cpp.

References llvm::ISD::BITCAST, llvm::MVT::f64, llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getNode(), llvm::SDValue::getOperand(), llvm::SelectionDAG::getRegister(), llvm::MVT::i32, llvm::MVT::i64, llvm::MipsISD::Ins, llvm::ISD::SHL, llvm::ISD::SRL, and llvm::X.

static SDValue lowerFCOPYSIGN32 ( SDValue  Op, SelectionDAG &  DAG, bool  HasExtractInsert  )

static

Definition at line 1620 of file MipsISelLowering.cpp.

References llvm::ISD::BITCAST, llvm::MipsISD::BuildPairF64, llvm::MipsISD::Ext, llvm::MipsISD::ExtractElementF64, llvm::MVT::f32, llvm::MVT::f64, llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getNode(), llvm::SDValue::getOperand(), llvm::SDValue::getValueType(), llvm::MVT::i32, llvm::MipsISD::Ins, llvm::ISD::OR, llvm::ISD::SHL, llvm::ISD::SRL, llvm::X, and Y.

static SDValue lowerFCOPYSIGN64 ( SDValue  Op, SelectionDAG &  DAG, bool  HasExtractInsert  )

static

Definition at line 1666 of file MipsISelLowering.cpp.

References llvm::ISD::BITCAST, llvm::MipsISD::Ext, llvm::SelectionDAG::getConstant(), llvm::MVT::getIntegerVT(), llvm::SelectionDAG::getNode(), llvm::SDValue::getOperand(), llvm::SDValue::getValueSizeInBits(), llvm::SDValue::getValueType(), I, llvm::MVT::i32, llvm::MipsISD::Ins, llvm::ISD::OR, llvm::APIntOps::Or(), llvm::ISD::SHL, llvm::ISD::SRL, llvm::ISD::TRUNCATE, llvm::X, Y, and llvm::ISD::ZERO_EXTEND.

static SDValue lowerFP_TO_SINT_STORE ( StoreSDNode *  SD, SelectionDAG &  DAG  )

static

Definition at line 2049 of file MipsISelLowering.cpp.

References llvm::ISD::FP_TO_SINT, llvm::MemSDNode::getAlignment(), llvm::StoreSDNode::getBasePtr(), llvm::MemSDNode::getChain(), llvm::EVT::getFloatingPointVT(), llvm::SelectionDAG::getNode(), llvm::SDValue::getOpcode(), llvm::SDValue::getOperand(), llvm::MemSDNode::getPointerInfo(), llvm::SelectionDAG::getStore(), llvm::StoreSDNode::getValue(), llvm::SDValue::getValueSizeInBits(), llvm::MemSDNode::isNonTemporal(), llvm::MemSDNode::isVolatile(), and llvm::MipsISD::TruncIntFP.

Referenced by llvm::MipsTargetLowering::lowerSTORE().

static SDValue lowerUnalignedIntStore ( StoreSDNode *  SD, SelectionDAG &  DAG, bool  IsLittle  )

static

Definition at line 2020 of file MipsISelLowering.cpp.

References createStoreLR(), llvm::MemSDNode::getChain(), llvm::StoreSDNode::getValue(), llvm::SDValue::getValueType(), llvm::MVT::i32, llvm::MVT::i64, llvm::StoreSDNode::isTruncatingStore(), llvm::MipsISD::SDL, llvm::MipsISD::SDR, llvm::MipsISD::SWL, and llvm::MipsISD::SWR.

Referenced by llvm::MipsTargetLowering::lowerSTORE().

static bool originalTypeIsF128 ( const Type *  Ty, const SDNode *  CallNode  )

static

This function returns true if Ty is fp128 or i128 which was originally a fp128.

Definition at line 3199 of file MipsISelLowering.cpp.

References llvm::ExternalSymbolSDNode::getSymbol(), isF128SoftLibCall(), llvm::Type::isFP128Ty(), and llvm::Type::isIntegerTy().

static std::pair<bool, bool> parsePhysicalReg ( const StringRef &  C, std::string &  Prefix, unsigned long long &  Reg  )

static

This is a helper function to parse a physical register string and split it into non-numeric and numeric parts (Prefix and Reg). The first boolean flag that is returned indicates whether parsing was successful. The second flag is true if the numeric part exists.

Definition at line 2867 of file MipsISelLowering.cpp.

References llvm::StringRef::back(), llvm::StringRef::begin(), llvm::StringRef::end(), llvm::StringRef::front(), llvm::getAsUnsignedInteger(), I, and llvm::LibFunc::isdigit.

static SDValue performADDCombine ( SDNode *  N, SelectionDAG &  DAG, TargetLowering::DAGCombinerInfo &  DCI, const MipsSubtarget *  Subtarget  )

static

Definition at line 647 of file MipsISelLowering.cpp.

References llvm::ISD::ADD, llvm::SelectionDAG::getNode(), llvm::SDValue::getOpcode(), llvm::SDValue::getOperand(), llvm::SDNode::getOperand(), llvm::SDNode::getValueType(), llvm::TargetLowering::DAGCombinerInfo::isBeforeLegalizeOps(), llvm::HexagonISD::Lo, llvm::MipsISD::Lo, and llvm::ISD::TargetJumpTable.

Referenced by llvm::MipsTargetLowering::PerformDAGCombine().

static SDValue performANDCombine ( SDNode *  N, SelectionDAG &  DAG, TargetLowering::DAGCombinerInfo &  DCI, const MipsSubtarget *  Subtarget  )

static

Definition at line 553 of file MipsISelLowering.cpp.

References llvm::MipsISD::Ext, llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getNode(), llvm::SDValue::getOpcode(), llvm::SDValue::getOperand(), llvm::SDNode::getOperand(), llvm::EVT::getSizeInBits(), llvm::SDNode::getValueType(), llvm::ConstantSDNode::getZExtValue(), llvm::MipsSubtarget::hasExtractInsert(), llvm::MVT::i32, llvm::TargetLowering::DAGCombinerInfo::isBeforeLegalizeOps(), isShiftedMask(), llvm::ISD::SRA, and llvm::ISD::SRL.

Referenced by llvm::MipsTargetLowering::PerformDAGCombine().

static SDValue performDivRemCombine ( SDNode *  N, SelectionDAG &  DAG, TargetLowering::DAGCombinerInfo &  DCI, const MipsSubtarget *  Subtarget  )

static

Definition at line 410 of file MipsISelLowering.cpp.

References llvm::MipsISD::DivRem, llvm::MipsISD::DivRem16, llvm::MipsISD::DivRemU16, llvm::SelectionDAG::getCopyFromReg(), llvm::SelectionDAG::getEntryNode(), llvm::SelectionDAG::getNode(), llvm::SDNode::getOpcode(), llvm::SDNode::getOperand(), llvm::SDValue::getValue(), llvm::SDNode::getValueType(), llvm::MVT::Glue, llvm::SDNode::hasAnyUseOfValue(), HI, llvm::MVT::i32, llvm::TargetLowering::DAGCombinerInfo::isBeforeLegalizeOps(), LO, llvm::SelectionDAG::ReplaceAllUsesOfValueWith(), and llvm::ISD::SDIVREM.

Referenced by llvm::MipsTargetLowering::PerformDAGCombine().

static SDValue performORCombine ( SDNode *  N, SelectionDAG &  DAG, TargetLowering::DAGCombinerInfo &  DCI, const MipsSubtarget *  Subtarget  )

static

Definition at line 593 of file MipsISelLowering.cpp.

References llvm::ISD::AND, llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getNode(), llvm::SDValue::getOpcode(), llvm::SDValue::getOperand(), llvm::SDNode::getOperand(), llvm::ConstantSDNode::getSExtValue(), llvm::EVT::getSizeInBits(), llvm::SDNode::getValueType(), llvm::ConstantSDNode::getZExtValue(), llvm::MipsSubtarget::hasExtractInsert(), llvm::MVT::i32, llvm::MipsISD::Ins, llvm::TargetLowering::DAGCombinerInfo::isBeforeLegalizeOps(), isShiftedMask(), and llvm::ISD::SHL.

Referenced by llvm::MipsTargetLowering::PerformDAGCombine().

static SDValue performSELECTCombine ( SDNode *  N, SelectionDAG &  DAG, TargetLowering::DAGCombinerInfo &  DCI, const MipsSubtarget *  Subtarget  )

static

Definition at line 520 of file MipsISelLowering.cpp.

References llvm::dyn_cast(), llvm::SelectionDAG::getNode(), llvm::SDValue::getOpcode(), llvm::SDValue::getOperand(), llvm::SDNode::getOperand(), llvm::SelectionDAG::getSetCC(), llvm::ISD::getSetCCInverse(), llvm::SDValue::getValueType(), llvm::ConstantSDNode::getZExtValue(), llvm::TargetLowering::DAGCombinerInfo::isBeforeLegalizeOps(), llvm::EVT::isInteger(), llvm::ISD::SELECT, and llvm::ISD::SETCC.

Referenced by llvm::MipsTargetLowering::PerformDAGCombine().

STATISTIC	(	NumTailCalls	,
		"Number of tail calls"
	)

Variable Documentation

cl::opt<bool> LargeGOT("mxgot", cl::Hidden, cl::desc("MIPS: Enable GOT larger than 64k."), cl::init(false))

static

const uint16_t Mips64DPRegs[8]

static

Initial value:

= {
  Mips::D12_64, Mips::D13_64, Mips::D14_64, Mips::D15_64,
  Mips::D16_64, Mips::D17_64, Mips::D18_64, Mips::D19_64
}

Definition at line 62 of file MipsISelLowering.cpp.

const uint16_t Mips64IntRegs[8]

static

Initial value:

= {
  Mips::A0_64, Mips::A1_64, Mips::A2_64, Mips::A3_64,
  Mips::T0_64, Mips::T1_64, Mips::T2_64, Mips::T3_64
}

Definition at line 57 of file MipsISelLowering.cpp.

Referenced by llvm::MipsTargetLowering::MipsCC::intArgRegs(), and llvm::MipsTargetLowering::MipsCC::numIntArgRegs().

cl::opt<bool> NoZeroDivCheck("mno-check-zero-division", cl::Hidden, cl::desc("MIPS: Don't trap on integer division by zero."), cl::init(false))

static

Referenced by expandPseudoDIV().

const uint16_t O32IntRegs[4]

static

Initial value:

= {
  Mips::A0, Mips::A1, Mips::A2, Mips::A3
}

Definition at line 53 of file MipsISelLowering.cpp.

Referenced by llvm::MipsTargetLowering::MipsCC::intArgRegs(), and llvm::MipsTargetLowering::MipsCC::numIntArgRegs().