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Thumb1InstrInfo.cpp
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1 //===-- Thumb1InstrInfo.cpp - Thumb-1 Instruction Information -------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file contains the Thumb-1 implementation of the TargetInstrInfo class.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "Thumb1InstrInfo.h"
15 #include "ARM.h"
20 #include "llvm/MC/MCInst.h"
21 
22 using namespace llvm;
23 
25  : ARMBaseInstrInfo(STI), RI(STI) {
26 }
27 
28 /// getNoopForMachoTarget - Return the noop instruction to use for a noop.
30  NopInst.setOpcode(ARM::tMOVr);
31  NopInst.addOperand(MCOperand::CreateReg(ARM::R8));
32  NopInst.addOperand(MCOperand::CreateReg(ARM::R8));
34  NopInst.addOperand(MCOperand::CreateReg(0));
35 }
36 
37 unsigned Thumb1InstrInfo::getUnindexedOpcode(unsigned Opc) const {
38  return 0;
39 }
40 
43  unsigned DestReg, unsigned SrcReg,
44  bool KillSrc) const {
45  AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::tMOVr), DestReg)
46  .addReg(SrcReg, getKillRegState(KillSrc)));
47  assert(ARM::GPRRegClass.contains(DestReg, SrcReg) &&
48  "Thumb1 can only copy GPR registers");
49 }
50 
53  unsigned SrcReg, bool isKill, int FI,
54  const TargetRegisterClass *RC,
55  const TargetRegisterInfo *TRI) const {
56  assert((RC == &ARM::tGPRRegClass ||
58  isARMLowRegister(SrcReg))) && "Unknown regclass!");
59 
60  if (RC == &ARM::tGPRRegClass ||
62  isARMLowRegister(SrcReg))) {
63  DebugLoc DL;
64  if (I != MBB.end()) DL = I->getDebugLoc();
65 
66  MachineFunction &MF = *MBB.getParent();
67  MachineFrameInfo &MFI = *MF.getFrameInfo();
68  MachineMemOperand *MMO =
71  MFI.getObjectSize(FI),
72  MFI.getObjectAlignment(FI));
73  AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::tSTRspi))
74  .addReg(SrcReg, getKillRegState(isKill))
75  .addFrameIndex(FI).addImm(0).addMemOperand(MMO));
76  }
77 }
78 
81  unsigned DestReg, int FI,
82  const TargetRegisterClass *RC,
83  const TargetRegisterInfo *TRI) const {
84  assert((RC == &ARM::tGPRRegClass ||
86  isARMLowRegister(DestReg))) && "Unknown regclass!");
87 
88  if (RC == &ARM::tGPRRegClass ||
90  isARMLowRegister(DestReg))) {
91  DebugLoc DL;
92  if (I != MBB.end()) DL = I->getDebugLoc();
93 
94  MachineFunction &MF = *MBB.getParent();
95  MachineFrameInfo &MFI = *MF.getFrameInfo();
96  MachineMemOperand *MMO =
99  MFI.getObjectSize(FI),
100  MFI.getObjectAlignment(FI));
101  AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::tLDRspi), DestReg)
102  .addFrameIndex(FI).addImm(0).addMemOperand(MMO));
103  }
104 }
The memory access reads data.
const MachineFunction * getParent() const
unsigned getUnindexedOpcode(unsigned Opc) const
The memory access writes data.
static MCOperand CreateReg(unsigned Reg)
Definition: MCInst.h:111
MachineMemOperand * getMachineMemOperand(MachinePointerInfo PtrInfo, unsigned f, uint64_t s, unsigned base_alignment, const MDNode *TBAAInfo=0, const MDNode *Ranges=0)
static MachinePointerInfo getFixedStack(int FI, int64_t offset=0)
void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, DebugLoc DL, unsigned DestReg, unsigned SrcReg, bool KillSrc) const
static const MachineInstrBuilder & AddDefaultPred(const MachineInstrBuilder &MIB)
void storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const
Abstract Stack Frame Information.
void getNoopForMachoTarget(MCInst &NopInst) const
getNoopForMachoTarget - Return the noop instruction to use for a noop.
unsigned getKillRegState(bool B)
bundle_iterator< MachineInstr, instr_iterator > iterator
MachineInstrBuilder BuildMI(MachineFunction &MF, DebugLoc DL, const MCInstrDesc &MCID)
void setOpcode(unsigned Op)
Definition: MCInst.h:157
void loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const
unsigned getObjectAlignment(int ObjectIdx) const
getObjectAlignment - Return the alignment of the specified stack object.
MachineFrameInfo * getFrameInfo()
static bool isARMLowRegister(unsigned Reg)
Definition: ARMBaseInfo.h:209
static bool isPhysicalRegister(unsigned Reg)
static MCOperand CreateImm(int64_t Val)
Definition: MCInst.h:117
Thumb1InstrInfo(const ARMSubtarget &STI)
#define I(x, y, z)
Definition: MD5.cpp:54
void addOperand(const MCOperand &Op)
Definition: MCInst.h:167
int64_t getObjectSize(int ObjectIdx) const