#include <Thumb2RegisterInfo.h>

Inheritance diagram for llvm::Thumb2RegisterInfo:

Collaboration diagram for llvm::Thumb2RegisterInfo:

Public Member Functions
	Thumb2RegisterInfo (const ARMSubtarget &STI)

void	emitLoadConstPool (MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, DebugLoc dl, unsigned DestReg, unsigned SubIdx, int Val, ARMCC::CondCodes Pred=ARMCC::AL, unsigned PredReg=0, unsigned MIFlags=MachineInstr::NoFlags) const

Public Member Functions inherited from llvm::ARMBaseRegisterInfo
const uint16_t *	getCalleeSavedRegs (const MachineFunction *MF=0) const
	Code Generation virtual methods... More...

const uint32_t *	getCallPreservedMask (CallingConv::ID) const

const uint32_t *	getNoPreservedMask () const

const uint32_t *	getThisReturnPreservedMask (CallingConv::ID) const

BitVector	getReservedRegs (const MachineFunction &MF) const

const TargetRegisterClass *	getPointerRegClass (const MachineFunction &MF, unsigned Kind=0) const

const TargetRegisterClass *	getCrossCopyRegClass (const TargetRegisterClass *RC) const

const TargetRegisterClass *	getLargestLegalSuperClass (const TargetRegisterClass *RC) const

unsigned	getRegPressureLimit (const TargetRegisterClass *RC, MachineFunction &MF) const

void	getRegAllocationHints (unsigned VirtReg, ArrayRef< MCPhysReg > Order, SmallVectorImpl< MCPhysReg > &Hints, const MachineFunction &MF, const VirtRegMap *VRM) const

void	UpdateRegAllocHint (unsigned Reg, unsigned NewReg, MachineFunction &MF) const

virtual bool	avoidWriteAfterWrite (const TargetRegisterClass *RC) const

bool	hasBasePointer (const MachineFunction &MF) const

bool	canRealignStack (const MachineFunction &MF) const

bool	needsStackRealignment (const MachineFunction &MF) const

int64_t	getFrameIndexInstrOffset (const MachineInstr *MI, int Idx) const

bool	needsFrameBaseReg (MachineInstr *MI, int64_t Offset) const

void	materializeFrameBaseRegister (MachineBasicBlock *MBB, unsigned BaseReg, int FrameIdx, int64_t Offset) const

void	resolveFrameIndex (MachineBasicBlock::iterator I, unsigned BaseReg, int64_t Offset) const

bool	isFrameOffsetLegal (const MachineInstr *MI, int64_t Offset) const

bool	cannotEliminateFrame (const MachineFunction &MF) const

unsigned	getFrameRegister (const MachineFunction &MF) const

unsigned	getBaseRegister () const

bool	isLowRegister (unsigned Reg) const

virtual bool	requiresRegisterScavenging (const MachineFunction &MF) const
	Code Generation virtual methods... More...

virtual bool	trackLivenessAfterRegAlloc (const MachineFunction &MF) const

virtual bool	requiresFrameIndexScavenging (const MachineFunction &MF) const

virtual bool	requiresVirtualBaseRegisters (const MachineFunction &MF) const

virtual void	eliminateFrameIndex (MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, RegScavenger *RS=NULL) const

Additional Inherited Members
Protected Member Functions inherited from llvm::ARMBaseRegisterInfo
	ARMBaseRegisterInfo (const ARMSubtarget &STI)

unsigned	getOpcode (int Op) const

Protected Attributes inherited from llvm::ARMBaseRegisterInfo
const ARMSubtarget &	STI

unsigned	FramePtr
	FramePtr - ARM physical register used as frame ptr. More...

unsigned	BasePtr

Detailed Description

Definition at line 26 of file Thumb2RegisterInfo.h.

Constructor & Destructor Documentation

Thumb2RegisterInfo::Thumb2RegisterInfo ( const ARMSubtarget & STI )

Definition at line 27 of file Thumb2RegisterInfo.cpp.

Member Function Documentation

void Thumb2RegisterInfo::emitLoadConstPool	(	MachineBasicBlock &	MBB,
		MachineBasicBlock::iterator &	MBBI,
		DebugLoc	dl,
		unsigned	DestReg,
		unsigned	SubIdx,
		int	Val,
		ARMCC::CondCodes	Pred = `ARMCC::AL`,
		unsigned	PredReg = `0`,
		unsigned	MIFlags = `MachineInstr::NoFlags`
	)		const

virtual

emitLoadConstPool - Emits a load from constpool to materialize the specified immediate.

Reimplemented from llvm::ARMBaseRegisterInfo.

Definition at line 34 of file Thumb2RegisterInfo.cpp.

References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), llvm::ARMCC::AL, llvm::BuildMI(), llvm::CallingConv::C, llvm::ISD::ConstantPool, llvm::MCInstrInfo::get(), llvm::ConstantInt::get(), llvm::MachineFunction::getConstantPool(), llvm::MachineConstantPool::getConstantPoolIndex(), llvm::Function::getContext(), llvm::getDefRegState(), llvm::MachineFunction::getFunction(), llvm::TargetMachine::getInstrInfo(), llvm::Type::getInt32Ty(), llvm::MachineBasicBlock::getParent(), llvm::MachineFunction::getTarget(), llvm::MachineInstrBuilder::setMIFlags(), and TII.

The documentation for this struct was generated from the following files:

Public Member Functions

Additional Inherited Members

Detailed Description

Constructor & Destructor Documentation

Member Function Documentation