25 #define GET_INSTRINFO_CTOR_DTOR
26 #include "MipsGenInstrInfo.inc"
31 void MipsInstrInfo::anchor() {}
35 TM(tm), UncondBrOpc(UncondBr) {}
54 BuildMI(MBB, MI, DL,
get(Mips::NOP));
58 unsigned Flag)
const {
71 void MipsInstrInfo::AnalyzeCondBr(
const MachineInstr *Inst,
unsigned Opc,
74 assert(getAnalyzableBrOpc(Opc) &&
"Not an analyzable branch");
82 for (
int i=0; i<NumOp-1; i++)
90 bool AllowModify)
const {
101 unsigned Opc = Cond[0].getImm();
105 for (
unsigned i = 1; i < Cond.
size(); ++i) {
107 MIB.
addReg(Cond[i].getReg());
108 else if (Cond[i].isImm())
109 MIB.
addImm(Cond[i].getImm());
111 assert(
true &&
"Cannot copy operand");
122 assert(TBB &&
"InsertBranch must not be told to insert a fallthrough");
129 assert((Cond.
size() <= 3) &&
130 "# of Mips branch conditions must be <= 3!");
134 BuildCondBr(MBB, TBB, DL, Cond);
144 BuildCondBr(MBB, TBB, DL, Cond);
156 while (I != REnd && I->isDebugValue())
163 for(removed = 0; I != REnd && removed < 2; ++
I, ++removed)
164 if (!getAnalyzableBrOpc(I->getOpcode()))
167 MBB.
erase(I.base(), FirstBr.base());
177 assert( (Cond.
size() && Cond.
size() <= 3) &&
178 "Invalid Mips branch condition!");
192 while (I != REnd && I->isDebugValue())
195 if (I == REnd || !isUnpredicatedTerminator(&*I)) {
203 unsigned LastOpc = LastInst->
getOpcode();
207 if (!getAnalyzableBrOpc(LastOpc))
211 unsigned SecondLastOpc = 0;
215 SecondLastInst = &*
I;
216 SecondLastOpc = getAnalyzableBrOpc(SecondLastInst->
getOpcode());
219 if (isUnpredicatedTerminator(SecondLastInst) && !SecondLastOpc)
224 if (!SecondLastOpc) {
232 AnalyzeCondBr(LastInst, LastOpc, TBB, Cond);
238 if (++I != REnd && isUnpredicatedTerminator(&*I))
241 BranchInstrs.
insert(BranchInstrs.
begin(), SecondLastInst);
261 AnalyzeCondBr(SecondLastInst, SecondLastOpc, TBB, Cond);
277 case Mips::CONSTPOOL_ENTRY:
288 MIB =
BuildMI(*I->getParent(),
I, I->getDebugLoc(),
get(NewOpc));
290 for (
unsigned J = 0, E = I->getDesc().getNumOperands(); J < E; ++J)
293 MIB.
setMemRefs(I->memoperands_begin(), I->memoperands_end());
static bool isReg(const MCInst &MI, unsigned OpNo)
bool isZeroImm(const MachineOperand &op) const
void push_back(const T &Elt)
const MachineFunction * getParent() const
instr_iterator erase(instr_iterator I)
virtual bool ReverseBranchCondition(SmallVectorImpl< MachineOperand > &Cond) const
const MipsInstrInfo * createMips16InstrInfo(MipsTargetMachine &TM)
Create MipsInstrInfo objects.
MachineBasicBlock * getMBB() const
MachineMemOperand * getMachineMemOperand(MachinePointerInfo PtrInfo, unsigned f, uint64_t s, unsigned base_alignment, const MDNode *TBAAInfo=0, const MDNode *Ranges=0)
iterator insert(iterator I, const T &Elt)
const MCInstrDesc & getDesc() const
static const MipsInstrInfo * create(MipsTargetMachine &TM)
const char * getSymbolName() const
virtual unsigned getOppositeBranchOpc(unsigned Opc) const =0
virtual bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify) const
Branch Analysis.
static MachinePointerInfo getFixedStack(int FI, int64_t offset=0)
X86 bit-test instructions.
const MipsInstrInfo * createMipsSEInstrInfo(MipsTargetMachine &TM)
const MCAsmInfo * getMCAsmInfo() const
bool isImm() const
isImm - Tests if this is a MO_Immediate operand.
Abstract Stack Frame Information.
virtual unsigned RemoveBranch(MachineBasicBlock &MBB) const
virtual const MipsSubtarget * getSubtargetImpl() const
const MachineInstrBuilder & addImm(int64_t Val) const
bool LLVM_ATTRIBUTE_UNUSED_RESULT empty() const
reverse_iterator rbegin()
const MachineBasicBlock * getParent() const
bundle_iterator< MachineInstr, instr_iterator > iterator
MipsInstrInfo(MipsTargetMachine &TM, unsigned UncondBrOpc)
const MachineInstrBuilder & setMemRefs(MachineInstr::mmo_iterator b, MachineInstr::mmo_iterator e) const
virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, const SmallVectorImpl< MachineOperand > &Cond, DebugLoc DL) const
const MachineOperand & getOperand(unsigned i) const
unsigned getSize() const
Return the number of bytes in the encoding of this instruction, or zero if the encoding size cannot b...
bool isIndirectBranch(QueryType Type=AnyInBundle) const
unsigned getNumExplicitOperands() const
bool inMips16Mode() const
MachineInstrBuilder BuildMI(MachineFunction &MF, DebugLoc DL, const MCInstrDesc &MCID)
virtual void insertNoop(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI) const
Insert nop instruction when hazard condition is found.
unsigned getObjectAlignment(int ObjectIdx) const
getObjectAlignment - Return the alignment of the specified stack object.
MachineFrameInfo * getFrameInfo()
static cl::opt< AlignMode > Align(cl::desc("Load/store alignment support"), cl::Hidden, cl::init(DefaultAlign), cl::values(clEnumValN(DefaultAlign,"arm-default-align","Generate unaligned accesses only on hardware/OS ""combinations that are known to support them"), clEnumValN(StrictAlign,"arm-strict-align","Disallow all unaligned memory accesses"), clEnumValN(NoStrictAlign,"arm-no-strict-align","Allow unaligned memory accesses"), clEnumValEnd))
static MachineOperand CreateImm(int64_t Val)
const TargetMachine & getTarget() const
std::reverse_iterator< iterator > reverse_iterator
const MachineInstrBuilder & addMBB(MachineBasicBlock *MBB, unsigned char TargetFlags=0) const
const MachineInstrBuilder & addOperand(const MachineOperand &MO) const
unsigned GetInstSizeInBytes(const MachineInstr *MI) const
Return the number of bytes of code the specified instruction may be.
MachineMemOperand * GetMemOperand(MachineBasicBlock &MBB, int FI, unsigned Flag) const
const MachineInstrBuilder & addReg(unsigned RegNo, unsigned flags=0, unsigned SubReg=0) const
MachineInstrBuilder genInstrWithNewOpc(unsigned NewOpc, MachineBasicBlock::iterator I) const
int64_t getObjectSize(int ObjectIdx) const