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llvm::MipsSEInstrInfo Class Reference

#include <MipsSEInstrInfo.h>

Inheritance diagram for llvm::MipsSEInstrInfo:
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Collaboration diagram for llvm::MipsSEInstrInfo:
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Public Member Functions

 MipsSEInstrInfo (MipsTargetMachine &TM)
 
virtual const MipsRegisterInfogetRegisterInfo () const
 
virtual unsigned isLoadFromStackSlot (const MachineInstr *MI, int &FrameIndex) const
 
virtual unsigned isStoreToStackSlot (const MachineInstr *MI, int &FrameIndex) const
 
virtual void copyPhysReg (MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, DebugLoc DL, unsigned DestReg, unsigned SrcReg, bool KillSrc) const
 
virtual void storeRegToStack (MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI, int64_t Offset) const
 
virtual void loadRegFromStack (MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI, int64_t Offset) const
 
virtual bool expandPostRAPseudo (MachineBasicBlock::iterator MI) const
 
virtual unsigned getOppositeBranchOpc (unsigned Opc) const
 
void adjustStackPtr (unsigned SP, int64_t Amount, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const
 Adjust SP by Amount bytes. More...
 
unsigned loadImmediate (int64_t Imm, MachineBasicBlock &MBB, MachineBasicBlock::iterator II, DebugLoc DL, unsigned *NewImm) const
 
- Public Member Functions inherited from llvm::MipsInstrInfo
 MipsInstrInfo (MipsTargetMachine &TM, unsigned UncondBrOpc)
 
virtual bool AnalyzeBranch (MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify) const
 Branch Analysis. More...
 
virtual unsigned RemoveBranch (MachineBasicBlock &MBB) const
 
virtual unsigned InsertBranch (MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, const SmallVectorImpl< MachineOperand > &Cond, DebugLoc DL) const
 
virtual bool ReverseBranchCondition (SmallVectorImpl< MachineOperand > &Cond) const
 
BranchType AnalyzeBranch (MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify, SmallVectorImpl< MachineInstr * > &BranchInstrs) const
 
virtual void insertNoop (MachineBasicBlock &MBB, MachineBasicBlock::iterator MI) const
 Insert nop instruction when hazard condition is found. More...
 
unsigned GetInstSizeInBytes (const MachineInstr *MI) const
 Return the number of bytes of code the specified instruction may be. More...
 
virtual void storeRegToStackSlot (MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const
 
virtual void loadRegFromStackSlot (MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const
 
MachineInstrBuilder genInstrWithNewOpc (unsigned NewOpc, MachineBasicBlock::iterator I) const
 

Additional Inherited Members

- Public Types inherited from llvm::MipsInstrInfo
enum  BranchType {
  BT_None, BT_NoBranch, BT_Uncond, BT_Cond,
  BT_CondUncond, BT_Indirect
}
 
- Static Public Member Functions inherited from llvm::MipsInstrInfo
static const MipsInstrInfocreate (MipsTargetMachine &TM)
 
- Protected Member Functions inherited from llvm::MipsInstrInfo
bool isZeroImm (const MachineOperand &op) const
 
MachineMemOperandGetMemOperand (MachineBasicBlock &MBB, int FI, unsigned Flag) const
 
- Protected Attributes inherited from llvm::MipsInstrInfo
MipsTargetMachineTM
 
unsigned UncondBrOpc
 

Detailed Description

Definition at line 22 of file MipsSEInstrInfo.h.

Constructor & Destructor Documentation

MipsSEInstrInfo::MipsSEInstrInfo ( MipsTargetMachine TM)
explicit

Definition at line 27 of file MipsSEInstrInfo.cpp.

Member Function Documentation

void MipsSEInstrInfo::adjustStackPtr ( unsigned  SP,
int64_t  Amount,
MachineBasicBlock MBB,
MachineBasicBlock::iterator  I 
) const
void MipsSEInstrInfo::copyPhysReg ( MachineBasicBlock MBB,
MachineBasicBlock::iterator  MI,
DebugLoc  DL,
unsigned  DestReg,
unsigned  SrcReg,
bool  KillSrc 
) const
virtual
bool MipsSEInstrInfo::expandPostRAPseudo ( MachineBasicBlock::iterator  MI) const
virtual
unsigned MipsSEInstrInfo::getOppositeBranchOpc ( unsigned  Opc) const
virtual

getOppositeBranchOpc - Return the inverse of the specified opcode, e.g. turning BEQ to BNE.

Implements llvm::MipsInstrInfo.

Definition at line 329 of file MipsSEInstrInfo.cpp.

References llvm_unreachable.

const MipsRegisterInfo & MipsSEInstrInfo::getRegisterInfo ( ) const
virtual

getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As such, whenever a client has an instance of instruction info, it should always be able to get register info as well (through this method).

Implements llvm::MipsInstrInfo.

Definition at line 33 of file MipsSEInstrInfo.cpp.

unsigned MipsSEInstrInfo::isLoadFromStackSlot ( const MachineInstr MI,
int &  FrameIndex 
) const
virtual

isLoadFromStackSlot - If the specified machine instruction is a direct load from a stack slot, return the virtual or physical register number of the destination along with the FrameIndex of the loaded stack slot. If not, return 0. This predicate must return 0 if the instruction has any side effects other than loading from the stack slot.

Definition at line 43 of file MipsSEInstrInfo.cpp.

References llvm::MachineOperand::getIndex(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), llvm::MachineOperand::isFI(), llvm::MachineOperand::isImm(), llvm::MipsInstrInfo::isZeroImm(), and llvm::A64DB::LD.

unsigned MipsSEInstrInfo::isStoreToStackSlot ( const MachineInstr MI,
int &  FrameIndex 
) const
virtual

isStoreToStackSlot - If the specified machine instruction is a direct store to a stack slot, return the virtual or physical register number of the source reg along with the FrameIndex of the loaded stack slot. If not, return 0. This predicate must return 0 if the instruction has any side effects other than storing to the stack slot.

Definition at line 66 of file MipsSEInstrInfo.cpp.

References llvm::MachineOperand::getIndex(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), llvm::MachineOperand::isFI(), llvm::MachineOperand::isImm(), and llvm::MipsInstrInfo::isZeroImm().

unsigned MipsSEInstrInfo::loadImmediate ( int64_t  Imm,
MachineBasicBlock MBB,
MachineBasicBlock::iterator  II,
DebugLoc  DL,
unsigned NewImm 
) const

Emit a series of instructions to load an immediate. If NewImm is a non-NULL parameter, the last instruction is not emitted, but instead its immediate operand is returned in NewImm.

This function generates the sequence of instructions needed to get the result of adding register REG and immediate IMM.

Definition at line 369 of file MipsSEInstrInfo.cpp.

References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), llvm::MipsAnalyzeImmediate::Analyze(), llvm::SmallVectorTemplateCommon< T, typename >::begin(), llvm::BuildMI(), llvm::SmallVectorTemplateCommon< T, typename >::end(), llvm::MachineBasicBlock::getParent(), llvm::MachineFunction::getRegInfo(), llvm::TargetMachine::getSubtarget(), llvm::MipsSubtarget::isABI_N64(), llvm::RegState::Kill, llvm::SmallVectorTemplateCommon< T, typename >::size(), and llvm::MipsInstrInfo::TM.

Referenced by adjustStackPtr().

void MipsSEInstrInfo::loadRegFromStack ( MachineBasicBlock MBB,
MachineBasicBlock::iterator  MI,
unsigned  DestReg,
int  FrameIndex,
const TargetRegisterClass RC,
const TargetRegisterInfo TRI,
int64_t  Offset 
) const
virtual
void MipsSEInstrInfo::storeRegToStack ( MachineBasicBlock MBB,
MachineBasicBlock::iterator  MI,
unsigned  SrcReg,
bool  isKill,
int  FrameIndex,
const TargetRegisterClass RC,
const TargetRegisterInfo TRI,
int64_t  Offset 
) const
virtual

The documentation for this class was generated from the following files: