LLVM API Documentation
#include "ARM.h"
#include "ARMBaseInstrInfo.h"
#include "ARMBaseRegisterInfo.h"
#include "ARMMachineFunctionInfo.h"
#include "MCTargetDesc/ARMAddressingModes.h"
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/ADT/SmallSet.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/Statistic.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/RegisterScavenging.h"
#include "llvm/CodeGen/SelectionDAGNodes.h"
#include "llvm/IR/DataLayout.h"
#include "llvm/IR/DerivedTypes.h"
#include "llvm/IR/Function.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetRegisterInfo.h"
Go to the source code of this file.
Namespaces | |
llvm | |
List of target independent CodeGen pass IDs. | |
llvm::ARM_AM | |
ARM_AM - ARM Addressing Mode Stuff. | |
Macros | |
#define | DEBUG_TYPE "arm-ldst-opt" |
Functions | |
STATISTIC (NumLDMGened,"Number of ldm instructions generated") | |
STATISTIC (NumSTMGened,"Number of stm instructions generated") | |
STATISTIC (NumVLDMGened,"Number of vldm instructions generated") | |
STATISTIC (NumVSTMGened,"Number of vstm instructions generated") | |
STATISTIC (NumLdStMoved,"Number of load / store instructions moved") | |
STATISTIC (NumLDRDFormed,"Number of ldrd created before allocation") | |
STATISTIC (NumSTRDFormed,"Number of strd created before allocation") | |
STATISTIC (NumLDRD2LDM,"Number of ldrd instructions turned back into ldm") | |
STATISTIC (NumSTRD2STM,"Number of strd instructions turned back into stm") | |
STATISTIC (NumLDRD2LDR,"Number of ldrd instructions turned back into ldr's") | |
STATISTIC (NumSTRD2STR,"Number of strd instructions turned back into str's") | |
static int | getLoadStoreMultipleOpcode (int Opcode, ARM_AM::AMSubMode Mode) |
AMSubMode | llvm::ARM_AM::getLoadStoreMultipleSubMode (int Opcode) |
static bool | isT2i32Load (unsigned Opc) |
static bool | isi32Load (unsigned Opc) |
static bool | isT2i32Store (unsigned Opc) |
static bool | isi32Store (unsigned Opc) |
static bool | definesCPSR (MachineInstr *MI) |
static bool | isMatchingDecrement (MachineInstr *MI, unsigned Base, unsigned Bytes, unsigned Limit, ARMCC::CondCodes Pred, unsigned PredReg) |
static bool | isMatchingIncrement (MachineInstr *MI, unsigned Base, unsigned Bytes, unsigned Limit, ARMCC::CondCodes Pred, unsigned PredReg) |
static unsigned | getLSMultipleTransferSize (MachineInstr *MI) |
static unsigned | getUpdatingLSMultipleOpcode (unsigned Opc, ARM_AM::AMSubMode Mode) |
static unsigned | getPreIndexedLoadStoreOpcode (unsigned Opc, ARM_AM::AddrOpc Mode) |
static unsigned | getPostIndexedLoadStoreOpcode (unsigned Opc, ARM_AM::AddrOpc Mode) |
static bool | isMemoryOp (const MachineInstr *MI) |
static int | getMemoryOpOffset (const MachineInstr *MI) |
static void | InsertLDR_STR (MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, int Offset, bool isDef, DebugLoc dl, unsigned NewOpc, unsigned Reg, bool RegDeadKill, bool RegUndef, unsigned BaseReg, bool BaseKill, bool BaseUndef, bool OffKill, bool OffUndef, ARMCC::CondCodes Pred, unsigned PredReg, const TargetInstrInfo *TII, bool isT2) |
static bool | IsSafeAndProfitableToMove (bool isLd, unsigned Base, MachineBasicBlock::iterator I, MachineBasicBlock::iterator E, SmallPtrSet< MachineInstr *, 4 > &MemOps, SmallSet< unsigned, 4 > &MemRegs, const TargetRegisterInfo *TRI) |
static void | concatenateMemOperands (MachineInstr *MI, MachineInstr *Op0, MachineInstr *Op1) |
Copy Op0 and Op1 operands into a new array assigned to MI. More... | |
#define DEBUG_TYPE "arm-ldst-opt" |
Definition at line 15 of file ARMLoadStoreOptimizer.cpp.
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Copy Op0 and Op1 operands into a new array assigned to MI.
Definition at line 1639 of file ARMLoadStoreOptimizer.cpp.
References llvm::MachineFunction::allocateMemRefsArray(), llvm::MachineInstr::getParent(), llvm::MachineBasicBlock::getParent(), llvm::MachineInstr::memoperands_begin(), llvm::MachineInstr::memoperands_empty(), llvm::MachineInstr::memoperands_end(), and llvm::MachineInstr::setMemRefs().
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Definition at line 595 of file ARMLoadStoreOptimizer.cpp.
References llvm::MachineInstr::getNumOperands(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), llvm::MachineOperand::isDead(), llvm::MachineOperand::isDef(), and llvm::MachineOperand::isReg().
Referenced by llvm::ARMTargetLowering::AdjustInstrPostInstrSelection(), isMatchingDecrement(), and isMatchingIncrement().
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Definition at line 141 of file ARMLoadStoreOptimizer.cpp.
References llvm::ARM_AM::da, llvm::ARM_AM::db, llvm::ARM_AM::ia, llvm::ARM_AM::ib, and llvm_unreachable.
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inlinestatic |
Definition at line 675 of file ARMLoadStoreOptimizer.cpp.
References llvm::MachineInstr::getDesc(), llvm::MCInstrDesc::getNumOperands(), llvm::MachineInstr::getNumOperands(), and llvm::MachineInstr::getOpcode().
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Definition at line 1128 of file ARMLoadStoreOptimizer.cpp.
References llvm::ARM_AM::getAM3Offset(), llvm::ARM_AM::getAM3Op(), llvm::ARM_AM::getAM5Offset(), llvm::ARM_AM::getAM5Op(), llvm::MachineInstr::getDesc(), llvm::MachineOperand::getImm(), llvm::MCInstrDesc::getNumOperands(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), and llvm::ARM_AM::sub.
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Definition at line 898 of file ARMLoadStoreOptimizer.cpp.
References llvm::ARM_AM::add, and llvm_unreachable.
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Definition at line 873 of file ARMLoadStoreOptimizer.cpp.
References llvm::ARM_AM::add, and llvm_unreachable.
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Definition at line 711 of file ARMLoadStoreOptimizer.cpp.
References llvm::ARM_AM::da, llvm::ARM_AM::db, llvm::ARM_AM::ia, llvm::ARM_AM::ib, and llvm_unreachable.
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Definition at line 1152 of file ARMLoadStoreOptimizer.cpp.
References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), llvm::MCInstrInfo::get(), llvm::getDeadRegState(), llvm::getDefRegState(), llvm::getKillRegState(), and llvm::getUndefRegState().
Definition at line 270 of file ARMLoadStoreOptimizer.cpp.
References isT2i32Load().
Definition at line 278 of file ARMLoadStoreOptimizer.cpp.
References isT2i32Store().
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Definition at line 609 of file ARMLoadStoreOptimizer.cpp.
References definesCPSR(), llvm::MachineOperand::getImm(), llvm::getInstrPredicate(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), and llvm::MachineOperand::getReg().
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Definition at line 642 of file ARMLoadStoreOptimizer.cpp.
References definesCPSR(), llvm::MachineOperand::getImm(), llvm::getInstrPredicate(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), and llvm::MachineOperand::getReg().
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isMemoryOp - Returns true if instruction is a memory operation that this pass is capable of operating on.
Definition at line 1063 of file ARMLoadStoreOptimizer.cpp.
References llvm::MachineMemOperand::getAlignment(), llvm::MachineInstr::getNumOperands(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineInstr::hasOneMemOperand(), llvm::MachineOperand::isReg(), llvm::MachineOperand::isUndef(), llvm::MachineMemOperand::isVolatile(), and llvm::MachineInstr::memoperands_begin().
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Definition at line 1591 of file ARMLoadStoreOptimizer.cpp.
References llvm::SmallSet< T, N, C >::count(), llvm::SmallPtrSet< PtrType, SmallSize >::count(), llvm::MachineOperand::getReg(), llvm::SmallSet< T, N, C >::insert(), llvm::MachineOperand::isDef(), llvm::MachineOperand::isReg(), llvm::TargetRegisterInfo::regsOverlap(), and llvm::SmallSet< T, N, C >::size().
Definition at line 266 of file ARMLoadStoreOptimizer.cpp.
Referenced by isi32Load().
Definition at line 274 of file ARMLoadStoreOptimizer.cpp.
Referenced by isi32Store().
STATISTIC | ( | NumLDMGened | , |
"Number of ldm instructions generated" | |||
) |
STATISTIC | ( | NumSTMGened | , |
"Number of stm instructions generated" | |||
) |
STATISTIC | ( | NumVLDMGened | , |
"Number of vldm instructions generated" | |||
) |
STATISTIC | ( | NumVSTMGened | , |
"Number of vstm instructions generated" | |||
) |
STATISTIC | ( | NumLdStMoved | , |
"Number of load / store instructions moved" | |||
) |
STATISTIC | ( | NumLDRDFormed | , |
"Number of ldrd created before allocation" | |||
) |
STATISTIC | ( | NumSTRDFormed | , |
"Number of strd created before allocation" | |||
) |
STATISTIC | ( | NumLDRD2LDM | , |
"Number of ldrd instructions turned back into ldm" | |||
) |
STATISTIC | ( | NumSTRD2STM | , |
"Number of strd instructions turned back into stm" | |||
) |
STATISTIC | ( | NumLDRD2LDR | , |
"Number of ldrd instructions turned back into ldr's" | |||
) |
STATISTIC | ( | NumSTRD2STR | , |
"Number of strd instructions turned back into str's" | |||
) |