LLVM API Documentation
#include <Mips16ISelLowering.h>
Public Member Functions | |
Mips16TargetLowering (MipsTargetMachine &TM) | |
virtual bool | allowsUnalignedMemoryAccesses (EVT VT, bool *Fast) const |
Determine if the target supports unaligned memory accesses. More... | |
virtual MachineBasicBlock * | EmitInstrWithCustomInserter (MachineInstr *MI, MachineBasicBlock *MBB) const |
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MipsTargetLowering (MipsTargetMachine &TM) | |
virtual MVT | getScalarShiftAmountTy (EVT LHSTy) const |
virtual void | LowerOperationWrapper (SDNode *N, SmallVectorImpl< SDValue > &Results, SelectionDAG &DAG) const |
virtual SDValue | LowerOperation (SDValue Op, SelectionDAG &DAG) const |
LowerOperation - Provide custom lowering hooks for some operations. More... | |
virtual void | ReplaceNodeResults (SDNode *N, SmallVectorImpl< SDValue > &Results, SelectionDAG &DAG) const |
virtual const char * | getTargetNodeName (unsigned Opcode) const |
getTargetNodeName - This method returns the name of a target specific More... | |
EVT | getSetCCResultType (LLVMContext &Context, EVT VT) const |
getSetCCResultType - get the ISD::SETCC result ValueType More... | |
virtual SDValue | PerformDAGCombine (SDNode *N, DAGCombinerInfo &DCI) const |
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TargetLowering (const TargetMachine &TM, const TargetLoweringObjectFile *TLOF) | |
NOTE: The constructor takes ownership of TLOF. More... | |
virtual bool | getPreIndexedAddressParts (SDNode *, SDValue &, SDValue &, ISD::MemIndexedMode &, SelectionDAG &) const |
virtual bool | getPostIndexedAddressParts (SDNode *, SDNode *, SDValue &, SDValue &, ISD::MemIndexedMode &, SelectionDAG &) const |
virtual const MCExpr * | LowerCustomJumpTableEntry (const MachineJumpTableInfo *, const MachineBasicBlock *, unsigned, MCContext &) const |
virtual SDValue | getPICJumpTableRelocBase (SDValue Table, SelectionDAG &DAG) const |
Returns relocation base for the given PIC jumptable. More... | |
virtual const MCExpr * | getPICJumpTableRelocBaseExpr (const MachineFunction *MF, unsigned JTI, MCContext &Ctx) const |
bool | isInTailCallPosition (SelectionDAG &DAG, SDNode *Node, SDValue &Chain) const |
void | softenSetCCOperands (SelectionDAG &DAG, EVT VT, SDValue &NewLHS, SDValue &NewRHS, ISD::CondCode &CCCode, SDLoc DL) const |
std::pair< SDValue, SDValue > | makeLibCall (SelectionDAG &DAG, RTLIB::Libcall LC, EVT RetVT, const SDValue *Ops, unsigned NumOps, bool isSigned, SDLoc dl, bool doesNotReturn=false, bool isReturnValueUsed=true) const |
Returns a pair of (return value, chain). More... | |
bool | SimplifyDemandedBits (SDValue Op, const APInt &DemandedMask, APInt &KnownZero, APInt &KnownOne, TargetLoweringOpt &TLO, unsigned Depth=0) const |
virtual void | computeMaskedBitsForTargetNode (const SDValue Op, APInt &KnownZero, APInt &KnownOne, const SelectionDAG &DAG, unsigned Depth=0) const |
virtual unsigned | ComputeNumSignBitsForTargetNode (SDValue Op, unsigned Depth=0) const |
SDValue | SimplifySetCC (EVT VT, SDValue N0, SDValue N1, ISD::CondCode Cond, bool foldBooleans, DAGCombinerInfo &DCI, SDLoc dl) const |
virtual bool | isGAPlusOffset (SDNode *N, const GlobalValue *&GA, int64_t &Offset) const |
virtual bool | isTypeDesirableForOp (unsigned, EVT VT) const |
virtual bool | isDesirableToTransformToIntegerOp (unsigned, EVT) const |
virtual bool | IsDesirableToPromoteOp (SDValue, EVT &) const |
std::pair< SDValue, SDValue > | LowerCallTo (CallLoweringInfo &CLI) const |
virtual void | HandleByVal (CCState *, unsigned &, unsigned) const |
Target-specific cleanup for formal ByVal parameters. More... | |
virtual bool | isUsedByReturnOnly (SDNode *, SDValue &) const |
virtual bool | mayBeEmittedAsTailCall (CallInst *) const |
virtual MVT | getTypeForExtArgOrReturn (MVT VT, ISD::NodeType) const |
virtual const uint16_t * | getScratchRegisters (CallingConv::ID CC) const |
virtual FastISel * | createFastISel (FunctionLoweringInfo &, const TargetLibraryInfo *) const |
virtual bool | ExpandInlineAsm (CallInst *) const |
virtual AsmOperandInfoVector | ParseConstraints (ImmutableCallSite CS) const |
virtual ConstraintWeight | getMultipleConstraintMatchWeight (AsmOperandInfo &info, int maIndex) const |
virtual void | ComputeConstraintToUse (AsmOperandInfo &OpInfo, SDValue Op, SelectionDAG *DAG=0) const |
virtual const char * | LowerXConstraint (EVT ConstraintVT) const |
SDValue | BuildExactSDIV (SDValue Op1, SDValue Op2, SDLoc dl, SelectionDAG &DAG) const |
Given an exact SDIV by a constant, create a multiplication with the multiplicative inverse of the constant. More... | |
SDValue | BuildSDIV (SDNode *N, SelectionDAG &DAG, bool IsAfterLegalization, std::vector< SDNode * > *Created) const |
Given an ISD::SDIV node expressing a divide by constant, return a DAG expression to select that will generate the same value by multiplying by a magic number. See: http://the.wall.riscom.net/books/proc/ppc/cwg/code2.html More... | |
SDValue | BuildUDIV (SDNode *N, SelectionDAG &DAG, bool IsAfterLegalization, std::vector< SDNode * > *Created) const |
Given an ISD::UDIV node expressing a divide by constant, return a DAG expression to select that will generate the same value by multiplying by a magic number. See: http://the.wall.riscom.net/books/proc/ppc/cwg/code2.html More... | |
virtual void | AdjustInstrPostInstrSelection (MachineInstr *MI, SDNode *Node) const |
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TargetLoweringBase (const TargetMachine &TM, const TargetLoweringObjectFile *TLOF) | |
NOTE: The constructor takes ownership of TLOF. More... | |
virtual | ~TargetLoweringBase () |
const TargetMachine & | getTargetMachine () const |
const DataLayout * | getDataLayout () const |
const TargetLoweringObjectFile & | getObjFileLowering () const |
bool | isBigEndian () const |
bool | isLittleEndian () const |
virtual MVT | getPointerTy (uint32_t=0) const |
unsigned | getPointerSizeInBits (uint32_t AS=0) const |
unsigned | getPointerTypeSizeInBits (Type *Ty) const |
EVT | getShiftAmountTy (EVT LHSTy) const |
virtual MVT | getVectorIdxTy () const |
bool | isSelectExpensive () const |
Return true if the select operation is expensive for this target. More... | |
virtual bool | isSelectSupported (SelectSupportKind) const |
virtual bool | shouldSplitVectorElementType (EVT) const |
bool | isIntDivCheap () const |
bool | isSlowDivBypassed () const |
Returns true if target has indicated at least one type should be bypassed. More... | |
const DenseMap< unsigned int, unsigned int > & | getBypassSlowDivWidths () const |
bool | isPow2DivCheap () const |
Return true if pow2 div is cheaper than a chain of srl/add/sra. More... | |
bool | isJumpExpensive () const |
bool | isPredictableSelectExpensive () const |
virtual bool | isLoadBitCastBeneficial (EVT, EVT) const |
virtual MVT::SimpleValueType | getCmpLibcallReturnType () const |
BooleanContent | getBooleanContents (bool isVec) const |
Sched::Preference | getSchedulingPreference () const |
Return target scheduling preference. More... | |
virtual Sched::Preference | getSchedulingPreference (SDNode *) const |
virtual const TargetRegisterClass * | getRegClassFor (MVT VT) const |
virtual const TargetRegisterClass * | getRepRegClassFor (MVT VT) const |
virtual uint8_t | getRepRegClassCostFor (MVT VT) const |
bool | isTypeLegal (EVT VT) const |
const ValueTypeActionImpl & | getValueTypeActions () const |
LegalizeTypeAction | getTypeAction (LLVMContext &Context, EVT VT) const |
LegalizeTypeAction | getTypeAction (MVT VT) const |
EVT | getTypeToTransformTo (LLVMContext &Context, EVT VT) const |
EVT | getTypeToExpandTo (LLVMContext &Context, EVT VT) const |
unsigned | getVectorTypeBreakdown (LLVMContext &Context, EVT VT, EVT &IntermediateVT, unsigned &NumIntermediates, MVT &RegisterVT) const |
virtual bool | getTgtMemIntrinsic (IntrinsicInfo &, const CallInst &, unsigned) const |
virtual bool | isShuffleMaskLegal (const SmallVectorImpl< int > &, EVT) const |
virtual bool | canOpTrap (unsigned Op, EVT VT) const |
virtual bool | isVectorClearMaskLegal (const SmallVectorImpl< int > &, EVT) const |
LegalizeAction | getOperationAction (unsigned Op, EVT VT) const |
bool | isOperationLegalOrCustom (unsigned Op, EVT VT) const |
bool | isOperationLegalOrPromote (unsigned Op, EVT VT) const |
bool | isOperationExpand (unsigned Op, EVT VT) const |
bool | isOperationLegal (unsigned Op, EVT VT) const |
Return true if the specified operation is legal on this target. More... | |
LegalizeAction | getLoadExtAction (unsigned ExtType, MVT VT) const |
bool | isLoadExtLegal (unsigned ExtType, EVT VT) const |
Return true if the specified load with extension is legal on this target. More... | |
LegalizeAction | getTruncStoreAction (MVT ValVT, MVT MemVT) const |
bool | isTruncStoreLegal (EVT ValVT, EVT MemVT) const |
LegalizeAction | getIndexedLoadAction (unsigned IdxMode, MVT VT) const |
bool | isIndexedLoadLegal (unsigned IdxMode, EVT VT) const |
Return true if the specified indexed load is legal on this target. More... | |
LegalizeAction | getIndexedStoreAction (unsigned IdxMode, MVT VT) const |
bool | isIndexedStoreLegal (unsigned IdxMode, EVT VT) const |
Return true if the specified indexed load is legal on this target. More... | |
LegalizeAction | getCondCodeAction (ISD::CondCode CC, MVT VT) const |
bool | isCondCodeLegal (ISD::CondCode CC, MVT VT) const |
Return true if the specified condition code is legal on this target. More... | |
MVT | getTypeToPromoteTo (unsigned Op, MVT VT) const |
EVT | getValueType (Type *Ty, bool AllowUnknown=false) const |
MVT | getSimpleValueType (Type *Ty, bool AllowUnknown=false) const |
Return the MVT corresponding to this LLVM type. See getValueType. More... | |
virtual unsigned | getByValTypeAlignment (Type *Ty) const |
MVT | getRegisterType (MVT VT) const |
Return the type of registers that this ValueType will eventually require. More... | |
MVT | getRegisterType (LLVMContext &Context, EVT VT) const |
Return the type of registers that this ValueType will eventually require. More... | |
unsigned | getNumRegisters (LLVMContext &Context, EVT VT) const |
virtual bool | ShouldShrinkFPConstant (EVT) const |
bool | hasTargetDAGCombine (ISD::NodeType NT) const |
unsigned | getMaxStoresPerMemset (bool OptSize) const |
Get maximum # of store operations permitted for llvm.memset. More... | |
unsigned | getMaxStoresPerMemcpy (bool OptSize) const |
Get maximum # of store operations permitted for llvm.memcpy. More... | |
unsigned | getMaxStoresPerMemmove (bool OptSize) const |
Get maximum # of store operations permitted for llvm.memmove. More... | |
virtual bool | isSafeMemOpType (MVT) const |
bool | usesUnderscoreSetJmp () const |
Determine if we should use _setjmp or setjmp to implement llvm.setjmp. More... | |
bool | usesUnderscoreLongJmp () const |
Determine if we should use _longjmp or longjmp to implement llvm.longjmp. More... | |
bool | supportJumpTables () const |
Return whether the target can generate code for jump tables. More... | |
int | getMinimumJumpTableEntries () const |
unsigned | getStackPointerRegisterToSaveRestore () const |
unsigned | getExceptionPointerRegister () const |
unsigned | getExceptionSelectorRegister () const |
unsigned | getJumpBufSize () const |
unsigned | getJumpBufAlignment () const |
unsigned | getMinStackArgumentAlignment () const |
Return the minimum stack alignment of an argument. More... | |
unsigned | getMinFunctionAlignment () const |
Return the minimum function alignment. More... | |
unsigned | getPrefFunctionAlignment () const |
Return the preferred function alignment. More... | |
unsigned | getPrefLoopAlignment () const |
Return the preferred loop alignment. More... | |
bool | getInsertFencesForAtomic () const |
virtual bool | getStackCookieLocation (unsigned &, unsigned &) const |
virtual unsigned | getMaximalGlobalOffset () const |
virtual bool | isNoopAddrSpaceCast (unsigned SrcAS, unsigned DestAS) const |
Returns true if a cast between SrcAS and DestAS is a noop. More... | |
virtual void | resetOperationActions () |
Reset the operation actions based on target options. More... | |
virtual bool | GetAddrModeArguments (IntrinsicInst *, SmallVectorImpl< Value * > &, Type *&) const |
virtual int | getScalingFactorCost (const AddrMode &AM, Type *Ty) const |
Return the cost of the scaling factor used in the addressing mode represented by AM for this target, for a load/store of the specified type. More... | |
virtual bool | isLegalICmpImmediate (int64_t) const |
virtual bool | isLegalAddImmediate (int64_t) const |
virtual bool | isTruncateFree (Type *, Type *) const |
virtual bool | allowTruncateForTailCall (Type *, Type *) const |
virtual bool | isTruncateFree (EVT, EVT) const |
virtual bool | isZExtFree (Type *, Type *) const |
virtual bool | isZExtFree (EVT, EVT) const |
virtual bool | hasPairedLoad (Type *, unsigned &) const |
virtual bool | hasPairedLoad (EVT, unsigned &) const |
virtual bool | isZExtFree (SDValue Val, EVT VT2) const |
virtual bool | isFNegFree (EVT VT) const |
virtual bool | isFAbsFree (EVT VT) const |
virtual bool | isFMAFasterThanFMulAndFAdd (EVT) const |
virtual bool | isNarrowingProfitable (EVT, EVT) const |
void | setLibcallName (RTLIB::Libcall Call, const char *Name) |
Rename the default libcall routine name for the specified libcall. More... | |
const char * | getLibcallName (RTLIB::Libcall Call) const |
Get the libcall routine name for the specified libcall. More... | |
void | setCmpLibcallCC (RTLIB::Libcall Call, ISD::CondCode CC) |
ISD::CondCode | getCmpLibcallCC (RTLIB::Libcall Call) const |
void | setLibcallCallingConv (RTLIB::Libcall Call, CallingConv::ID CC) |
Set the CallingConv that should be used for the specified libcall. More... | |
CallingConv::ID | getLibcallCallingConv (RTLIB::Libcall Call) const |
Get the CallingConv that should be used for the specified libcall. More... | |
LegalizeKind | getTypeConversion (LLVMContext &Context, EVT VT) const |
int | InstructionOpcodeToISD (unsigned Opcode) const |
Get the ISD node that corresponds to the Instruction class opcode. More... | |
std::pair< unsigned, MVT > | getTypeLegalizationCost (Type *Ty) const |
Estimate the cost of type-legalization and the legalized type. More... | |
Definition at line 20 of file Mips16ISelLowering.h.
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explicit |
Definition at line 118 of file Mips16ISelLowering.cpp.
References llvm::TargetLoweringBase::addRegisterClass(), llvm::ISD::ATOMIC_CMP_SWAP, llvm::ISD::ATOMIC_FENCE, llvm::ISD::ATOMIC_LOAD_ADD, llvm::ISD::ATOMIC_LOAD_AND, llvm::ISD::ATOMIC_LOAD_MAX, llvm::ISD::ATOMIC_LOAD_MIN, llvm::ISD::ATOMIC_LOAD_NAND, llvm::ISD::ATOMIC_LOAD_OR, llvm::ISD::ATOMIC_LOAD_SUB, llvm::ISD::ATOMIC_LOAD_UMAX, llvm::ISD::ATOMIC_LOAD_UMIN, llvm::ISD::ATOMIC_LOAD_XOR, llvm::ISD::ATOMIC_SWAP, llvm::ISD::BSWAP, llvm::TargetLoweringBase::clearRegisterClasses(), llvm::TargetLoweringBase::computeRegisterProperties(), llvm::TargetLoweringBase::Expand, llvm::MVT::f32, llvm::MVT::i32, llvm::MVT::i64, llvm::MipsSubtarget::inMips16HardFloat(), llvm::MVT::Other, llvm::ISD::ROTR, llvm::TargetLoweringBase::setOperationAction(), and llvm::MipsTargetLowering::Subtarget.
Determine if the target supports unaligned memory accesses.
This function returns true if the target allows unaligned memory accesses. of the specified type. If true, it also returns whether the unaligned memory access is "fast" in the second argument by reference. This is used, for example, in situations where an array copy/move/set is converted to a sequence of store operations. It's use helps to ensure that such replacements don't generate code that causes an alignment error (trap) on the target machine.
Reimplemented from llvm::TargetLoweringBase.
Definition at line 162 of file Mips16ISelLowering.cpp.
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virtual |
This method should be implemented by targets that mark instructions with the 'usesCustomInserter' flag. These instructions are special in various ways, which require special support to insert. The specified MachineInstr is created but not inserted into any basic blocks, and this method is called to expand it into a sequence of instructions, potentially also creating new basic blocks and control flow.
Reimplemented from llvm::MipsTargetLowering.
Definition at line 167 of file Mips16ISelLowering.cpp.
References llvm::MipsTargetLowering::EmitInstrWithCustomInserter(), and llvm::MachineInstr::getOpcode().