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llvm::PPCRegisterInfo Class Reference

#include <PPCRegisterInfo.h>

Inheritance diagram for llvm::PPCRegisterInfo:
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Collaboration diagram for llvm::PPCRegisterInfo:
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Public Member Functions

 PPCRegisterInfo (const PPCSubtarget &SubTarget)
 
virtual const TargetRegisterClassgetPointerRegClass (const MachineFunction &MF, unsigned Kind=0) const
 
unsigned getRegPressureLimit (const TargetRegisterClass *RC, MachineFunction &MF) const
 
const uint16_t * getCalleeSavedRegs (const MachineFunction *MF=0) const
 Code Generation virtual methods... More...
 
const uint32_t * getCallPreservedMask (CallingConv::ID CC) const
 
const uint32_t * getNoPreservedMask () const
 
BitVector getReservedRegs (const MachineFunction &MF) const
 
bool requiresRegisterScavenging (const MachineFunction &MF) const
 We require the register scavenger. More...
 
bool requiresFrameIndexScavenging (const MachineFunction &MF) const
 
bool trackLivenessAfterRegAlloc (const MachineFunction &MF) const
 
virtual bool requiresVirtualBaseRegisters (const MachineFunction &MF) const
 
void lowerDynamicAlloc (MachineBasicBlock::iterator II) const
 
void lowerCRSpilling (MachineBasicBlock::iterator II, unsigned FrameIndex) const
 
void lowerCRRestore (MachineBasicBlock::iterator II, unsigned FrameIndex) const
 
void lowerVRSAVESpilling (MachineBasicBlock::iterator II, unsigned FrameIndex) const
 
void lowerVRSAVERestore (MachineBasicBlock::iterator II, unsigned FrameIndex) const
 
bool hasReservedSpillSlot (const MachineFunction &MF, unsigned Reg, int &FrameIdx) const
 
void eliminateFrameIndex (MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, RegScavenger *RS=NULL) const
 
bool needsFrameBaseReg (MachineInstr *MI, int64_t Offset) const
 
void materializeFrameBaseRegister (MachineBasicBlock *MBB, unsigned BaseReg, int FrameIdx, int64_t Offset) const
 
void resolveFrameIndex (MachineBasicBlock::iterator I, unsigned BaseReg, int64_t Offset) const
 
bool isFrameOffsetLegal (const MachineInstr *MI, int64_t Offset) const
 
unsigned getFrameRegister (const MachineFunction &MF) const
 
unsigned getBaseRegister (const MachineFunction &MF) const
 
bool hasBasePointer (const MachineFunction &MF) const
 
bool canRealignStack (const MachineFunction &MF) const
 
bool needsStackRealignment (const MachineFunction &MF) const
 

Detailed Description

Definition at line 29 of file PPCRegisterInfo.h.

Constructor & Destructor Documentation

PPCRegisterInfo::PPCRegisterInfo ( const PPCSubtarget SubTarget)

Definition at line 59 of file PPCRegisterInfo.cpp.

References llvm::A64DB::LD.

Member Function Documentation

bool PPCRegisterInfo::canRealignStack ( const MachineFunction MF) const
void PPCRegisterInfo::eliminateFrameIndex ( MachineBasicBlock::iterator  II,
int  SPAdj,
unsigned  FIOperandNum,
RegScavenger RS = NULL 
) const

Definition at line 555 of file PPCRegisterInfo.cpp.

References llvm::MachineInstrBuilder::addImm(), llvm::BuildMI(), llvm::MachineOperand::ChangeToImmediate(), llvm::MachineOperand::ChangeToRegister(), llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT >::count(), llvm::MachineRegisterInfo::createVirtualRegister(), llvm::TargetOpcode::DBG_VALUE, llvm::PPCISD::DYNALLOC, llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT >::find(), llvm::ISD::FrameIndex, llvm::MCInstrInfo::get(), llvm::Function::getAttributes(), getBaseRegister(), llvm::MachineInstr::getDebugLoc(), llvm::MachineFunction::getFrameInfo(), llvm::PPCFunctionInfo::getFramePointerSaveIndex(), getFrameRegister(), llvm::MachineFunction::getFunction(), llvm::MachineOperand::getImm(), llvm::MachineOperand::getIndex(), llvm::MachineFunction::getInfo(), llvm::TargetMachine::getInstrInfo(), llvm::MachineFrameInfo::getObjectOffset(), getOffsetONFromFION(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineInstr::getParent(), llvm::MachineBasicBlock::getParent(), llvm::MachineOperand::getReg(), llvm::MachineFunction::getRegInfo(), llvm::MachineFrameInfo::getStackSize(), llvm::MachineFunction::getTarget(), hasBasePointer(), llvm::TargetOpcode::INLINEASM, llvm::MachineInstr::isInlineAsm(), llvm::isInt< 16 >(), llvm::PPCSubtarget::isPPC64(), llvm::RegState::Kill, lowerCRRestore(), lowerCRSpilling(), lowerDynamicAlloc(), lowerVRSAVERestore(), lowerVRSAVESpilling(), llvm::A64CC::MI, llvm::Attribute::Naked, llvm::MachineInstr::setDesc(), TII, and usesIXAddr().

unsigned PPCRegisterInfo::getBaseRegister ( const MachineFunction MF) const
const uint16_t * PPCRegisterInfo::getCalleeSavedRegs ( const MachineFunction MF = 0) const

Code Generation virtual methods...

Definition at line 101 of file PPCRegisterInfo.cpp.

References llvm::PPCSubtarget::hasAltivec(), llvm::PPCSubtarget::isDarwinABI(), and llvm::PPCSubtarget::isPPC64().

const uint32_t * PPCRegisterInfo::getCallPreservedMask ( CallingConv::ID  CC) const
unsigned PPCRegisterInfo::getFrameRegister ( const MachineFunction MF) const
const uint32_t * PPCRegisterInfo::getNoPreservedMask ( ) const

Definition at line 137 of file PPCRegisterInfo.cpp.

Referenced by llvm::PPCTargetLowering::emitEHSjLjSetJmp().

const TargetRegisterClass * PPCRegisterInfo::getPointerRegClass ( const MachineFunction MF,
unsigned  Kind = 0 
) const
virtual

getPointerRegClass - Return the register class to use to hold pointers. This is used for addressing modes.

Definition at line 85 of file PPCRegisterInfo.cpp.

References llvm::PPCSubtarget::isPPC64().

unsigned PPCRegisterInfo::getRegPressureLimit ( const TargetRegisterClass RC,
MachineFunction MF 
) const
BitVector PPCRegisterInfo::getReservedRegs ( const MachineFunction MF) const
bool PPCRegisterInfo::hasBasePointer ( const MachineFunction MF) const
bool PPCRegisterInfo::hasReservedSpillSlot ( const MachineFunction MF,
unsigned  Reg,
int &  FrameIdx 
) const
bool PPCRegisterInfo::isFrameOffsetLegal ( const MachineInstr MI,
int64_t  Offset 
) const
void PPCRegisterInfo::lowerCRRestore ( MachineBasicBlock::iterator  II,
unsigned  FrameIndex 
) const
void PPCRegisterInfo::lowerCRSpilling ( MachineBasicBlock::iterator  II,
unsigned  FrameIndex 
) const

lowerCRSpilling - Generate the code for spilling a CR register. Instead of reserving a whole register (R0), we scrounge for one here. This generates code like this:

mfcr rA ; Move the conditional register into GPR rA. rlwinm rA, rA, SB, 0, 31 ; Shift the bits left so they are in CR0's slot. stw rA, FI ; Store rA to the frame.

Definition at line 369 of file PPCRegisterInfo.cpp.

References llvm::addFrameReference(), llvm::MachineInstrBuilder::addImm(), llvm::BuildMI(), llvm::MachineRegisterInfo::createVirtualRegister(), llvm::MachineBasicBlock::erase(), llvm::ISD::FrameIndex, llvm::MCInstrInfo::get(), llvm::MachineInstr::getDebugLoc(), llvm::TargetMachine::getInstrInfo(), llvm::getKillRegState(), llvm::MachineInstr::getOperand(), llvm::MachineInstr::getParent(), llvm::MachineBasicBlock::getParent(), llvm::MachineOperand::getReg(), llvm::MachineFunction::getRegInfo(), llvm::MachineFunction::getTarget(), llvm::MachineOperand::isKill(), llvm::PPCSubtarget::isPPC64(), llvm::RegState::Kill, llvm::PPCISD::MFOCRF, llvm::A64CC::MI, and TII.

Referenced by eliminateFrameIndex().

void PPCRegisterInfo::lowerDynamicAlloc ( MachineBasicBlock::iterator  II) const
void PPCRegisterInfo::lowerVRSAVERestore ( MachineBasicBlock::iterator  II,
unsigned  FrameIndex 
) const
void PPCRegisterInfo::lowerVRSAVESpilling ( MachineBasicBlock::iterator  II,
unsigned  FrameIndex 
) const
void PPCRegisterInfo::materializeFrameBaseRegister ( MachineBasicBlock MBB,
unsigned  BaseReg,
int  FrameIdx,
int64_t  Offset 
) const
bool PPCRegisterInfo::needsFrameBaseReg ( MachineInstr MI,
int64_t  Offset 
) const

Returns true if the instruction's frame index reference would be better served by a base register other than FP or SP. Used by LocalStackFrameAllocation to determine which frame index references it should create new base registers for.

Definition at line 737 of file PPCRegisterInfo.cpp.

References llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT >::count(), llvm::PPCFrameLowering::determineFrameLayout(), llvm::TargetMachine::getFrameLowering(), llvm::MachineOperand::getImm(), getOffsetONFromFION(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineInstr::getParent(), llvm::MachineBasicBlock::getParent(), llvm::MachineFunction::getTarget(), llvm::MachineOperand::isFI(), and isFrameOffsetLegal().

bool PPCRegisterInfo::needsStackRealignment ( const MachineFunction MF) const
bool llvm::PPCRegisterInfo::requiresFrameIndexScavenging ( const MachineFunction MF) const
inline

Definition at line 55 of file PPCRegisterInfo.h.

bool llvm::PPCRegisterInfo::requiresRegisterScavenging ( const MachineFunction MF) const
inline

We require the register scavenger.

Definition at line 51 of file PPCRegisterInfo.h.

virtual bool llvm::PPCRegisterInfo::requiresVirtualBaseRegisters ( const MachineFunction MF) const
inlinevirtual

Definition at line 63 of file PPCRegisterInfo.h.

void PPCRegisterInfo::resolveFrameIndex ( MachineBasicBlock::iterator  I,
unsigned  BaseReg,
int64_t  Offset 
) const
bool llvm::PPCRegisterInfo::trackLivenessAfterRegAlloc ( const MachineFunction MF) const
inline

Definition at line 59 of file PPCRegisterInfo.h.


The documentation for this class was generated from the following files: