#include <ScheduleDAGSDNodes.h>

Inheritance diagram for llvm::ScheduleDAGSDNodes:

Collaboration diagram for llvm::ScheduleDAGSDNodes:

Classes
class	RegDefIter

Public Member Functions
	ScheduleDAGSDNodes (MachineFunction &mf)

virtual	~ScheduleDAGSDNodes ()

void	Run (SelectionDAG dag, MachineBasicBlock bb)

SUnit *	newSUnit (SDNode *N)

SUnit *	Clone (SUnit *N)

void	BuildSchedGraph (AliasAnalysis *AA)

void	InitVRegCycleFlag (SUnit *SU)

void	InitNumRegDefsLeft (SUnit *SU)

virtual void	computeLatency (SUnit *SU)

virtual void	computeOperandLatency (SDNode Def, SDNode Use, unsigned OpIdx, SDep &dep) const

virtual void	Schedule ()=0

void	VerifyScheduledSequence (bool isBottomUp)

virtual MachineBasicBlock *	EmitSchedule (MachineBasicBlock::iterator &InsertPos)

virtual void	dumpNode (const SUnit *SU) const

void	dumpSchedule () const

virtual std::string	getGraphNodeLabel (const SUnit *SU) const

virtual std::string	getDAGName () const
	Return the basic block label. More...

virtual void	getCustomGraphFeatures (GraphWriter< ScheduleDAG * > &GW) const

Public Member Functions inherited from llvm::ScheduleDAG
	ScheduleDAG (MachineFunction &mf)

virtual	~ScheduleDAG ()

void	clearDAG ()
	clearDAG - clear the DAG state (between regions). More...

const MCInstrDesc *	getInstrDesc (const SUnit *SU) const

virtual void	viewGraph (const Twine &Name, const Twine &Title)

virtual void	viewGraph ()
	Out-of-line implementation with no arguments is handy for gdb. More...

virtual void	addCustomGraphFeatures (GraphWriter< ScheduleDAG * > &) const

unsigned	VerifyScheduledDAG (bool isBottomUp)

Static Public Member Functions
static bool	isPassiveNode (SDNode *Node)

Public Attributes
MachineBasicBlock *	BB

SelectionDAG *	DAG

const InstrItineraryData *	InstrItins

std::vector< SUnit * >	Sequence
	The schedule. Null SUnit*'s represent noop instructions. More...

Public Attributes inherited from llvm::ScheduleDAG
const TargetMachine &	TM

const TargetInstrInfo *	TII

const TargetRegisterInfo *	TRI

MachineFunction &	MF

MachineRegisterInfo &	MRI

std::vector< SUnit >	SUnits

SUnit	EntrySU

SUnit	ExitSU

bool	StressSched

Protected Member Functions
virtual bool	forceUnitLatencies () const

Detailed Description

ScheduleDAGSDNodes - A ScheduleDAG for scheduling SDNode-based DAGs.

Edges between SUnits are initially based on edges in the SelectionDAG, and additional edges can be added by the schedulers as heuristics. SDNodes such as Constants, Registers, and a few others that are not interesting to schedulers are not allocated SUnits.

SDNodes with MVT::Glue operands are grouped along with the flagged nodes into a single SUnit so that they are scheduled together.

SDNode-based scheduling graphs do not use SDep::Anti or SDep::Output edges. Physical register dependence information is not carried in the DAG and must be handled explicitly by schedulers.

Definition at line 36 of file ScheduleDAGSDNodes.h.

Constructor & Destructor Documentation

ScheduleDAGSDNodes::ScheduleDAGSDNodes ( MachineFunction & mf )

explicit

Definition at line 48 of file ScheduleDAGSDNodes.cpp.

virtual llvm::ScheduleDAGSDNodes::~ScheduleDAGSDNodes ( )

inlinevirtual

Definition at line 47 of file ScheduleDAGSDNodes.h.

Member Function Documentation

void ScheduleDAGSDNodes::BuildSchedGraph ( AliasAnalysis * AA )

BuildSchedGraph - Build the SUnit graph from the selection dag that we are input. This SUnit graph is similar to the SelectionDAG, but excludes nodes that aren't interesting to scheduling, and represents flagged together nodes with a single SUnit.

BuildSchedGraph - Build the SUnit graph from the selection dag that we are input. This SUnit graph is similar to the SelectionDAG, but excludes nodes that aren't interesting to scheduling, and represents glued together nodes with a single SUnit.

Definition at line 516 of file ScheduleDAGSDNodes.cpp.

SUnit * ScheduleDAGSDNodes::Clone ( SUnit * N )

Clone - Creates a clone of the specified SUnit. It does not copy the predecessors / successors info nor the temporary scheduling states.

Definition at line 89 of file ScheduleDAGSDNodes.cpp.

References llvm::SUnit::getNode(), llvm::SUnit::hasPhysRegClobbers, llvm::SUnit::hasPhysRegDefs, llvm::SUnit::isCall, llvm::SUnit::isCallOp, llvm::SUnit::isCloned, llvm::SUnit::isCommutable, llvm::SUnit::isScheduleHigh, llvm::SUnit::isScheduleLow, llvm::SUnit::isTwoAddress, llvm::SUnit::isVRegCycle, llvm::SUnit::Latency, newSUnit(), llvm::SUnit::OrigNode, and llvm::SUnit::SchedulingPref.

void ScheduleDAGSDNodes::computeLatency ( SUnit * SU )

virtual

computeLatency - Compute node latency.

Definition at line 585 of file ScheduleDAGSDNodes.cpp.

References forceUnitLatencies(), llvm::SDNode::getGluedNode(), llvm::TargetInstrInfo::getInstrLatency(), llvm::SDNode::getMachineOpcode(), llvm::SUnit::getNode(), llvm::SDNode::getOpcode(), HighLatencyCycles, InstrItins, llvm::InstrItineraryData::isEmpty(), llvm::TargetInstrInfo::isHighLatencyDef(), llvm::SDNode::isMachineOpcode(), llvm::SUnit::Latency, N, llvm::ScheduleDAG::TII, and llvm::ISD::TokenFactor.

void ScheduleDAGSDNodes::computeOperandLatency	(	SDNode *	Def,
		SDNode *	Use,
		unsigned	OpIdx,
		SDep &	dep
	)		const

virtual

void ScheduleDAGSDNodes::dumpNode ( const SUnit * SU ) const

virtual

Implements llvm::ScheduleDAG.

Definition at line 646 of file ScheduleDAGSDNodes.cpp.

References llvm::SmallVectorTemplateCommon< T >::back(), llvm::dbgs(), llvm::SDNode::dump(), llvm::SmallVectorBase::empty(), llvm::SDNode::getGluedNode(), llvm::SUnit::getNode(), N, llvm::SmallVectorTemplateBase< T, isPodLike< T >::value >::pop_back(), and llvm::SmallVectorTemplateBase< T, isPodLike< T >::value >::push_back().

void ScheduleDAGSDNodes::dumpSchedule ( ) const

Definition at line 668 of file ScheduleDAGSDNodes.cpp.

References llvm::dbgs(), and llvm::SUnit::dump().

MachineBasicBlock * ScheduleDAGSDNodes::EmitSchedule ( MachineBasicBlock::iterator & InsertPos )

virtual

EmitSchedule - Insert MachineInstrs into the MachineBasicBlock according to the order specified in Sequence.

EmitSchedule - Emit the machine code in scheduled order. Return the new InsertPos and MachineBasicBlock that contains this insertion point. ScheduleDAGSDNodes holds a BB pointer for convenience, but this does not necessarily refer to returned BB. The emitter may split blocks.

Definition at line 792 of file ScheduleDAGSDNodes.cpp.

References llvm::SmallVectorTemplateCommon< T >::back(), BB, llvm::SmallVectorTemplateCommon< T >::begin(), llvm::MachineFunction::begin(), llvm::SelectionDAG::ByvalParmDbgBegin(), llvm::SelectionDAG::ByvalParmDbgEnd(), DAG, llvm::SelectionDAG::DbgBegin(), llvm::SelectionDAG::DbgEnd(), llvm::X86II::DE, llvm::InstrEmitter::EmitDbgValue(), llvm::InstrEmitter::EmitNode(), llvm::SmallVectorBase::empty(), llvm::SmallVectorTemplateCommon< T >::end(), llvm::InstrEmitter::getBlock(), llvm::MachineBasicBlock::getFirstNonPHI(), llvm::MachineBasicBlock::getFirstTerminator(), llvm::SDNode::getGluedNode(), llvm::InstrEmitter::getInsertPos(), llvm::SUnit::getNode(), llvm::MachineInstr::getParent(), llvm::MachineBasicBlock::getParent(), llvm::SelectionDAG::hasDebugValues(), llvm::MachineBasicBlock::insert(), llvm::TargetInstrInfo::insertNoop(), llvm::SUnit::isCloned, llvm::A64CC::MI, N, llvm::SUnit::OrigNode, llvm::SmallVectorTemplateBase< T, isPodLike< T >::value >::pop_back(), ProcessSourceNode(), llvm::SmallVectorTemplateBase< T, isPodLike< T >::value >::push_back(), llvm::SmallVectorTemplateCommon< T >::size(), and llvm::ScheduleDAG::TII.

virtual bool llvm::ScheduleDAGSDNodes::forceUnitLatencies ( ) const

inlineprotectedvirtual

ForceUnitLatencies - Return true if all scheduling edges should be given a latency value of one. The default is to return false; schedulers may override this as needed.

Definition at line 166 of file ScheduleDAGSDNodes.h.

Referenced by computeLatency(), and computeOperandLatency().

void ScheduleDAGSDNodes::getCustomGraphFeatures ( GraphWriter< ScheduleDAG * > & GW ) const

virtual

Definition at line 290 of file SelectionDAGPrinter.cpp.

References DAG, llvm::GraphWriter< Graph >::emitEdge(), llvm::GraphWriter< Graph >::emitSimpleNode(), llvm::SDValue::getNode(), llvm::SDNode::getNodeId(), llvm::SelectionDAG::getRoot(), and llvm::ScheduleDAG::SUnits.

std::string ScheduleDAGSDNodes::getDAGName ( ) const

virtual

Return the basic block label.

Implements llvm::ScheduleDAG.

Definition at line 905 of file ScheduleDAGSDNodes.cpp.

References BB, and llvm::MachineBasicBlock::getFullName().

std::string ScheduleDAGSDNodes::getGraphNodeLabel ( const SUnit * SU ) const

virtual

getGraphNodeLabel - Return a label for an SUnit node in a visualization of the ScheduleDAG.

Implements llvm::ScheduleDAG.

Definition at line 269 of file SelectionDAGPrinter.cpp.

References llvm::SmallVectorTemplateCommon< T >::back(), DAG, llvm::SmallVectorBase::empty(), llvm::SDNode::getGluedNode(), llvm::SUnit::getNode(), N, llvm::SUnit::NodeNum, llvm::SmallVectorTemplateBase< T, isPodLike< T >::value >::pop_back(), llvm::SmallVectorTemplateBase< T, isPodLike< T >::value >::push_back(), and llvm::raw_string_ostream::str().

void ScheduleDAGSDNodes::InitNumRegDefsLeft ( SUnit * SU )

InitNumRegDefsLeft - Determine the # of regs defined by this node.

Definition at line 577 of file ScheduleDAGSDNodes.cpp.

References I, and llvm::SUnit::NumRegDefsLeft.

void llvm::ScheduleDAGSDNodes::InitVRegCycleFlag ( SUnit * SU )

InitVRegCycleFlag - Set isVRegCycle if this node's single use is CopyToReg and its only active data operands are CopyFromReg within a single block loop.

static bool llvm::ScheduleDAGSDNodes::isPassiveNode ( SDNode * Node )

inlinestatic

isPassiveNode - Return true if the node is a non-scheduled leaf.

Definition at line 55 of file ScheduleDAGSDNodes.h.

References llvm::ISD::EntryToken, and llvm::SDNode::getOpcode().

SUnit * ScheduleDAGSDNodes::newSUnit ( SDNode * N )

NewSUnit - Creates a new SUnit and return a ptr to it.

Definition at line 68 of file ScheduleDAGSDNodes.cpp.

References DAG, llvm::SDNode::getMachineOpcode(), llvm::TargetLoweringBase::getSchedulingPreference(), llvm::SelectionDAG::getTargetLoweringInfo(), llvm::TargetOpcode::IMPLICIT_DEF, llvm::SDNode::isMachineOpcode(), llvm::Sched::None, llvm::SUnit::SchedulingPref, and llvm::ScheduleDAG::SUnits.

Referenced by Clone().