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LiveRangeCalc.cpp
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1 //===---- LiveRangeCalc.cpp - Calculate live ranges -----------------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // Implementation of the LiveRangeCalc class.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #define DEBUG_TYPE "regalloc"
15 #include "LiveRangeCalc.h"
18 
19 using namespace llvm;
20 
22  SlotIndexes *SI,
24  VNInfo::Allocator *VNIA) {
25  MF = mf;
26  MRI = &MF->getRegInfo();
27  Indexes = SI;
28  DomTree = MDT;
29  Alloc = VNIA;
30 
31  unsigned N = MF->getNumBlockIDs();
32  Seen.clear();
33  Seen.resize(N);
34  LiveOut.resize(N);
35  LiveIn.clear();
36 }
37 
38 
40  assert(MRI && Indexes && "call reset() first");
41 
42  // Visit all def operands. If the same instruction has multiple defs of Reg,
43  // LR.createDeadDef() will deduplicate.
45  I = MRI->def_begin(Reg), E = MRI->def_end(); I != E; ++I) {
46  const MachineInstr *MI = &*I;
47  // Find the corresponding slot index.
48  SlotIndex Idx;
49  if (MI->isPHI())
50  // PHI defs begin at the basic block start index.
51  Idx = Indexes->getMBBStartIdx(MI->getParent());
52  else
53  // Instructions are either normal 'r', or early clobber 'e'.
54  Idx = Indexes->getInstructionIndex(MI)
55  .getRegSlot(I.getOperand().isEarlyClobber());
56 
57  // Create the def in LR. This may find an existing def.
58  LR.createDeadDef(Idx, *Alloc);
59  }
60 }
61 
62 
64  assert(MRI && Indexes && "call reset() first");
65 
66  // Visit all operands that read Reg. This may include partial defs.
68  E = MRI->reg_nodbg_end(); I != E; ++I) {
69  MachineOperand &MO = I.getOperand();
70  // Clear all kill flags. They will be reinserted after register allocation
71  // by LiveIntervalAnalysis::addKillFlags().
72  if (MO.isUse())
73  MO.setIsKill(false);
74  if (!MO.readsReg())
75  continue;
76  // MI is reading Reg. We may have visited MI before if it happens to be
77  // reading Reg multiple times. That is OK, extend() is idempotent.
78  const MachineInstr *MI = &*I;
79 
80  // Find the SlotIndex being read.
81  SlotIndex Idx;
82  if (MI->isPHI()) {
83  assert(!MO.isDef() && "Cannot handle PHI def of partial register.");
84  // PHI operands are paired: (Reg, PredMBB).
85  // Extend the live range to be live-out from PredMBB.
86  Idx = Indexes->getMBBEndIdx(MI->getOperand(I.getOperandNo()+1).getMBB());
87  } else {
88  // This is a normal instruction.
89  Idx = Indexes->getInstructionIndex(MI).getRegSlot();
90  // Check for early-clobber redefs.
91  unsigned DefIdx;
92  if (MO.isDef()) {
93  if (MO.isEarlyClobber())
94  Idx = Idx.getRegSlot(true);
95  } else if (MI->isRegTiedToDefOperand(I.getOperandNo(), &DefIdx)) {
96  // FIXME: This would be a lot easier if tied early-clobber uses also
97  // had an early-clobber flag.
98  if (MI->getOperand(DefIdx).isEarlyClobber())
99  Idx = Idx.getRegSlot(true);
100  }
101  }
102  extend(LR, Idx, Reg);
103  }
104 }
105 
106 
107 // Transfer information from the LiveIn vector to the live ranges.
108 void LiveRangeCalc::updateLiveIns() {
109  LiveRangeUpdater Updater;
111  E = LiveIn.end(); I != E; ++I) {
112  if (!I->DomNode)
113  continue;
114  MachineBasicBlock *MBB = I->DomNode->getBlock();
115  assert(I->Value && "No live-in value found");
116  SlotIndex Start, End;
117  tie(Start, End) = Indexes->getMBBRange(MBB);
118 
119  if (I->Kill.isValid())
120  // Value is killed inside this block.
121  End = I->Kill;
122  else {
123  // The value is live-through, update LiveOut as well.
124  // Defer the Domtree lookup until it is needed.
125  assert(Seen.test(MBB->getNumber()));
126  LiveOut[MBB] = LiveOutPair(I->Value, (MachineDomTreeNode *)0);
127  }
128  Updater.setDest(&I->LR);
129  Updater.add(Start, End, I->Value);
130  }
131  LiveIn.clear();
132 }
133 
134 
135 void LiveRangeCalc::extend(LiveRange &LR, SlotIndex Kill, unsigned PhysReg) {
136  assert(Kill.isValid() && "Invalid SlotIndex");
137  assert(Indexes && "Missing SlotIndexes");
138  assert(DomTree && "Missing dominator tree");
139 
140  MachineBasicBlock *KillMBB = Indexes->getMBBFromIndex(Kill.getPrevSlot());
141  assert(KillMBB && "No MBB at Kill");
142 
143  // Is there a def in the same MBB we can extend?
144  if (LR.extendInBlock(Indexes->getMBBStartIdx(KillMBB), Kill))
145  return;
146 
147  // Find the single reaching def, or determine if Kill is jointly dominated by
148  // multiple values, and we may need to create even more phi-defs to preserve
149  // VNInfo SSA form. Perform a search for all predecessor blocks where we
150  // know the dominating VNInfo.
151  if (findReachingDefs(LR, *KillMBB, Kill, PhysReg))
152  return;
153 
154  // When there were multiple different values, we may need new PHIs.
155  calculateValues();
156 }
157 
158 
159 // This function is called by a client after using the low-level API to add
160 // live-out and live-in blocks. The unique value optimization is not
161 // available, SplitEditor::transferValues handles that case directly anyway.
163  assert(Indexes && "Missing SlotIndexes");
164  assert(DomTree && "Missing dominator tree");
165  updateSSA();
166  updateLiveIns();
167 }
168 
169 
170 bool LiveRangeCalc::findReachingDefs(LiveRange &LR, MachineBasicBlock &KillMBB,
171  SlotIndex Kill, unsigned PhysReg) {
172  unsigned KillMBBNum = KillMBB.getNumber();
173 
174  // Block numbers where LR should be live-in.
175  SmallVector<unsigned, 16> WorkList(1, KillMBBNum);
176 
177  // Remember if we have seen more than one value.
178  bool UniqueVNI = true;
179  VNInfo *TheVNI = 0;
180 
181  // Using Seen as a visited set, perform a BFS for all reaching defs.
182  for (unsigned i = 0; i != WorkList.size(); ++i) {
183  MachineBasicBlock *MBB = MF->getBlockNumbered(WorkList[i]);
184 
185 #ifndef NDEBUG
186  if (MBB->pred_empty()) {
187  MBB->getParent()->verify();
188  llvm_unreachable("Use not jointly dominated by defs.");
189  }
190 
192  !MBB->isLiveIn(PhysReg)) {
193  MBB->getParent()->verify();
194  errs() << "The register needs to be live in to BB#" << MBB->getNumber()
195  << ", but is missing from the live-in list.\n";
196  llvm_unreachable("Invalid global physical register");
197  }
198 #endif
199 
201  PE = MBB->pred_end(); PI != PE; ++PI) {
202  MachineBasicBlock *Pred = *PI;
203 
204  // Is this a known live-out block?
205  if (Seen.test(Pred->getNumber())) {
206  if (VNInfo *VNI = LiveOut[Pred].first) {
207  if (TheVNI && TheVNI != VNI)
208  UniqueVNI = false;
209  TheVNI = VNI;
210  }
211  continue;
212  }
213 
214  SlotIndex Start, End;
215  tie(Start, End) = Indexes->getMBBRange(Pred);
216 
217  // First time we see Pred. Try to determine the live-out value, but set
218  // it as null if Pred is live-through with an unknown value.
219  VNInfo *VNI = LR.extendInBlock(Start, End);
220  setLiveOutValue(Pred, VNI);
221  if (VNI) {
222  if (TheVNI && TheVNI != VNI)
223  UniqueVNI = false;
224  TheVNI = VNI;
225  continue;
226  }
227 
228  // No, we need a live-in value for Pred as well
229  if (Pred != &KillMBB)
230  WorkList.push_back(Pred->getNumber());
231  else
232  // Loopback to KillMBB, so value is really live through.
233  Kill = SlotIndex();
234  }
235  }
236 
237  LiveIn.clear();
238 
239  // Both updateSSA() and LiveRangeUpdater benefit from ordered blocks, but
240  // neither require it. Skip the sorting overhead for small updates.
241  if (WorkList.size() > 4)
242  array_pod_sort(WorkList.begin(), WorkList.end());
243 
244  // If a unique reaching def was found, blit in the live ranges immediately.
245  if (UniqueVNI) {
246  LiveRangeUpdater Updater(&LR);
247  for (SmallVectorImpl<unsigned>::const_iterator I = WorkList.begin(),
248  E = WorkList.end(); I != E; ++I) {
249  SlotIndex Start, End;
250  tie(Start, End) = Indexes->getMBBRange(*I);
251  // Trim the live range in KillMBB.
252  if (*I == KillMBBNum && Kill.isValid())
253  End = Kill;
254  else
255  LiveOut[MF->getBlockNumbered(*I)] =
256  LiveOutPair(TheVNI, (MachineDomTreeNode *)0);
257  Updater.add(Start, End, TheVNI);
258  }
259  return true;
260  }
261 
262  // Multiple values were found, so transfer the work list to the LiveIn array
263  // where UpdateSSA will use it as a work list.
264  LiveIn.reserve(WorkList.size());
266  I = WorkList.begin(), E = WorkList.end(); I != E; ++I) {
267  MachineBasicBlock *MBB = MF->getBlockNumbered(*I);
268  addLiveInBlock(LR, DomTree->getNode(MBB));
269  if (MBB == &KillMBB)
270  LiveIn.back().Kill = Kill;
271  }
272 
273  return false;
274 }
275 
276 
277 // This is essentially the same iterative algorithm that SSAUpdater uses,
278 // except we already have a dominator tree, so we don't have to recompute it.
279 void LiveRangeCalc::updateSSA() {
280  assert(Indexes && "Missing SlotIndexes");
281  assert(DomTree && "Missing dominator tree");
282 
283  // Interate until convergence.
284  unsigned Changes;
285  do {
286  Changes = 0;
287  // Propagate live-out values down the dominator tree, inserting phi-defs
288  // when necessary.
290  E = LiveIn.end(); I != E; ++I) {
291  MachineDomTreeNode *Node = I->DomNode;
292  // Skip block if the live-in value has already been determined.
293  if (!Node)
294  continue;
295  MachineBasicBlock *MBB = Node->getBlock();
296  MachineDomTreeNode *IDom = Node->getIDom();
297  LiveOutPair IDomValue;
298 
299  // We need a live-in value to a block with no immediate dominator?
300  // This is probably an unreachable block that has survived somehow.
301  bool needPHI = !IDom || !Seen.test(IDom->getBlock()->getNumber());
302 
303  // IDom dominates all of our predecessors, but it may not be their
304  // immediate dominator. Check if any of them have live-out values that are
305  // properly dominated by IDom. If so, we need a phi-def here.
306  if (!needPHI) {
307  IDomValue = LiveOut[IDom->getBlock()];
308 
309  // Cache the DomTree node that defined the value.
310  if (IDomValue.first && !IDomValue.second)
311  LiveOut[IDom->getBlock()].second = IDomValue.second =
312  DomTree->getNode(Indexes->getMBBFromIndex(IDomValue.first->def));
313 
315  PE = MBB->pred_end(); PI != PE; ++PI) {
316  LiveOutPair &Value = LiveOut[*PI];
317  if (!Value.first || Value.first == IDomValue.first)
318  continue;
319 
320  // Cache the DomTree node that defined the value.
321  if (!Value.second)
322  Value.second =
323  DomTree->getNode(Indexes->getMBBFromIndex(Value.first->def));
324 
325  // This predecessor is carrying something other than IDomValue.
326  // It could be because IDomValue hasn't propagated yet, or it could be
327  // because MBB is in the dominance frontier of that value.
328  if (DomTree->dominates(IDom, Value.second)) {
329  needPHI = true;
330  break;
331  }
332  }
333  }
334 
335  // The value may be live-through even if Kill is set, as can happen when
336  // we are called from extendRange. In that case LiveOutSeen is true, and
337  // LiveOut indicates a foreign or missing value.
338  LiveOutPair &LOP = LiveOut[MBB];
339 
340  // Create a phi-def if required.
341  if (needPHI) {
342  ++Changes;
343  assert(Alloc && "Need VNInfo allocator to create PHI-defs");
344  SlotIndex Start, End;
345  tie(Start, End) = Indexes->getMBBRange(MBB);
346  LiveRange &LR = I->LR;
347  VNInfo *VNI = LR.getNextValue(Start, *Alloc);
348  I->Value = VNI;
349  // This block is done, we know the final value.
350  I->DomNode = 0;
351 
352  // Add liveness since updateLiveIns now skips this node.
353  if (I->Kill.isValid())
354  LR.addSegment(LiveInterval::Segment(Start, I->Kill, VNI));
355  else {
356  LR.addSegment(LiveInterval::Segment(Start, End, VNI));
357  LOP = LiveOutPair(VNI, Node);
358  }
359  } else if (IDomValue.first) {
360  // No phi-def here. Remember incoming value.
361  I->Value = IDomValue.first;
362 
363  // If the IDomValue is killed in the block, don't propagate through.
364  if (I->Kill.isValid())
365  continue;
366 
367  // Propagate IDomValue if it isn't killed:
368  // MBB is live-out and doesn't define its own value.
369  if (LOP.first == IDomValue.first)
370  continue;
371  ++Changes;
372  LOP = IDomValue;
373  }
374  }
375  } while (Changes);
376 }
void add(LiveRange::Segment)
void resize(unsigned N, bool t=false)
resize - Grow or shrink the bitvector.
Definition: BitVector.h:210
const MachineFunction * getParent() const
bool isRegTiedToDefOperand(unsigned UseOpIdx, unsigned *DefOpIdx=0) const
Definition: MachineInstr.h:862
raw_ostream & errs()
void reserve(unsigned N)
Definition: SmallVector.h:425
void extend(LiveRange &LR, SlotIndex Kill, unsigned PhysReg=0)
void createDeadDefs(LiveRange &LR, unsigned Reg)
void verify(Pass *p=NULL, const char *Banner=NULL) const
void setLiveOutValue(MachineBasicBlock *MBB, VNInfo *VNI)
DomTreeNodeBase< NodeT > * getIDom() const
Definition: Dominators.h:83
void clear()
clear - Clear all bits.
Definition: BitVector.h:205
unsigned getNumBlockIDs() const
bool isPHI() const
Definition: MachineInstr.h:648
#define llvm_unreachable(msg)
MachineDomTreeNode * getNode(MachineBasicBlock *BB) const
void addLiveInBlock(LiveRange &LR, MachineDomTreeNode *DomNode, SlotIndex Kill=SlotIndex())
iterator addSegment(Segment S)
Definition: LiveInterval.h:403
std::vector< MachineBasicBlock * >::iterator pred_iterator
NodeT * getBlock() const
Definition: Dominators.h:82
SlotIndex getPrevSlot() const
Definition: SlotIndexes.h:292
const MachineBasicBlock * getParent() const
Definition: MachineInstr.h:119
bool isEarlyClobber() const
void reset(const MachineFunction *MF, SlotIndexes *, MachineDominatorTree *, VNInfo::Allocator *)
void array_pod_sort(IteratorTy Start, IteratorTy End)
Definition: STLExtras.h:289
bool isValid() const
Definition: SlotIndexes.h:160
const MachineOperand & getOperand(unsigned i) const
Definition: MachineInstr.h:267
void setDest(LiveRange *lr)
Select a different destination live range.
Definition: LiveInterval.h:623
void extendToUses(LiveRange &LR, unsigned Reg)
void resize(typename StorageT::size_type s)
Definition: IndexedMap.h:57
SlotIndex getInstructionIndex(const MachineInstr *MI) const
Returns the base index for the given instruction.
Definition: SlotIndexes.h:414
void setIsKill(bool Val=true)
bool test(unsigned Idx) const
Definition: BitVector.h:337
MachineBasicBlock * getMBBFromIndex(SlotIndex index) const
Returns the basic block which the given index falls in.
Definition: SlotIndexes.h:506
MachineBasicBlock * getBlockNumbered(unsigned N) const
SlotIndex getMBBEndIdx(unsigned Num) const
Returns the last index in the given basic block number.
Definition: SlotIndexes.h:496
def_iterator def_begin(unsigned RegNo) const
static bool isPhysicalRegister(unsigned Reg)
bool isLiveIn(unsigned Reg) const
MachineRegisterInfo & getRegInfo()
VNInfo * createDeadDef(SlotIndex Def, VNInfo::Allocator &VNInfoAllocator)
#define I(x, y, z)
Definition: MD5.cpp:54
#define N
VNInfo * extendInBlock(SlotIndex StartIdx, SlotIndex Kill)
SlotIndex getMBBStartIdx(unsigned Num) const
Returns the first index in the given basic block number.
Definition: SlotIndexes.h:486
static reg_nodbg_iterator reg_nodbg_end()
SlotIndex getRegSlot(bool EC=false) const
Definition: SlotIndexes.h:257
VNInfo * getNextValue(SlotIndex def, VNInfo::Allocator &VNInfoAllocator)
Definition: LiveInterval.h:264
static def_iterator def_end()
LLVM Value Representation.
Definition: Value.h:66
bool readsReg() const
reg_nodbg_iterator reg_nodbg_begin(unsigned RegNo) const
bool dominates(const MachineDomTreeNode *A, const MachineDomTreeNode *B) const
SlotIndex - An opaque wrapper around machine indexes.
Definition: SlotIndexes.h:92
tier< T1, T2 > tie(T1 &f, T2 &s)
Definition: STLExtras.h:216
const std::pair< SlotIndex, SlotIndex > & getMBBRange(unsigned Num) const
Return the (start,end) range of the given basic block number.
Definition: SlotIndexes.h:475