14 #define DEBUG_TYPE "regalloc"
40 assert(MRI && Indexes &&
"call reset() first");
64 assert(MRI && Indexes &&
"call reset() first");
83 assert(!MO.
isDef() &&
"Cannot handle PHI def of partial register.");
108 void LiveRangeCalc::updateLiveIns() {
111 E = LiveIn.
end();
I != E; ++
I) {
115 assert(
I->Value &&
"No live-in value found");
119 if (
I->Kill.isValid())
129 Updater.
add(Start, End,
I->Value);
136 assert(Kill.
isValid() &&
"Invalid SlotIndex");
137 assert(Indexes &&
"Missing SlotIndexes");
138 assert(DomTree &&
"Missing dominator tree");
141 assert(KillMBB &&
"No MBB at Kill");
151 if (findReachingDefs(LR, *KillMBB, Kill, PhysReg))
163 assert(Indexes &&
"Missing SlotIndexes");
164 assert(DomTree &&
"Missing dominator tree");
172 unsigned KillMBBNum = KillMBB.
getNumber();
178 bool UniqueVNI =
true;
182 for (
unsigned i = 0; i != WorkList.size(); ++i) {
194 errs() <<
"The register needs to be live in to BB#" << MBB->
getNumber()
195 <<
", but is missing from the live-in list.\n";
201 PE = MBB->
pred_end(); PI != PE; ++PI) {
206 if (
VNInfo *VNI = LiveOut[Pred].first) {
207 if (TheVNI && TheVNI != VNI)
222 if (TheVNI && TheVNI != VNI)
229 if (Pred != &KillMBB)
241 if (WorkList.size() > 4)
248 E = WorkList.end();
I != E; ++
I) {
252 if (*
I == KillMBBNum && Kill.
isValid())
257 Updater.
add(Start, End, TheVNI);
264 LiveIn.
reserve(WorkList.size());
266 I = WorkList.begin(), E = WorkList.end();
I != E; ++
I) {
279 void LiveRangeCalc::updateSSA() {
280 assert(Indexes &&
"Missing SlotIndexes");
281 assert(DomTree &&
"Missing dominator tree");
290 E = LiveIn.
end();
I != E; ++
I) {
297 LiveOutPair IDomValue;
301 bool needPHI = !IDom || !Seen.
test(IDom->
getBlock()->getNumber());
307 IDomValue = LiveOut[IDom->
getBlock()];
310 if (IDomValue.first && !IDomValue.second)
311 LiveOut[IDom->
getBlock()].second = IDomValue.second =
315 PE = MBB->
pred_end(); PI != PE; ++PI) {
316 LiveOutPair &
Value = LiveOut[*PI];
317 if (!Value.first || Value.first == IDomValue.first)
328 if (DomTree->
dominates(IDom, Value.second)) {
338 LiveOutPair &LOP = LiveOut[MBB];
343 assert(Alloc &&
"Need VNInfo allocator to create PHI-defs");
353 if (
I->Kill.isValid())
354 LR.
addSegment(LiveInterval::Segment(Start,
I->Kill, VNI));
356 LR.
addSegment(LiveInterval::Segment(Start, End, VNI));
357 LOP = LiveOutPair(VNI, Node);
359 }
else if (IDomValue.first) {
361 I->Value = IDomValue.first;
364 if (
I->Kill.isValid())
369 if (LOP.first == IDomValue.first)
void add(LiveRange::Segment)
void resize(unsigned N, bool t=false)
resize - Grow or shrink the bitvector.
const MachineFunction * getParent() const
bool isRegTiedToDefOperand(unsigned UseOpIdx, unsigned *DefOpIdx=0) const
void extend(LiveRange &LR, SlotIndex Kill, unsigned PhysReg=0)
void createDeadDefs(LiveRange &LR, unsigned Reg)
void verify(Pass *p=NULL, const char *Banner=NULL) const
void setLiveOutValue(MachineBasicBlock *MBB, VNInfo *VNI)
DomTreeNodeBase< NodeT > * getIDom() const
void clear()
clear - Clear all bits.
unsigned getNumBlockIDs() const
#define llvm_unreachable(msg)
MachineDomTreeNode * getNode(MachineBasicBlock *BB) const
void addLiveInBlock(LiveRange &LR, MachineDomTreeNode *DomNode, SlotIndex Kill=SlotIndex())
iterator addSegment(Segment S)
std::vector< MachineBasicBlock * >::iterator pred_iterator
SlotIndex getPrevSlot() const
const MachineBasicBlock * getParent() const
bool isEarlyClobber() const
void reset(const MachineFunction *MF, SlotIndexes *, MachineDominatorTree *, VNInfo::Allocator *)
void array_pod_sort(IteratorTy Start, IteratorTy End)
const MachineOperand & getOperand(unsigned i) const
void setDest(LiveRange *lr)
Select a different destination live range.
void extendToUses(LiveRange &LR, unsigned Reg)
void resize(typename StorageT::size_type s)
pred_iterator pred_begin()
SlotIndex getInstructionIndex(const MachineInstr *MI) const
Returns the base index for the given instruction.
void setIsKill(bool Val=true)
bool test(unsigned Idx) const
MachineBasicBlock * getMBBFromIndex(SlotIndex index) const
Returns the basic block which the given index falls in.
MachineBasicBlock * getBlockNumbered(unsigned N) const
SlotIndex getMBBEndIdx(unsigned Num) const
Returns the last index in the given basic block number.
def_iterator def_begin(unsigned RegNo) const
static bool isPhysicalRegister(unsigned Reg)
bool isLiveIn(unsigned Reg) const
MachineRegisterInfo & getRegInfo()
VNInfo * createDeadDef(SlotIndex Def, VNInfo::Allocator &VNInfoAllocator)
VNInfo * extendInBlock(SlotIndex StartIdx, SlotIndex Kill)
SlotIndex getMBBStartIdx(unsigned Num) const
Returns the first index in the given basic block number.
static reg_nodbg_iterator reg_nodbg_end()
SlotIndex getRegSlot(bool EC=false) const
VNInfo * getNextValue(SlotIndex def, VNInfo::Allocator &VNInfoAllocator)
static def_iterator def_end()
LLVM Value Representation.
reg_nodbg_iterator reg_nodbg_begin(unsigned RegNo) const
bool dominates(const MachineDomTreeNode *A, const MachineDomTreeNode *B) const
SlotIndex - An opaque wrapper around machine indexes.
tier< T1, T2 > tie(T1 &f, T2 &s)
const std::pair< SlotIndex, SlotIndex > & getMBBRange(unsigned Num) const
Return the (start,end) range of the given basic block number.