#include "SelectionDAGBuilder.h"
#include "SDNodeDbgValue.h"
#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/Optional.h"
#include "llvm/ADT/SmallSet.h"
#include "llvm/Analysis/AliasAnalysis.h"
#include "llvm/Analysis/BranchProbabilityInfo.h"
#include "llvm/Analysis/ConstantFolding.h"
#include "llvm/Analysis/ValueTracking.h"
#include "llvm/CodeGen/Analysis.h"
#include "llvm/CodeGen/FastISel.h"
#include "llvm/CodeGen/FunctionLoweringInfo.h"
#include "llvm/CodeGen/GCMetadata.h"
#include "llvm/CodeGen/GCStrategy.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineJumpTableInfo.h"
#include "llvm/CodeGen/MachineModuleInfo.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/SelectionDAG.h"
#include "llvm/CodeGen/StackMaps.h"
#include "llvm/DebugInfo.h"
#include "llvm/IR/CallingConv.h"
#include "llvm/IR/Constants.h"
#include "llvm/IR/DataLayout.h"
#include "llvm/IR/DerivedTypes.h"
#include "llvm/IR/Function.h"
#include "llvm/IR/GlobalVariable.h"
#include "llvm/IR/InlineAsm.h"
#include "llvm/IR/Instructions.h"
#include "llvm/IR/IntrinsicInst.h"
#include "llvm/IR/Intrinsics.h"
#include "llvm/IR/LLVMContext.h"
#include "llvm/IR/Module.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetFrameLowering.h"
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetIntrinsicInfo.h"
#include "llvm/Target/TargetLibraryInfo.h"
#include "llvm/Target/TargetLowering.h"
#include "llvm/Target/TargetOptions.h"
#include "llvm/Target/TargetSelectionDAGInfo.h"
#include <algorithm>
#include "llvm/IR/Instruction.def"
#include "llvm/CodeGen/SelectionDAGISel.h"

Macros
#define	DEBUG_TYPE "isel"

#define	HANDLE_INST(NUM, OPCODE, CLASS) case Instruction::OPCODE: visit##OPCODE((const CLASS&)I); break;

Functions
static SDValue	getCopyFromPartsVector (SelectionDAG &DAG, SDLoc DL, const SDValue Parts, unsigned NumParts, MVT PartVT, EVT ValueVT, const Value V)

static SDValue	getCopyFromParts (SelectionDAG &DAG, SDLoc DL, const SDValue Parts, unsigned NumParts, MVT PartVT, EVT ValueVT, const Value V, ISD::NodeType AssertOp=ISD::DELETED_NODE)

static void	getCopyToPartsVector (SelectionDAG &DAG, SDLoc dl, SDValue Val, SDValue Parts, unsigned NumParts, MVT PartVT, const Value V)

static void	getCopyToParts (SelectionDAG &DAG, SDLoc DL, SDValue Val, SDValue Parts, unsigned NumParts, MVT PartVT, const Value V, ISD::NodeType ExtendKind=ISD::ANY_EXTEND)

static bool	InBlock (const Value V, const BasicBlock BB)

static bool	areJTsAllowed (const TargetLowering &TLI)

static APInt	ComputeRange (const APInt &First, const APInt &Last)

static bool	isSequentialInRange (const SmallVectorImpl< int > &Mask, unsigned Pos, unsigned Size, int Low)

static SDValue	InsertFenceForAtomic (SDValue Chain, AtomicOrdering Order, SynchronizationScope Scope, bool Before, SDLoc dl, SelectionDAG &DAG, const TargetLowering &TLI)

static SDValue	GetSignificand (SelectionDAG &DAG, SDValue Op, SDLoc dl)

static SDValue	GetExponent (SelectionDAG &DAG, SDValue Op, const TargetLowering &TLI, SDLoc dl)

static SDValue	getF32Constant (SelectionDAG &DAG, unsigned Flt)
	getF32Constant - Get 32-bit floating point constant. More...

static SDValue	expandExp (SDLoc dl, SDValue Op, SelectionDAG &DAG, const TargetLowering &TLI)

static SDValue	expandLog (SDLoc dl, SDValue Op, SelectionDAG &DAG, const TargetLowering &TLI)

static SDValue	expandLog2 (SDLoc dl, SDValue Op, SelectionDAG &DAG, const TargetLowering &TLI)

static SDValue	expandLog10 (SDLoc dl, SDValue Op, SelectionDAG &DAG, const TargetLowering &TLI)

static SDValue	expandExp2 (SDLoc dl, SDValue Op, SelectionDAG &DAG, const TargetLowering &TLI)

static SDValue	expandPow (SDLoc dl, SDValue LHS, SDValue RHS, SelectionDAG &DAG, const TargetLowering &TLI)

static SDValue	ExpandPowI (SDLoc DL, SDValue LHS, SDValue RHS, SelectionDAG &DAG)
	ExpandPowI - Expand a llvm.powi intrinsic. More...

static unsigned	getTruncatedArgReg (const SDValue &N)

static bool	IsOnlyUsedInZeroEqualityComparison (const Value *V)

static SDValue	getMemCmpLoad (const Value PtrVal, MVT LoadVT, Type LoadTy, SelectionDAGBuilder &Builder)

static void	GetRegistersForValue (SelectionDAG &DAG, const TargetLowering &TLI, SDLoc DL, SDISelAsmOperandInfo &OpInfo)

static bool	isOnlyUsedInEntryBlock (const Argument *A, bool FastISel)

Variables
static unsigned	LimitFloatPrecision

static cl::opt< unsigned, true >	LimitFPPrecision ("limit-float-precision", cl::desc("Generate low-precision inline sequences ""for some float libcalls"), cl::location(LimitFloatPrecision), cl::init(0))

static const unsigned	MaxParallelChains = 64

Macro Definition Documentation

#define DEBUG_TYPE "isel"

Definition at line 14 of file SelectionDAGBuilder.cpp.

#define HANDLE_INST	(	NUM,
		OPCODE,
		CLASS
	)	case Instruction::OPCODE: visit##OPCODE((const CLASS&)I); break;

Function Documentation

static bool areJTsAllowed ( const TargetLowering & TLI )

inlinestatic

Definition at line 2175 of file SelectionDAGBuilder.cpp.

References llvm::ISD::BR_JT, llvm::ISD::BRIND, llvm::TargetLoweringBase::isOperationLegalOrCustom(), llvm::MVT::Other, and llvm::TargetLoweringBase::supportJumpTables().

static APInt ComputeRange	(	const APInt &	First,
		const APInt &	Last
	)

static

Definition at line 2181 of file SelectionDAGBuilder.cpp.

References llvm::APInt::getBitWidth(), and llvm::APInt::sext().

static SDValue expandExp	(	SDLoc	dl,
		SDValue	Op,
		SelectionDAG &	DAG,
		const TargetLowering &	TLI
	)

static

expandExp - Lower an exp intrinsic. Handles the special sequences for limited-precision mode.

Definition at line 3813 of file SelectionDAGBuilder.cpp.

References llvm::ISD::ADD, llvm::ISD::BITCAST, llvm::MVT::f32, llvm::ISD::FADD, llvm::ISD::FEXP, llvm::ISD::FMUL, llvm::ISD::FP_TO_SINT, llvm::ISD::FSUB, llvm::SelectionDAG::getConstant(), getF32Constant(), llvm::SelectionDAG::getNode(), llvm::TargetLoweringBase::getPointerTy(), llvm::SDValue::getValueType(), llvm::MVT::i32, LimitFloatPrecision, llvm::ISD::SHL, llvm::ISD::SINT_TO_FP, and llvm::X.

static SDValue expandExp2	(	SDLoc	dl,
		SDValue	Op,
		SelectionDAG &	DAG,
		const TargetLowering &	TLI
	)

static

expandExp2 - Lower an exp2 intrinsic. Handles the special sequences for limited-precision mode.

Definition at line 4195 of file SelectionDAGBuilder.cpp.

References llvm::ISD::ADD, llvm::ISD::BITCAST, llvm::MVT::f32, llvm::ISD::FADD, llvm::ISD::FEXP2, llvm::ISD::FMUL, llvm::ISD::FP_TO_SINT, llvm::ISD::FSUB, llvm::SelectionDAG::getConstant(), getF32Constant(), llvm::SelectionDAG::getNode(), llvm::TargetLoweringBase::getPointerTy(), llvm::SDValue::getValueType(), llvm::MVT::i32, LimitFloatPrecision, llvm::ISD::SHL, llvm::ISD::SINT_TO_FP, and llvm::X.

static SDValue expandLog	(	SDLoc	dl,
		SDValue	Op,
		SelectionDAG &	DAG,
		const TargetLowering &	TLI
	)

static

expandLog - Lower a log intrinsic. Handles the special sequences for limited-precision mode.

Definition at line 3916 of file SelectionDAGBuilder.cpp.

References llvm::ISD::BITCAST, llvm::MVT::f32, llvm::ISD::FADD, llvm::ISD::FLOG, llvm::ISD::FMUL, llvm::ISD::FSUB, GetExponent(), getF32Constant(), llvm::SelectionDAG::getNode(), GetSignificand(), llvm::SDValue::getValueType(), llvm::MVT::i32, LimitFloatPrecision, and llvm::X.

static SDValue expandLog10	(	SDLoc	dl,
		SDValue	Op,
		SelectionDAG &	DAG,
		const TargetLowering &	TLI
	)

static

expandLog10 - Lower a log10 intrinsic. Handles the special sequences for limited-precision mode.

Definition at line 4107 of file SelectionDAGBuilder.cpp.

References llvm::ISD::BITCAST, llvm::MVT::f32, llvm::ISD::FADD, llvm::ISD::FLOG10, llvm::ISD::FMUL, llvm::ISD::FSUB, GetExponent(), getF32Constant(), llvm::SelectionDAG::getNode(), GetSignificand(), llvm::SDValue::getValueType(), llvm::MVT::i32, LimitFloatPrecision, and llvm::X.

static SDValue expandLog2	(	SDLoc	dl,
		SDValue	Op,
		SelectionDAG &	DAG,
		const TargetLowering &	TLI
	)

static

expandLog2 - Lower a log2 intrinsic. Handles the special sequences for limited-precision mode.

Definition at line 4012 of file SelectionDAGBuilder.cpp.

References llvm::ISD::BITCAST, llvm::MVT::f32, llvm::ISD::FADD, llvm::ISD::FLOG2, llvm::ISD::FMUL, llvm::ISD::FSUB, GetExponent(), getF32Constant(), llvm::SelectionDAG::getNode(), GetSignificand(), llvm::SDValue::getValueType(), llvm::MVT::i32, LimitFloatPrecision, and llvm::X.

static SDValue expandPow	(	SDLoc	dl,
		SDValue	LHS,
		SDValue	RHS,
		SelectionDAG &	DAG,
		const TargetLowering &	TLI
	)

static

visitPow - Lower a pow intrinsic. Handles the special sequences for limited-precision mode with x == 10.0f.

Definition at line 4290 of file SelectionDAGBuilder.cpp.

References llvm::ISD::ADD, llvm::ISD::BITCAST, llvm::MVT::f32, llvm::ISD::FADD, llvm::ISD::FMUL, llvm::ISD::FP_TO_SINT, llvm::ISD::FPOW, llvm::ISD::FSUB, llvm::SelectionDAG::getConstant(), getF32Constant(), llvm::SelectionDAG::getNode(), llvm::TargetLoweringBase::getPointerTy(), llvm::SDValue::getValueType(), llvm::MVT::i32, LimitFloatPrecision, llvm::ISD::SHL, llvm::ISD::SINT_TO_FP, and llvm::X.

static SDValue ExpandPowI	(	SDLoc	DL,
		SDValue	LHS,
		SDValue	RHS,
		SelectionDAG &	DAG
	)

static

ExpandPowI - Expand a llvm.powi intrinsic.

Definition at line 4398 of file SelectionDAGBuilder.cpp.

References llvm::CountPopulation_32(), llvm::ISD::FDIV, llvm::ISD::FMUL, llvm::ISD::FPOWI, llvm::Function::getAttributes(), llvm::SelectionDAG::getConstantFP(), llvm::MachineFunction::getFunction(), llvm::SelectionDAG::getMachineFunction(), llvm::SDValue::getNode(), llvm::SelectionDAG::getNode(), llvm::SDValue::getValueType(), llvm::AttributeSet::hasAttribute(), llvm::Log2_32(), and llvm::Attribute::OptimizeForSize.

static SDValue getCopyFromParts	(	SelectionDAG &	DAG,
		SDLoc	DL,
		const SDValue *	Parts,
		unsigned	NumParts,
		MVT	PartVT,
		EVT	ValueVT,
		const Value *	V,
		ISD::NodeType	AssertOp = `ISD::DELETED_NODE`
	)

static

getCopyFromParts - Create a value that contains the specified legal parts combined into the value they represent. If the parts combine to a type larger then ValueVT then AssertOp can be used to specify whether the extra bits are known to be zero (ISD::AssertZext) or sign extended from ValueVT (ISD::AssertSext).

Definition at line 101 of file SelectionDAGBuilder.cpp.

References llvm::ISD::ANY_EXTEND, llvm::ISD::BITCAST, llvm::EVT::bitsLT(), llvm::ISD::BUILD_PAIR, llvm::ISD::DELETED_NODE, llvm::MVT::f64, llvm::ISD::FP_EXTEND, llvm::ISD::FP_ROUND, llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getContext(), getCopyFromPartsVector(), llvm::EVT::getIntegerVT(), llvm::SelectionDAG::getNode(), llvm::TargetLoweringBase::getPointerTy(), llvm::MVT::getSizeInBits(), llvm::EVT::getSizeInBits(), llvm::SelectionDAG::getTargetConstant(), llvm::SelectionDAG::getTargetLoweringInfo(), llvm::SDValue::getValueType(), llvm::SelectionDAG::getValueType(), llvm::HexagonISD::Hi, llvm::TargetLoweringBase::isBigEndian(), llvm::MVT::isFloatingPoint(), llvm::EVT::isFloatingPoint(), llvm::MVT::isInteger(), llvm::EVT::isInteger(), llvm::MVT::isVector(), llvm::EVT::isVector(), llvm_unreachable, llvm::HexagonISD::Lo, llvm::Log2_32(), llvm::ISD::OR, llvm::MVT::ppcf128, llvm::ISD::SHL, std::swap(), llvm::ISD::TRUNCATE, and llvm::ISD::ZERO_EXTEND.

Referenced by getCopyFromPartsVector(), and llvm::TargetLowering::LowerCallTo().

static SDValue getCopyFromPartsVector	(	SelectionDAG &	DAG,
		SDLoc	DL,
		const SDValue *	Parts,
		unsigned	NumParts,
		MVT	PartVT,
		EVT	ValueVT,
		const Value *	V
	)

static

getCopyFromPartsVector - Create a value that contains the specified legal parts combined into the value they represent. If the parts combine to a type larger then ValueVT then AssertOp can be used to specify whether the extra bits are known to be zero (ISD::AssertZext) or sign extended from ValueVT (ISD::AssertSext).

Definition at line 222 of file SelectionDAGBuilder.cpp.

References llvm::ISD::ANY_EXTEND, llvm::ISD::BITCAST, llvm::EVT::bitsLE(), llvm::ISD::BUILD_VECTOR, llvm::ISD::CONCAT_VECTORS, llvm::LLVMContext::emitError(), llvm::ISD::EXTRACT_SUBVECTOR, llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getContext(), getCopyFromParts(), llvm::SelectionDAG::getNode(), llvm::EVT::getScalarType(), llvm::EVT::getSizeInBits(), llvm::SelectionDAG::getTargetLoweringInfo(), llvm::SelectionDAG::getUNDEF(), llvm::SDValue::getValueType(), llvm::EVT::getVectorElementType(), llvm::TargetLoweringBase::getVectorIdxTy(), llvm::EVT::getVectorNumElements(), llvm::TargetLoweringBase::getVectorTypeBreakdown(), I, llvm::TargetLoweringBase::isTypeLegal(), llvm::EVT::isVector(), and llvm::ISD::TRUNCATE.

Referenced by getCopyFromParts().

static void getCopyToParts	(	SelectionDAG &	DAG,
		SDLoc	DL,
		SDValue	Val,
		SDValue *	Parts,
		unsigned	NumParts,
		MVT	PartVT,
		const Value *	V,
		ISD::NodeType	ExtendKind = `ISD::ANY_EXTEND`
	)

static

getCopyToParts - Create a series of nodes that contain the specified value split into legal parts. If the parts contain more bits than Val, then, for integers, ExtendKind can be used to specify how to generate the extra bits.

Definition at line 339 of file SelectionDAGBuilder.cpp.

References llvm::ISD::BITCAST, llvm::LLVMContext::emitError(), llvm::ISD::EXTRACT_ELEMENT, llvm::ISD::FP_EXTEND, llvm::SelectionDAG::getContext(), getCopyToPartsVector(), llvm::EVT::getIntegerVT(), llvm::SelectionDAG::getIntPtrConstant(), llvm::SelectionDAG::getNode(), llvm::MVT::getSizeInBits(), llvm::EVT::getSizeInBits(), llvm::SelectionDAG::getTargetLoweringInfo(), llvm::SDValue::getValueType(), I, llvm::TargetLoweringBase::isBigEndian(), llvm::MVT::isFloatingPoint(), llvm::EVT::isFloatingPoint(), llvm::MVT::isInteger(), llvm::EVT::isInteger(), llvm::TargetLoweringBase::isTypeLegal(), llvm::EVT::isVector(), llvm::Log2_32(), llvm::ISD::SRL, llvm::ISD::TRUNCATE, and llvm::MVT::x86mmx.

Referenced by getCopyToPartsVector(), and llvm::TargetLowering::LowerCallTo().

static void getCopyToPartsVector	(	SelectionDAG &	DAG,
		SDLoc	DL,
		SDValue	Val,
		SDValue *	Parts,
		unsigned	NumParts,
		MVT	PartVT,
		const Value *	V
	)

static

getCopyToPartsVector - Create a series of nodes that contain the specified value split into legal parts.

Definition at line 471 of file SelectionDAGBuilder.cpp.

References llvm::ISD::ANY_EXTEND, llvm::ISD::BITCAST, llvm::EVT::bitsGE(), llvm::EVT::bitsLE(), llvm::ISD::BUILD_VECTOR, llvm::ISD::EXTRACT_SUBVECTOR, llvm::ISD::EXTRACT_VECTOR_ELT, llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getContext(), getCopyToParts(), llvm::SelectionDAG::getNode(), llvm::MVT::getSizeInBits(), llvm::EVT::getSizeInBits(), llvm::SelectionDAG::getTargetLoweringInfo(), llvm::SelectionDAG::getUNDEF(), llvm::SDValue::getValueType(), llvm::MVT::getVectorElementType(), llvm::EVT::getVectorElementType(), llvm::MVT::getVectorNumElements(), llvm::EVT::getVectorNumElements(), llvm::MVT::isVector(), llvm::EVT::isVector(), llvm::SmallVectorTemplateBase< T, isPodLike< T >::value >::push_back(), llvm::SmallVectorTemplateCommon< T >::size(), and llvm::ISD::TRUNCATE.

Referenced by getCopyToParts().

static SDValue GetExponent	(	SelectionDAG &	DAG,
		SDValue	Op,
		const TargetLowering &	TLI,
		SDLoc	dl
	)

static

GetExponent - Get the exponent:

(float)(int)(((Op & 0x7f800000) >> 23) - 127);

where Op is the hexadecimal representation of floating point value.

Definition at line 3793 of file SelectionDAGBuilder.cpp.

References llvm::ISD::AND, llvm::MVT::f32, llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getNode(), llvm::TargetLoweringBase::getPointerTy(), llvm::MVT::i32, llvm::ISD::SINT_TO_FP, llvm::ISD::SRL, and llvm::ISD::SUB.

Referenced by expandLog(), expandLog10(), and expandLog2().

static SDValue getF32Constant	(	SelectionDAG &	DAG,
		unsigned	Flt
	)

static

getF32Constant - Get 32-bit floating point constant.

Definition at line 3806 of file SelectionDAGBuilder.cpp.

References llvm::lltok::APFloat, llvm::MVT::f32, llvm::SelectionDAG::getConstantFP(), and llvm::APFloat::IEEEsingle.

Referenced by expandExp(), expandExp2(), expandLog(), expandLog10(), expandLog2(), and expandPow().

static SDValue getMemCmpLoad	(	const Value *	PtrVal,
		MVT	LoadVT,
		Type *	LoadTy,
		SelectionDAGBuilder &	Builder
	)

static

Definition at line 5524 of file SelectionDAGBuilder.cpp.

References llvm::SelectionDAGBuilder::AA, llvm::ConstantFoldLoadFromConstPtr(), llvm::SelectionDAGBuilder::DAG, llvm::ConstantExpr::getBitCast(), llvm::SelectionDAGBuilder::getCurSDLoc(), llvm::SelectionDAG::getEntryNode(), llvm::SelectionDAG::getLoad(), llvm::SelectionDAG::getRoot(), llvm::PointerType::getUnqual(), llvm::SDValue::getValue(), llvm::SelectionDAGBuilder::getValue(), llvm::SelectionDAGBuilder::PendingLoads, llvm::AliasAnalysis::pointsToConstantMemory(), and llvm::SelectionDAGBuilder::TD.

static void GetRegistersForValue	(	SelectionDAG &	DAG,
		const TargetLowering &	TLI,
		SDLoc	DL,
		SDISelAsmOperandInfo &	OpInfo
	)

static

GetRegistersForValue - Assign registers (virtual or physical) for the specified operand. We prefer to assign virtual registers, to allow the register allocator to handle the assignment process. However, if the asm uses features that we can't model on machineinstrs, we have SDISel do the allocation. This produces generally horrible, but correct, code.

OpInfo describes the operand.

Definition at line 6085 of file SelectionDAGBuilder.cpp.

References llvm::TargetRegisterClass::begin(), llvm::ISD::BITCAST, llvm::MachineRegisterInfo::createVirtualRegister(), llvm::TargetRegisterClass::end(), llvm::SelectionDAG::getContext(), llvm::MVT::getIntegerVT(), llvm::SelectionDAG::getMachineFunction(), llvm::SelectionDAG::getNode(), llvm::TargetLoweringBase::getNumRegisters(), llvm::TargetLowering::getRegForInlineAsmConstraint(), llvm::MachineFunction::getRegInfo(), llvm::MVT::getSizeInBits(), I, llvm::InlineAsm::isInput, llvm::MVT::isInteger(), llvm::MVT::Other, llvm::SmallVectorTemplateBase< T, isPodLike >::push_back(), and llvm::TargetRegisterClass::vt_begin().

static SDValue GetSignificand	(	SelectionDAG &	DAG,
		SDValue	Op,
		SDLoc	dl
	)

static

GetSignificand - Get the significand and build it into a floating-point number with exponent of 1:

Op = (Op & 0x007fffff) | 0x3f800000;

where Op is the hexadecimal representation of floating point value.

Definition at line 3779 of file SelectionDAGBuilder.cpp.

References llvm::ISD::AND, llvm::ISD::BITCAST, llvm::MVT::f32, llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getNode(), llvm::MVT::i32, and llvm::ISD::OR.

Referenced by expandLog(), expandLog10(), and expandLog2().

static unsigned getTruncatedArgReg ( const SDValue & N )

static

Definition at line 4452 of file SelectionDAGBuilder.cpp.

References llvm::ISD::AssertSext, llvm::ISD::AssertZext, llvm::ISD::CopyFromReg, llvm::MipsISD::Ext, llvm::SDValue::getOpcode(), llvm::SDValue::getOperand(), getReg(), and llvm::ISD::TRUNCATE.

static bool InBlock	(	const Value *	V,
		const BasicBlock *	BB
	)

static

Definition at line 1372 of file SelectionDAGBuilder.cpp.

References llvm::Instruction::getParent().

Referenced by llvm::SelectionDAGBuilder::FindMergedConditions().

static SDValue InsertFenceForAtomic	(	SDValue	Chain,
		AtomicOrdering	Order,
		SynchronizationScope	Scope,
		bool	Before,
		SDLoc	dl,
		SelectionDAG &	DAG,
		const TargetLowering &	TLI
	)

static

Definition at line 3513 of file SelectionDAGBuilder.cpp.

References llvm::Acquire, llvm::AcquireRelease, llvm::ISD::ATOMIC_FENCE, llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getNode(), llvm::TargetLoweringBase::getPointerTy(), llvm::Monotonic, llvm::MVT::Other, llvm::Release, and llvm::SequentiallyConsistent.

static bool isOnlyUsedInEntryBlock	(	const Argument *	A,
		bool	FastISel
	)

static

isOnlyUsedInEntryBlock - If the specified argument is only used in the entry block, return true. This includes arguments used by switches, since the switch may expand into multiple basic blocks.

Definition at line 7198 of file SelectionDAGBuilder.cpp.

References llvm::Function::begin(), llvm::Argument::getParent(), llvm::Value::use_begin(), llvm::Value::use_empty(), and llvm::Value::use_end().

static bool IsOnlyUsedInZeroEqualityComparison ( const Value * V )

static

IsOnlyUsedInZeroEqualityComparison - Return true if it only matters that the value is equal or not-equal to zero.

Definition at line 5510 of file SelectionDAGBuilder.cpp.

References llvm::Constant::isNullValue(), llvm::Value::use_begin(), and llvm::Value::use_end().

static bool isSequentialInRange	(	const SmallVectorImpl< int > &	Mask,
		unsigned	Pos,
		unsigned	Size,
		int	Low
	)

static

Definition at line 2982 of file SelectionDAGBuilder.cpp.

Variable Documentation

unsigned LimitFloatPrecision

static

LimitFloatPrecision - Generate low-precision inline sequences for some float libcalls (6, 8 or 12 bits).

Definition at line 67 of file SelectionDAGBuilder.cpp.

Referenced by expandExp(), expandExp2(), expandLog(), expandLog10(), expandLog2(), and expandPow().

cl::opt<unsigned, true> LimitFPPrecision("limit-float-precision", cl::desc("Generate low-precision inline sequences ""for some float libcalls"), cl::location(LimitFloatPrecision), cl::init(0))

static

const unsigned MaxParallelChains = 64

static

Definition at line 90 of file SelectionDAGBuilder.cpp.

Macros

Functions

Variables

Macro Definition Documentation

Function Documentation

Variable Documentation