llvm::Thumb1RegisterInfo Struct Reference

#include <Thumb1RegisterInfo.h>

Inheritance diagram for llvm::Thumb1RegisterInfo:

Collaboration diagram for llvm::Thumb1RegisterInfo:

Public Member Functions
	Thumb1RegisterInfo (const ARMSubtarget &STI)
const TargetRegisterClass *	getLargestLegalSuperClass (const TargetRegisterClass *RC) const
const TargetRegisterClass *	getPointerRegClass (const MachineFunction &MF, unsigned Kind=0) const
void	emitLoadConstPool (MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, DebugLoc dl, unsigned DestReg, unsigned SubIdx, int Val, ARMCC::CondCodes Pred=ARMCC::AL, unsigned PredReg=0, unsigned MIFlags=MachineInstr::NoFlags) const
bool	rewriteFrameIndex (MachineBasicBlock::iterator II, unsigned FrameRegIdx, unsigned FrameReg, int &Offset, const ARMBaseInstrInfo &TII) const
void	resolveFrameIndex (MachineBasicBlock::iterator I, unsigned BaseReg, int64_t Offset) const
bool	saveScavengerRegister (MachineBasicBlock &MBB, MachineBasicBlock::iterator I, MachineBasicBlock::iterator &UseMI, const TargetRegisterClass *RC, unsigned Reg) const
void	eliminateFrameIndex (MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, RegScavenger *RS=NULL) const
Public Member Functions inherited from llvm::ARMBaseRegisterInfo
const uint16_t *	getCalleeSavedRegs (const MachineFunction *MF=0) const
	Code Generation virtual methods... More...
const uint32_t *	getCallPreservedMask (CallingConv::ID) const
const uint32_t *	getNoPreservedMask () const
const uint32_t *	getThisReturnPreservedMask (CallingConv::ID) const
BitVector	getReservedRegs (const MachineFunction &MF) const
const TargetRegisterClass *	getPointerRegClass (const MachineFunction &MF, unsigned Kind=0) const
const TargetRegisterClass *	getCrossCopyRegClass (const TargetRegisterClass *RC) const
const TargetRegisterClass *	getLargestLegalSuperClass (const TargetRegisterClass *RC) const
unsigned	getRegPressureLimit (const TargetRegisterClass *RC, MachineFunction &MF) const
void	getRegAllocationHints (unsigned VirtReg, ArrayRef< MCPhysReg > Order, SmallVectorImpl< MCPhysReg > &Hints, const MachineFunction &MF, const VirtRegMap *VRM) const
void	UpdateRegAllocHint (unsigned Reg, unsigned NewReg, MachineFunction &MF) const
virtual bool	avoidWriteAfterWrite (const TargetRegisterClass *RC) const
bool	hasBasePointer (const MachineFunction &MF) const
bool	canRealignStack (const MachineFunction &MF) const
bool	needsStackRealignment (const MachineFunction &MF) const
int64_t	getFrameIndexInstrOffset (const MachineInstr *MI, int Idx) const
bool	needsFrameBaseReg (MachineInstr *MI, int64_t Offset) const
void	materializeFrameBaseRegister (MachineBasicBlock *MBB, unsigned BaseReg, int FrameIdx, int64_t Offset) const
void	resolveFrameIndex (MachineBasicBlock::iterator I, unsigned BaseReg, int64_t Offset) const
bool	isFrameOffsetLegal (const MachineInstr *MI, int64_t Offset) const
bool	cannotEliminateFrame (const MachineFunction &MF) const
unsigned	getFrameRegister (const MachineFunction &MF) const
unsigned	getBaseRegister () const
bool	isLowRegister (unsigned Reg) const
virtual bool	requiresRegisterScavenging (const MachineFunction &MF) const
	Code Generation virtual methods... More...
virtual bool	trackLivenessAfterRegAlloc (const MachineFunction &MF) const
virtual bool	requiresFrameIndexScavenging (const MachineFunction &MF) const
virtual bool	requiresVirtualBaseRegisters (const MachineFunction &MF) const

Additional Inherited Members
Protected Member Functions inherited from llvm::ARMBaseRegisterInfo
	ARMBaseRegisterInfo (const ARMSubtarget &STI)
unsigned	getOpcode (int Op) const
Protected Attributes inherited from llvm::ARMBaseRegisterInfo
const ARMSubtarget &	STI
unsigned	FramePtr
	FramePtr - ARM physical register used as frame ptr. More...
unsigned	BasePtr

Detailed Description

Definition at line 26 of file Thumb1RegisterInfo.h.

Constructor & Destructor Documentation

Thumb1RegisterInfo::Thumb1RegisterInfo

(

const ARMSubtarget &

STI

)

Definition at line 43 of file Thumb1RegisterInfo.cpp.

Member Function Documentation

void Thumb1RegisterInfo::eliminateFrameIndex ( MachineBasicBlock::iterator  II, int  SPAdj, unsigned  FIOperandNum, RegScavenger *  RS = NULL  ) const

virtual

Reimplemented from llvm::ARMBaseRegisterInfo.

Definition at line 558 of file Thumb1RegisterInfo.cpp.

References llvm::AddDefaultPred(), llvm::ARMBaseRegisterInfo::BasePtr, llvm::MachineOperand::ChangeToImmediate(), llvm::MachineOperand::ChangeToRegister(), llvm::MachineRegisterInfo::createVirtualRegister(), emitLoadConstPool(), llvm::emitThumbRegPlusImmediate(), emitThumbRegPlusImmInReg(), llvm::MachineInstr::findFirstPredOperandIdx(), llvm::ISD::FrameIndex, llvm::MachineInstr::getDebugLoc(), llvm::MachineFunction::getFrameInfo(), llvm::TargetMachine::getFrameLowering(), llvm::ARMFunctionInfo::getFramePtrSpillOffset(), llvm::ARMBaseRegisterInfo::getFrameRegister(), llvm::MachineOperand::getIndex(), llvm::MachineFunction::getInfo(), llvm::TargetMachine::getInstrInfo(), llvm::MachineFrameInfo::getObjectOffset(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineInstr::getParent(), llvm::MachineBasicBlock::getParent(), llvm::MachineOperand::getReg(), llvm::MachineFunction::getRegInfo(), llvm::MachineFrameInfo::getStackSize(), llvm::MachineFunction::getTarget(), llvm::ARMBaseRegisterInfo::hasBasePointer(), llvm::TargetFrameLowering::hasFP(), llvm::TargetFrameLowering::hasReservedCallFrame(), llvm::MachineFrameInfo::hasVarSizedObjects(), llvm::MachineInstr::isDebugValue(), llvm::MachineInstr::isPredicable(), llvm::RegScavenger::isScavengingFrameIndex(), llvm::ARMFunctionInfo::isThumbFunction(), llvm_unreachable, llvm::MachineInstr::mayLoad(), llvm::MachineInstr::mayStore(), llvm::A64CC::MI, removeOperands(), rewriteFrameIndex(), and llvm::MachineInstr::setDesc().

void Thumb1RegisterInfo::emitLoadConstPool ( MachineBasicBlock &  MBB, MachineBasicBlock::iterator &  MBBI, DebugLoc  dl, unsigned  DestReg, unsigned  SubIdx, int  Val, ARMCC::CondCodes  Pred = ARMCC::AL, unsigned  PredReg = 0, unsigned  MIFlags = MachineInstr::NoFlags  ) const

virtual

emitLoadConstPool - Emits a load from constpool to materialize the specified immediate.

Reimplemented from llvm::ARMBaseRegisterInfo.

Definition at line 64 of file Thumb1RegisterInfo.cpp.

References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), llvm::CallingConv::C, llvm::ISD::ConstantPool, llvm::MCInstrInfo::get(), llvm::ConstantInt::get(), llvm::MachineFunction::getConstantPool(), llvm::MachineConstantPool::getConstantPoolIndex(), llvm::Function::getContext(), llvm::getDefRegState(), llvm::MachineFunction::getFunction(), llvm::TargetMachine::getInstrInfo(), llvm::Type::getInt32Ty(), llvm::MachineBasicBlock::getParent(), llvm::MachineFunction::getTarget(), llvm::MachineInstrBuilder::setMIFlags(), and TII.

Referenced by eliminateFrameIndex().

const TargetRegisterClass * Thumb1RegisterInfo::getLargestLegalSuperClass

(

const TargetRegisterClass *

RC

)

const

Definition at line 48 of file Thumb1RegisterInfo.cpp.

References llvm::ARMBaseRegisterInfo::getLargestLegalSuperClass().

const TargetRegisterClass * Thumb1RegisterInfo::getPointerRegClass	(	const MachineFunction &	MF,
		unsigned	Kind = 0
	)		const

Definition at line 56 of file Thumb1RegisterInfo.cpp.

void Thumb1RegisterInfo::resolveFrameIndex	(	MachineBasicBlock::iterator	I,
		unsigned	BaseReg,
		int64_t	Offset
	)		const

Definition at line 488 of file Thumb1RegisterInfo.cpp.

References llvm::TargetMachine::getInstrInfo(), llvm::MachineInstr::getNumOperands(), llvm::MachineInstr::getOperand(), llvm::MachineInstr::getParent(), llvm::MachineBasicBlock::getParent(), llvm::MachineFunction::getTarget(), I, llvm::MachineOperand::isFI(), llvm::A64CC::MI, and rewriteFrameIndex().

bool Thumb1RegisterInfo::rewriteFrameIndex	(	MachineBasicBlock::iterator	II,
		unsigned	FrameRegIdx,
		unsigned	FrameReg,
		int &	Offset,
		const ARMBaseInstrInfo &	TII
	)		const

Definition at line 346 of file Thumb1RegisterInfo.cpp.

References llvm::AddDefaultPred(), llvm::AddDefaultT1CC(), llvm::ARMII::AddrModeMask, llvm::ARMII::AddrModeT1_s, llvm::ARMCC::AL, calcNumMI(), llvm::MachineOperand::ChangeToImmediate(), llvm::MachineOperand::ChangeToRegister(), convertToNonSPOpcode(), emitThumbConstant(), llvm::emitThumbRegPlusImmediate(), llvm::MachineBasicBlock::erase(), llvm::MachineInstr::getDebugLoc(), llvm::MachineInstr::getDesc(), llvm::MachineOperand::getImm(), llvm::getInstrPredicate(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineInstr::getParent(), llvm::MachineBasicBlock::getParent(), llvm::MachineOperand::getReg(), llvm_unreachable, llvm::A64CC::MI, llvm::next(), llvm::MachineInstr::RemoveOperand(), removeOperands(), llvm::MachineInstr::setDesc(), and llvm::MCInstrDesc::TSFlags.

Referenced by eliminateFrameIndex(), and resolveFrameIndex().

bool Thumb1RegisterInfo::saveScavengerRegister	(	MachineBasicBlock &	MBB,
		MachineBasicBlock::iterator	I,
		MachineBasicBlock::iterator &	UseMI,
		const TargetRegisterClass *	RC,
		unsigned	Reg
	)		const

saveScavengerRegister - Spill the register so it can be used by the register scavenger. Return true.

Definition at line 509 of file Thumb1RegisterInfo.cpp.

References llvm::AddDefaultPred(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), llvm::MachineOperand::clobbersPhysReg(), llvm::RegState::Define, llvm::MCInstrInfo::get(), llvm::TargetMachine::getInstrInfo(), llvm::MachineBasicBlock::getParent(), llvm::MachineOperand::getReg(), llvm::MachineFunction::getTarget(), llvm::MachineOperand::isReg(), llvm::MachineOperand::isRegMask(), llvm::MachineOperand::isUndef(), llvm::TargetRegisterInfo::isVirtualRegister(), and llvm::RegState::Kill.

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The documentation for this struct was generated from the following files:

• Thumb1RegisterInfo.h
• Thumb1RegisterInfo.cpp